From 9906895d99a3c54e9c0541ebe55abee2f6bb1c4a Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Mon, 24 Aug 2026 03:58:52 -0700
Subject: [PATCH 01/13] Tune B200 DSV4 AgentX prefill scheduling
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

调整 B200 DSV4 AgentX 预填充调度。
---
 .../single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh      | 3 +--
 perf-changelog.yaml                                      | 9 +++++++++
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index a740a88a0..9bbc23bb5 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -110,8 +110,7 @@ if [ "$DP_ATTENTION" = "true" ]; then
     PARALLEL_ARGS+=(
         --dp "$TP"
         --tokenizer-worker-num "$TP"
-        --enable-prefill-delayer
-        --prefill-decode-interval 10
+        --prefill-decode-interval 20
         --enable-dp-attention
         --enable-dp-attention-local-control-broadcast
         --incremental-streaming-output
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index ab92e7921..54b69d4e3 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6576,3 +6576,12 @@
     - "Recipes sourced from srt-slurm (recipes/trtllm/qwen3.5-fp4/inferencex/gb300/{mtp,stp})."
     - "Runner: launch_gb300-nv.sh bumped from NVIDIA/srt-slurm@v1.0.29 to v1.0.72 for the dynamo-trt+qwen3.5+fp4 path."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2730
+
+- config-keys:
+    - dsv4-fp4-b200-sglang-agentic-hicache-mtp
+  scenario-type:
+    - agentic-coding
+  description:
+    - "On the DP-attention path, remove --enable-prefill-delayer and increase --prefill-decode-interval from 10 to 20 to improve the P90 TTFT and TPOT balance."
+    - "Retain the existing TP8/DP8/EP8 topology, HiCache, MegaMoE, 65536-token global chunked-prefill budget, and 2x-concurrency request and CUDA-graph limits."
+  pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/XXX

From addfa7eb5b22942e61ff5e80fe125f9efefcbf53 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Mon, 24 Aug 2026 04:00:53 -0700
Subject: [PATCH 02/13] Update perf-changelog PR link
MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit

更新性能变更日志中的 PR 链接。
---
 perf-changelog.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 54b69d4e3..4f810ea39 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -5595,7 +5595,7 @@
     - "Image ghcr.io/tile-ai/tilert:0.1.5 (tilert 0.1.5.post2 installed at container start); commands aligned to TileRT README Topology A -- NIXL KV transfer, --kv-cache-dtype fp8_ds_mla (prefill) <-> fp8 (decode), max-seq-len 202752; MTP speculative-config wired via spec-decoding=mtp"
     - "Topology: 1 prefill node (TP8) + 1 decode node (TP8), each 8xB200 exclusive; TileRT decode is bs=1 only so conc-list is a single point [1], ISL 1k/8k OSL 1k"
     - "Runner: launch_b200-dgxc.sh tilert early-return branch (zero impact on the dynamo path); tilert_utils/submit.sh issues two srun --ntasks=1, one per role, because prefill and decode need different container images; roles are dispatched by the TILERT_ROLE it exports, and torn down across nodes via a sentinel file on the shared /workspace"
-  pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/XXX
+  pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718
 
 - config-keys:
     - qwen3.5-fp8-b200-sglang-agentic-mtp

From 90abb6ea9a015f6034c54a67c69d84a71c1208c8 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Mon, 24 Aug 2026 04:07:06 -0700
Subject: [PATCH 03/13] Fix perf-changelog PR backfill
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

修正性能变更日志中的 PR 链接回填。
---
 perf-changelog.yaml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 4f810ea39..30ae55677 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -5595,7 +5595,7 @@
     - "Image ghcr.io/tile-ai/tilert:0.1.5 (tilert 0.1.5.post2 installed at container start); commands aligned to TileRT README Topology A -- NIXL KV transfer, --kv-cache-dtype fp8_ds_mla (prefill) <-> fp8 (decode), max-seq-len 202752; MTP speculative-config wired via spec-decoding=mtp"
     - "Topology: 1 prefill node (TP8) + 1 decode node (TP8), each 8xB200 exclusive; TileRT decode is bs=1 only so conc-list is a single point [1], ISL 1k/8k OSL 1k"
     - "Runner: launch_b200-dgxc.sh tilert early-return branch (zero impact on the dynamo path); tilert_utils/submit.sh issues two srun --ntasks=1, one per role, because prefill and decode need different container images; roles are dispatched by the TILERT_ROLE it exports, and torn down across nodes via a sentinel file on the shared /workspace"
-  pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718
+  pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/XXX
 
 - config-keys:
     - qwen3.5-fp8-b200-sglang-agentic-mtp
@@ -6584,4 +6584,4 @@
   description:
     - "On the DP-attention path, remove --enable-prefill-delayer and increase --prefill-decode-interval from 10 to 20 to improve the P90 TTFT and TPOT balance."
     - "Retain the existing TP8/DP8/EP8 topology, HiCache, MegaMoE, 65536-token global chunked-prefill budget, and 2x-concurrency request and CUDA-graph limits."
-  pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/XXX
+  pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 2830785beab4dc07f3cd1dc88227e5305ffa1ae1 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Tue, 25 Aug 2026 19:55:22 -0700
Subject: [PATCH 04/13] perf(dsv4): refresh B200 AgentX high-concurrency curve
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

更新 B200 DSV4 AgentX 高并发性能曲线配置。
---
 .../agentic/dsv4_fp4_b200_sglang_mtp.sh       | 48 +++++++++++++++----
 configs/nvidia-master.yaml                    |  4 +-
 perf-changelog.yaml                           |  5 +-
 3 files changed, 44 insertions(+), 13 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index 9bbc23bb5..c596710f1 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -91,8 +91,11 @@ fi
 USE_SGLANG_ROUTER=false
 SGLANG_BACKEND_PORT="$PORT"
 ROUTER_LOG="$RESULT_DIR/router.log"
+ROUTER_POLICY=consistent_hashing
+ROUTER_POLICY_ARGS=()
 if [ "$DP_ATTENTION" = "true" ]; then
     USE_SGLANG_ROUTER=true
+    ROUTER_POLICY=cache_aware
     export AIPERF_HTTP_X_SMG_ROUTING_KEY_FROM_CORRELATION_ID=true
     SGLANG_BACKEND_PORT=$((PORT + 1))
     SGLANG_ROUTER_METRICS_PORT=$((PORT + 10000))
@@ -103,14 +106,39 @@ PARALLEL_ARGS=(--tp "$TP")
 METRICS_ARGS=(--enable-metrics --enable-cache-report)
 CHUNKED_PREFILL_SIZE=8192
 SWA_FULL_TOKENS_RATIO=0.1
+MEM_FRACTION_STATIC=0.88
+PREFILL_DECODE_INTERVAL=20
 if [ "$DP_ATTENTION" = "true" ]; then
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_USE_FP4_ACTS=1
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_USE_MXF4_KIND=1
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_NUM_MAX_TOKENS_PER_RANK=8320
+
+    PREFILL_DECODE_INTERVAL=24
+    MEM_FRACTION_STATIC=0.90
+    # SGLang divides this global budget by dp_size. Conc 64/96 retain the
+    # validated 8192-token per-rank budget.
+    CHUNKED_PREFILL_SIZE=$((8192 * TP))
+    SWA_FULL_TOKENS_RATIO=0.02
+
+    # The higher-concurrency points use the validated memory-safe profile:
+    # 6144 prefill tokens/rank, a compact decode graph, balanced DP admission,
+    # and one-second load snapshots for the total-requests controller.
+    if [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
+        MEM_FRACTION_STATIC=0.91
+        CHUNKED_PREFILL_SIZE=$((6144 * TP))
+        PARALLEL_ARGS+=(--load-balance-method total_requests)
+        METRICS_ARGS+=(--load-snapshot-publish-interval 1)
+        export AIPERF_HTTP_X_DYNAMO_SESSION_ID_FROM_CORRELATION_ID=true
+    fi
+    if [ "$CONC" -eq 160 ]; then
+        PREFILL_DECODE_INTERVAL=20
+        ROUTER_POLICY_ARGS+=(--balance-abs-threshold 32)
+    fi
+
     PARALLEL_ARGS+=(
         --dp "$TP"
         --tokenizer-worker-num "$TP"
-        --prefill-decode-interval 20
+        --prefill-decode-interval "$PREFILL_DECODE_INTERVAL"
         --enable-dp-attention
         --enable-dp-attention-local-control-broadcast
         --incremental-streaming-output
@@ -122,10 +150,6 @@ if [ "$DP_ATTENTION" = "true" ]; then
         --disable-shared-experts-fusion
         --disable-flashinfer-autotune
     )
-    # SGLang divides this global budget by dp_size. Keep the tuned 8192-token
-    # per-rank budget for every DP-attention topology.
-    CHUNKED_PREFILL_SIZE=$((8192 * TP))
-    SWA_FULL_TOKENS_RATIO=0.02
 else
     PARALLEL_ARGS+=(
         --moe-runner-backend flashinfer_mxfp4
@@ -137,16 +161,20 @@ fi
 # The B200-specialized image deadlocks immediately after weight loading when
 # forced through the B300 compressed-attention/page-size overrides.
 # DeepGEMM's DSv4 indexer needs a multi-GiB temporary allocation at long
-# contexts. Leave the same HBM headroom used by the B300 recipe so a nearly
-# full GPU KV cache does not OOM while HiCache is spilling to host memory.
-MEM_FRACTION_STATIC=0.88
+# contexts. The selected fractions preserve the measured indexer and CUDA
+# graph headroom while HiCache spills to host memory.
 
 # AgentX concurrency counts live session trees, not individual requests.
 # Allow subagent fan-out to exceed CONC without clipping request bursts.
 MAX_RUNNING_REQUESTS=$((2 * CONC))
 CUDA_GRAPH_MAX_BS=$((2 * CONC))
+if [ "$DP_ATTENTION" = "true" ] && { [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; }; then
+    CUDA_GRAPH_MAX_BS=32
+fi
 CUDA_GRAPH_ARGS=(--cuda-graph-max-bs "$CUDA_GRAPH_MAX_BS")
 
+echo "SGLang B200 tuning: conc=$CONC dp_attention=$DP_ATTENTION interval=$PREFILL_DECODE_INTERVAL mem_fraction=$MEM_FRACTION_STATIC chunked_prefill=$CHUNKED_PREFILL_SIZE cuda_graph_max_bs=$CUDA_GRAPH_MAX_BS router_policy=$ROUTER_POLICY"
+
 export PYTHONNOUSERSITE=1
 export TORCH_CUDA_ARCH_LIST=10.0
 # Agentic warmup dispatches hundreds of large prompts at once. SGLang's
@@ -204,6 +232,7 @@ SGLANG_CMD=(
     # across local ranks so post-load weight repacking reads from page cache
     # instead of issuing redundant fragmented mmap faults from every rank.
     --weight-loader-prefetch-checkpoints
+    --model-loader-extra-config '{"enable_multithread_load": true}'
     "${METRICS_ARGS[@]}"
     "${CACHE_ARGS[@]}"
 )
@@ -240,7 +269,8 @@ if [ "$USE_SGLANG_ROUTER" = "true" ]; then
     echo "Starting SGLang router on port $PORT for $TP DP ranks..."
     "${SGLANG_ROUTER_CMD[@]}" \
         --worker-urls "http://localhost:$SGLANG_BACKEND_PORT" \
-        --policy consistent_hashing \
+        --policy "$ROUTER_POLICY" \
+        "${ROUTER_POLICY_ARGS[@]}" \
         --request-id-headers x-correlation-id \
         --dp-aware \
         --host 0.0.0.0 \
diff --git a/configs/nvidia-master.yaml b/configs/nvidia-master.yaml
index 438a3e9da..56d2171a1 100644
--- a/configs/nvidia-master.yaml
+++ b/configs/nvidia-master.yaml
@@ -941,8 +941,8 @@ dsv4-fp4-b200-sglang-agentic-hicache-mtp:
     - dram-utilization: 0.80
       search-space:
       - { tp: 8, kv-offloading: none, spec-decoding: mtp, conc-list: [1, 2, 3, 4, 5] }
-      - { tp: 8, kv-offloading: dram, kv-offload-backend: { name: hicache }, spec-decoding: mtp, conc-list: [8, 10, 16, 32] }
-      - { tp: 8, ep: 8, dp-attn: true, kv-offloading: dram, kv-offload-backend: { name: hicache }, spec-decoding: mtp, conc-list: [32, 64, 96], router: { name: sglang-router, version: "0.3.2" } }
+      - { tp: 8, kv-offloading: dram, kv-offload-backend: { name: hicache }, spec-decoding: mtp, conc-list: [8, 10, 16] }
+      - { tp: 8, ep: 8, dp-attn: true, kv-offloading: dram, kv-offload-backend: { name: hicache }, spec-decoding: mtp, conc-list: [64, 96, 128, 160], router: { name: sglang-router, version: "0.3.2" } }
 
 dsv4-fp4-b200-vllm:
   image: vllm/vllm-openai:v0.25.0
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 30ae55677..65525ebdd 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6582,6 +6582,7 @@
   scenario-type:
     - agentic-coding
   description:
-    - "On the DP-attention path, remove --enable-prefill-delayer and increase --prefill-decode-interval from 10 to 20 to improve the P90 TTFT and TPOT balance."
-    - "Retain the existing TP8/DP8/EP8 topology, HiCache, MegaMoE, 65536-token global chunked-prefill budget, and 2x-concurrency request and CUDA-graph limits."
+    - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
+    - "Use --prefill-decode-interval 24 at concurrency 64, 96, and 128; retain interval 20 at concurrency 160."
+    - "Use cache-aware routing for the DP-attention profiles. At concurrency 128 and 160, use mem-fraction-static 0.91, a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, and total-requests DP balancing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 02644a8fe1536aa6aff766eae44f0e60730049a6 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Tue, 25 Aug 2026 21:29:58 -0700
Subject: [PATCH 05/13] refactor(dsv4): simplify B200 AgentX flag dispatch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

简化 B200 DSV4 AgentX 启动参数分支。
---
 .../single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh  | 12 +++---------
 perf-changelog.yaml                                  |  4 ++--
 2 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index c596710f1..93be5b170 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -91,11 +91,9 @@ fi
 USE_SGLANG_ROUTER=false
 SGLANG_BACKEND_PORT="$PORT"
 ROUTER_LOG="$RESULT_DIR/router.log"
-ROUTER_POLICY=consistent_hashing
-ROUTER_POLICY_ARGS=()
 if [ "$DP_ATTENTION" = "true" ]; then
     USE_SGLANG_ROUTER=true
-    ROUTER_POLICY=cache_aware
+    ROUTER_POLICY_ARGS=()
     export AIPERF_HTTP_X_SMG_ROUTING_KEY_FROM_CORRELATION_ID=true
     SGLANG_BACKEND_PORT=$((PORT + 1))
     SGLANG_ROUTER_METRICS_PORT=$((PORT + 10000))
@@ -106,15 +104,13 @@ PARALLEL_ARGS=(--tp "$TP")
 METRICS_ARGS=(--enable-metrics --enable-cache-report)
 CHUNKED_PREFILL_SIZE=8192
 SWA_FULL_TOKENS_RATIO=0.1
-MEM_FRACTION_STATIC=0.88
-PREFILL_DECODE_INTERVAL=20
+MEM_FRACTION_STATIC=0.90
 if [ "$DP_ATTENTION" = "true" ]; then
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_USE_FP4_ACTS=1
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_USE_MXF4_KIND=1
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_NUM_MAX_TOKENS_PER_RANK=8320
 
     PREFILL_DECODE_INTERVAL=24
-    MEM_FRACTION_STATIC=0.90
     # SGLang divides this global budget by dp_size. Conc 64/96 retain the
     # validated 8192-token per-rank budget.
     CHUNKED_PREFILL_SIZE=$((8192 * TP))
@@ -173,8 +169,6 @@ if [ "$DP_ATTENTION" = "true" ] && { [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ];
 fi
 CUDA_GRAPH_ARGS=(--cuda-graph-max-bs "$CUDA_GRAPH_MAX_BS")
 
-echo "SGLang B200 tuning: conc=$CONC dp_attention=$DP_ATTENTION interval=$PREFILL_DECODE_INTERVAL mem_fraction=$MEM_FRACTION_STATIC chunked_prefill=$CHUNKED_PREFILL_SIZE cuda_graph_max_bs=$CUDA_GRAPH_MAX_BS router_policy=$ROUTER_POLICY"
-
 export PYTHONNOUSERSITE=1
 export TORCH_CUDA_ARCH_LIST=10.0
 # Agentic warmup dispatches hundreds of large prompts at once. SGLang's
@@ -269,7 +263,7 @@ if [ "$USE_SGLANG_ROUTER" = "true" ]; then
     echo "Starting SGLang router on port $PORT for $TP DP ranks..."
     "${SGLANG_ROUTER_CMD[@]}" \
         --worker-urls "http://localhost:$SGLANG_BACKEND_PORT" \
-        --policy "$ROUTER_POLICY" \
+        --policy cache_aware \
         "${ROUTER_POLICY_ARGS[@]}" \
         --request-id-headers x-correlation-id \
         --dp-aware \
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 65525ebdd..5bf49625e 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6583,6 +6583,6 @@
     - agentic-coding
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
-    - "Use --prefill-decode-interval 24 at concurrency 64, 96, and 128; retain interval 20 at concurrency 160."
-    - "Use cache-aware routing for the DP-attention profiles. At concurrency 128 and 160, use mem-fraction-static 0.91, a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, and total-requests DP balancing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
+    - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
+    - "Use mem-fraction-static 0.90 as the common TP and DP default. At concurrency 128 and 160, retain the measured 0.91 profile together with a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, and total-requests DP balancing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 294067caa8ea757e7acdb6446e25547dd25581d8 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Wed, 26 Aug 2026 03:30:07 -0700
Subject: [PATCH 06/13] fix(dsv4): restore B200 indexer memory headroom
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

统一使用 0.90 的静态显存比例，为 B200 FP4 indexer 保留瞬时工作区。
---
 benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh | 6 ++----
 perf-changelog.yaml                                        | 2 +-
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index 93be5b170..313797d6e 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -116,11 +116,9 @@ if [ "$DP_ATTENTION" = "true" ]; then
     CHUNKED_PREFILL_SIZE=$((8192 * TP))
     SWA_FULL_TOKENS_RATIO=0.02
 
-    # The higher-concurrency points use the validated memory-safe profile:
-    # 6144 prefill tokens/rank, a compact decode graph, balanced DP admission,
-    # and one-second load snapshots for the total-requests controller.
+    # The higher-concurrency points use a reduced prefill budget, a compact
+    # decode graph, balanced DP admission, and one-second load snapshots.
     if [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
-        MEM_FRACTION_STATIC=0.91
         CHUNKED_PREFILL_SIZE=$((6144 * TP))
         PARALLEL_ARGS+=(--load-balance-method total_requests)
         METRICS_ARGS+=(--load-snapshot-publish-interval 1)
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 5bf49625e..9d4c2604f 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6584,5 +6584,5 @@
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
-    - "Use mem-fraction-static 0.90 as the common TP and DP default. At concurrency 128 and 160, retain the measured 0.91 profile together with a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, and total-requests DP balancing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
+    - "Use mem-fraction-static 0.90 across every TP and DP profile, leaving enough GPU workspace for the FP4 indexer at concurrency 128 and 160. At those two concurrencies, use a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, and total-requests DP balancing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 1b64a6b98d59d2715bc93daf3a5f73f4906da174 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Wed, 26 Aug 2026 21:59:23 -0700
Subject: [PATCH 07/13] fix(dsv4): preserve c96 FP4 indexer headroom
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

将 c96 纳入较小的分块预填充预算和紧凑 CUDA Graph 配置，以避免 FP4 索引器工作区内存不足。
---
 .../agentic/dsv4_fp4_b200_sglang_mtp.sh            | 14 +++++++++-----
 perf-changelog.yaml                                |  2 +-
 2 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index 313797d6e..92975bc6b 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -111,15 +111,19 @@ if [ "$DP_ATTENTION" = "true" ]; then
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_NUM_MAX_TOKENS_PER_RANK=8320
 
     PREFILL_DECODE_INTERVAL=24
-    # SGLang divides this global budget by dp_size. Conc 64/96 retain the
+    # SGLang divides this global budget by dp_size. Conc 64 retains the
     # validated 8192-token per-rank budget.
     CHUNKED_PREFILL_SIZE=$((8192 * TP))
     SWA_FULL_TOKENS_RATIO=0.02
 
-    # The higher-concurrency points use a reduced prefill budget, a compact
-    # decode graph, balanced DP admission, and one-second load snapshots.
-    if [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
+    # Keep enough HBM workspace for the FP4 indexer at higher concurrency.
+    if [ "$CONC" -eq 96 ] || [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
         CHUNKED_PREFILL_SIZE=$((6144 * TP))
+    fi
+
+    # Conc 128/160 additionally use balanced DP admission and one-second load
+    # snapshots.
+    if [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
         PARALLEL_ARGS+=(--load-balance-method total_requests)
         METRICS_ARGS+=(--load-snapshot-publish-interval 1)
         export AIPERF_HTTP_X_DYNAMO_SESSION_ID_FROM_CORRELATION_ID=true
@@ -162,7 +166,7 @@ fi
 # Allow subagent fan-out to exceed CONC without clipping request bursts.
 MAX_RUNNING_REQUESTS=$((2 * CONC))
 CUDA_GRAPH_MAX_BS=$((2 * CONC))
-if [ "$DP_ATTENTION" = "true" ] && { [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; }; then
+if [ "$DP_ATTENTION" = "true" ] && { [ "$CONC" -eq 96 ] || [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; }; then
     CUDA_GRAPH_MAX_BS=32
 fi
 CUDA_GRAPH_ARGS=(--cuda-graph-max-bs "$CUDA_GRAPH_MAX_BS")
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 9d4c2604f..e44f26a59 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6584,5 +6584,5 @@
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
-    - "Use mem-fraction-static 0.90 across every TP and DP profile, leaving enough GPU workspace for the FP4 indexer at concurrency 128 and 160. At those two concurrencies, use a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, and total-requests DP balancing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
+    - "Use mem-fraction-static 0.90 across every TP and DP profile. At concurrency 96, 128, and 160, use a 49152-token global chunked-prefill budget and CUDA graph maximum batch size 32 to preserve FP4-indexer workspace; additionally use total-requests DP balancing at concurrency 128 and 160, and set the cache-aware absolute balance threshold to 32 at concurrency 160."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 9d69bba002038db641493394ff53464ad942a6e8 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Wed, 26 Aug 2026 23:11:52 -0700
Subject: [PATCH 08/13] fix(dsv4): fit TP HiCache on NScale
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

将 TP8 HiCache 比例降至 2.75，同时保留 DEP8 比例 8，避免 NScale 1.7 TiB 主机内存上的 V4 分页池初始化失败。\n\n改用支持小数的比例上限检查，并在性能变更日志中记录实测的主机内存限制。
---
 .../single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh  | 12 ++++++++----
 perf-changelog.yaml                                  |  1 +
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index 92975bc6b..acf43eae6 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -67,11 +67,15 @@ if require_agentic_kv_offload_backend hicache; then
     # DeepSeek V4 HiCache currently rejects --hicache-size and supports
     # capacity control only through a host/device token-capacity ratio.
     # DSv4 exposes capacity as a host/device token ratio rather than bytes.
-    # B200 ratio=8 stays below the configured host-memory capacity for the
-    # currently supported TP8 shape.
-    DEFAULT_HICACHE_RATIO=8
+    # DEP8 shards the host pools and fits ratio=8 on NScale. The replicated
+    # TP8 pools need a lower ratio: 2.75 allocates about 121 GiB per rank and
+    # leaves startup headroom on the 1.7 TiB NScale hosts.
+    DEFAULT_HICACHE_RATIO=2.75
+    if [ "$DP_ATTENTION" = "true" ]; then
+        DEFAULT_HICACHE_RATIO=8
+    fi
     HICACHE_RATIO="${HICACHE_RATIO:-$DEFAULT_HICACHE_RATIO}"
-    if [ "$HICACHE_RATIO" -gt "$DEFAULT_HICACHE_RATIO" ]; then
+    if awk -v ratio="$HICACHE_RATIO" -v max="$DEFAULT_HICACHE_RATIO" 'BEGIN { exit !(ratio > max) }'; then
         echo "Error: HICACHE_RATIO=$HICACHE_RATIO exceeds configured limit $DEFAULT_HICACHE_RATIO" >&2
         exit 1
     fi
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index e44f26a59..789286687 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6585,4 +6585,5 @@
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
     - "Use mem-fraction-static 0.90 across every TP and DP profile. At concurrency 96, 128, and 160, use a 49152-token global chunked-prefill budget and CUDA graph maximum batch size 32 to preserve FP4-indexer workspace; additionally use total-requests DP balancing at concurrency 128 and 160, and set the cache-aware absolute balance threshold to 32 at concurrency 160."
+    - "Fit the HiCache tier to NScale host memory by using ratio 2.75 for replicated TP8 profiles and retaining ratio 8 for sharded DP8 profiles. Ratio 8 on TP8 requests about 351 GiB per rank and fails host-pool initialization on a 1.7 TiB NScale node; ratio 2.75 targets about 121 GiB per rank while leaving startup headroom."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 81f42bd235e0850d99ae3a58c6040db48cf2cf97 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Thu, 27 Aug 2026 04:33:48 -0700
Subject: [PATCH 09/13] fix(dsv4): restore c160 indexer headroom
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

将 B200 SGLang 并发 160 的 mem-fraction-static 从 0.90 降至 0.88，为 DeepSeek V4 FP4 indexer 的上下文相关工作区释放约 3.57 GiB HBM。\n\n保留其他并发点和 HiCache 比例不变，并更新现有性能变更日志说明。
---
 benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh | 4 ++++
 perf-changelog.yaml                                        | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index acf43eae6..c11e0d2d1 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -133,6 +133,10 @@ if [ "$DP_ATTENTION" = "true" ]; then
         export AIPERF_HTTP_X_DYNAMO_SESSION_ID_FROM_CORRELATION_ID=true
     fi
     if [ "$CONC" -eq 160 ]; then
+        # Leave enough HBM for the FP4 indexer's context-dependent workspace.
+        # At 0.90 the canonical NScale warmup had 3.68 GiB free when the
+        # indexer requested 5.27 GiB; 0.88 adds about 3.57 GiB of headroom.
+        MEM_FRACTION_STATIC=0.88
         PREFILL_DECODE_INTERVAL=20
         ROUTER_POLICY_ARGS+=(--balance-abs-threshold 32)
     fi
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 789286687..451e3c191 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6584,6 +6584,6 @@
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
-    - "Use mem-fraction-static 0.90 across every TP and DP profile. At concurrency 96, 128, and 160, use a 49152-token global chunked-prefill budget and CUDA graph maximum batch size 32 to preserve FP4-indexer workspace; additionally use total-requests DP balancing at concurrency 128 and 160, and set the cache-aware absolute balance threshold to 32 at concurrency 160."
+    - "Use mem-fraction-static 0.90 across every profile except concurrency 160, where 0.88 preserves FP4-indexer workspace: the canonical NScale warmup needed a 5.27 GiB allocation with only 3.68 GiB free at 0.90, while lowering the fraction adds about 3.57 GiB of HBM headroom. At concurrency 96, 128, and 160, use a 49152-token global chunked-prefill budget and CUDA graph maximum batch size 32; additionally use total-requests DP balancing at concurrency 128 and 160, and set the cache-aware absolute balance threshold to 32 at concurrency 160."
     - "Fit the HiCache tier to NScale host memory by using ratio 2.75 for replicated TP8 profiles and retaining ratio 8 for sharded DP8 profiles. Ratio 8 on TP8 requests about 351 GiB per rank and fails host-pool initialization on a 1.7 TiB NScale node; ratio 2.75 targets about 121 GiB per rank while leaving startup headroom."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 8d106517f173a14795ac13eae62fc0701b799fb8 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Thu, 27 Aug 2026 04:39:02 -0700
Subject: [PATCH 10/13] refactor(dsv4): unify DP workspace limits
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

将所有 B200 DP-attention 配置统一为每 rank 6144 token 的 chunked prefill 和 CUDA graph 最大 batch 32。\n\n移除并发 96/128/160 的重复条件分支，并同步更新现有性能变更日志。
---
 .../single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh | 13 ++++---------
 perf-changelog.yaml                                 |  2 +-
 2 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index c11e0d2d1..c9653f632 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -115,16 +115,11 @@ if [ "$DP_ATTENTION" = "true" ]; then
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_NUM_MAX_TOKENS_PER_RANK=8320
 
     PREFILL_DECODE_INTERVAL=24
-    # SGLang divides this global budget by dp_size. Conc 64 retains the
-    # validated 8192-token per-rank budget.
-    CHUNKED_PREFILL_SIZE=$((8192 * TP))
+    # SGLang divides this global budget by dp_size. Keep 6144 tokens per rank
+    # for every DP-attention profile so the FP4 indexer retains HBM headroom.
+    CHUNKED_PREFILL_SIZE=$((6144 * TP))
     SWA_FULL_TOKENS_RATIO=0.02
 
-    # Keep enough HBM workspace for the FP4 indexer at higher concurrency.
-    if [ "$CONC" -eq 96 ] || [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
-        CHUNKED_PREFILL_SIZE=$((6144 * TP))
-    fi
-
     # Conc 128/160 additionally use balanced DP admission and one-second load
     # snapshots.
     if [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
@@ -174,7 +169,7 @@ fi
 # Allow subagent fan-out to exceed CONC without clipping request bursts.
 MAX_RUNNING_REQUESTS=$((2 * CONC))
 CUDA_GRAPH_MAX_BS=$((2 * CONC))
-if [ "$DP_ATTENTION" = "true" ] && { [ "$CONC" -eq 96 ] || [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; }; then
+if [ "$DP_ATTENTION" = "true" ]; then
     CUDA_GRAPH_MAX_BS=32
 fi
 CUDA_GRAPH_ARGS=(--cuda-graph-max-bs "$CUDA_GRAPH_MAX_BS")
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 451e3c191..875802b4a 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6584,6 +6584,6 @@
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
-    - "Use mem-fraction-static 0.90 across every profile except concurrency 160, where 0.88 preserves FP4-indexer workspace: the canonical NScale warmup needed a 5.27 GiB allocation with only 3.68 GiB free at 0.90, while lowering the fraction adds about 3.57 GiB of HBM headroom. At concurrency 96, 128, and 160, use a 49152-token global chunked-prefill budget and CUDA graph maximum batch size 32; additionally use total-requests DP balancing at concurrency 128 and 160, and set the cache-aware absolute balance threshold to 32 at concurrency 160."
+    - "Use mem-fraction-static 0.90 across every profile except concurrency 160, where 0.88 preserves FP4-indexer workspace: the canonical NScale warmup needed a 5.27 GiB allocation with only 3.68 GiB free at 0.90, while lowering the fraction adds about 3.57 GiB of HBM headroom. Across every DP-attention profile, use a 49152-token global chunked-prefill budget and CUDA graph maximum batch size 32; additionally use total-requests DP balancing at concurrency 128 and 160, and set the cache-aware absolute balance threshold to 32 at concurrency 160."
     - "Fit the HiCache tier to NScale host memory by using ratio 2.75 for replicated TP8 profiles and retaining ratio 8 for sharded DP8 profiles. Ratio 8 on TP8 requests about 351 GiB per rank and fails host-pool initialization on a 1.7 TiB NScale node; ratio 2.75 targets about 121 GiB per rank while leaving startup headroom."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From ccd0056d6a36be5052e36e49457316d37e75e0a2 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Thu, 27 Aug 2026 08:22:18 -0700
Subject: [PATCH 11/13] refactor(dsv4): unify DEP8 request routing
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

在全部 B200 DEP8 并发点统一启用 total_requests、每秒负载快照和基于 correlation ID 的会话路由，并保留并发 160 的专用显存余量设置。
---
 .../agentic/dsv4_fp4_b200_sglang_mtp.sh       | 19 ++++++++-----------
 perf-changelog.yaml                           |  2 +-
 2 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
index c9653f632..e00ccbf0a 100755
--- a/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
+++ b/benchmarks/single_node/agentic/dsv4_fp4_b200_sglang_mtp.sh
@@ -115,18 +115,11 @@ if [ "$DP_ATTENTION" = "true" ]; then
     export SGLANG_OPT_DEEPGEMM_MEGA_MOE_NUM_MAX_TOKENS_PER_RANK=8320
 
     PREFILL_DECODE_INTERVAL=24
-    # SGLang divides this global budget by dp_size. Keep 6144 tokens per rank
-    # for every DP-attention profile so the FP4 indexer retains HBM headroom.
-    CHUNKED_PREFILL_SIZE=$((6144 * TP))
-    SWA_FULL_TOKENS_RATIO=0.02
 
-    # Conc 128/160 additionally use balanced DP admission and one-second load
-    # snapshots.
-    if [ "$CONC" -eq 128 ] || [ "$CONC" -eq 160 ]; then
-        PARALLEL_ARGS+=(--load-balance-method total_requests)
-        METRICS_ARGS+=(--load-snapshot-publish-interval 1)
-        export AIPERF_HTTP_X_DYNAMO_SESSION_ID_FROM_CORRELATION_ID=true
-    fi
+    # Keep DP admission and session routing uniform across the DEP8 curve.
+    PARALLEL_ARGS+=(--load-balance-method total_requests)
+    METRICS_ARGS+=(--load-snapshot-publish-interval 1)
+    export AIPERF_HTTP_X_DYNAMO_SESSION_ID_FROM_CORRELATION_ID=true
     if [ "$CONC" -eq 160 ]; then
         # Leave enough HBM for the FP4 indexer's context-dependent workspace.
         # At 0.90 the canonical NScale warmup had 3.68 GiB free when the
@@ -151,6 +144,10 @@ if [ "$DP_ATTENTION" = "true" ]; then
         --disable-shared-experts-fusion
         --disable-flashinfer-autotune
     )
+    # SGLang divides this global budget by dp_size. Keep 6144 tokens per rank
+    # for every DP-attention profile so the FP4 indexer retains HBM headroom.
+    CHUNKED_PREFILL_SIZE=$((6144 * TP))
+    SWA_FULL_TOKENS_RATIO=0.02
 else
     PARALLEL_ARGS+=(
         --moe-runner-backend flashinfer_mxfp4
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 875802b4a..4ae9d0080 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6584,6 +6584,6 @@
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
-    - "Use mem-fraction-static 0.90 across every profile except concurrency 160, where 0.88 preserves FP4-indexer workspace: the canonical NScale warmup needed a 5.27 GiB allocation with only 3.68 GiB free at 0.90, while lowering the fraction adds about 3.57 GiB of HBM headroom. Across every DP-attention profile, use a 49152-token global chunked-prefill budget and CUDA graph maximum batch size 32; additionally use total-requests DP balancing at concurrency 128 and 160, and set the cache-aware absolute balance threshold to 32 at concurrency 160."
+    - "Use mem-fraction-static 0.90 across every profile except concurrency 160, where 0.88 preserves FP4-indexer workspace: the canonical NScale warmup needed a 5.27 GiB allocation with only 3.68 GiB free at 0.90, while lowering the fraction adds about 3.57 GiB of HBM headroom. Across every DP-attention profile, use a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, total-requests DP balancing, one-second load snapshots, and correlation-ID session routing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
     - "Fit the HiCache tier to NScale host memory by using ratio 2.75 for replicated TP8 profiles and retaining ratio 8 for sharded DP8 profiles. Ratio 8 on TP8 requests about 351 GiB per rank and fails host-pool initialization on a 1.7 TiB NScale node; ratio 2.75 targets about 121 GiB per rank while leaving startup headroom."
   pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2718

From 24918be03b601eb93cff98e6e10535f40d52e299 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Thu, 27 Aug 2026 19:02:04 -0700
Subject: [PATCH 12/13] chore(dsv4): update B200 SGLang nightly image
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

将 B200 DSV4 SGLang AgentX 配置更新到 nightly-dev-20260827-20621aa1，并同步记录性能变更日志。
---
 configs/nvidia-master.yaml | 2 +-
 perf-changelog.yaml        | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/nvidia-master.yaml b/configs/nvidia-master.yaml
index 56d2171a1..e37e33533 100644
--- a/configs/nvidia-master.yaml
+++ b/configs/nvidia-master.yaml
@@ -929,7 +929,7 @@ dsv4-fp4-b200-sglang:
       - { tp: 8, ep: 8, dp-attn: true, conc-start: 256, conc-end: 1024 }
 
 dsv4-fp4-b200-sglang-agentic-hicache-mtp:
-  image: lmsysorg/sglang:dev-nightly-0820
+  image: lmsysorg/sglang:nightly-dev-20260827-20621aa1
   model: deepseek-ai/DeepSeek-V4-Pro
   model-prefix: dsv4
   runner: cluster:b200-nscale
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index 4ae9d0080..f2caf9dab 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6583,6 +6583,7 @@
     - agentic-coding
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
+    - "Update the SGLang image from lmsysorg/sglang:dev-nightly-0820 to lmsysorg/sglang:nightly-dev-20260827-20621aa1."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
     - "Use mem-fraction-static 0.90 across every profile except concurrency 160, where 0.88 preserves FP4-indexer workspace: the canonical NScale warmup needed a 5.27 GiB allocation with only 3.68 GiB free at 0.90, while lowering the fraction adds about 3.57 GiB of HBM headroom. Across every DP-attention profile, use a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, total-requests DP balancing, one-second load snapshots, and correlation-ID session routing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
     - "Fit the HiCache tier to NScale host memory by using ratio 2.75 for replicated TP8 profiles and retaining ratio 8 for sharded DP8 profiles. Ratio 8 on TP8 requests about 351 GiB per rank and fails host-pool initialization on a 1.7 TiB NScale node; ratio 2.75 targets about 121 GiB per rank while leaving startup headroom."

From 76398d3d05eb4827b449a7f4f3d39d8e861b5945 Mon Sep 17 00:00:00 2001
From: Po-Han Huang <pohanh@nvidia.com>
Date: Thu, 27 Aug 2026 22:21:20 -0700
Subject: [PATCH 13/13] chore(dsv4): roll back B200 SGLang nightly
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

将 B200 DSV4 SGLang AgentX 镜像回退到 nightly-dev-20260821-f825d729，以验证 c128 OOM 是否由较新的 nightly 引入。
---
 configs/nvidia-master.yaml | 2 +-
 perf-changelog.yaml        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/configs/nvidia-master.yaml b/configs/nvidia-master.yaml
index e37e33533..3a45428ce 100644
--- a/configs/nvidia-master.yaml
+++ b/configs/nvidia-master.yaml
@@ -929,7 +929,7 @@ dsv4-fp4-b200-sglang:
       - { tp: 8, ep: 8, dp-attn: true, conc-start: 256, conc-end: 1024 }
 
 dsv4-fp4-b200-sglang-agentic-hicache-mtp:
-  image: lmsysorg/sglang:nightly-dev-20260827-20621aa1
+  image: lmsysorg/sglang:nightly-dev-20260821-f825d729
   model: deepseek-ai/DeepSeek-V4-Pro
   model-prefix: dsv4
   runner: cluster:b200-nscale
diff --git a/perf-changelog.yaml b/perf-changelog.yaml
index f2caf9dab..469978457 100644
--- a/perf-changelog.yaml
+++ b/perf-changelog.yaml
@@ -6583,7 +6583,7 @@
     - agentic-coding
   description:
     - "Refresh the B200 SGLang AgentX curve with validated TP8/DP8/EP8 HiCache profiles at DP-attention concurrencies 64, 96, 128, and 160."
-    - "Update the SGLang image from lmsysorg/sglang:dev-nightly-0820 to lmsysorg/sglang:nightly-dev-20260827-20621aa1."
+    - "Use lmsysorg/sglang:nightly-dev-20260821-f825d729 for the B200 SGLang AgentX sweep."
     - "Scope cache-aware routing and --prefill-decode-interval to the DP-attention profiles: use interval 24 at concurrency 64, 96, and 128, and interval 20 at concurrency 160."
     - "Use mem-fraction-static 0.90 across every profile except concurrency 160, where 0.88 preserves FP4-indexer workspace: the canonical NScale warmup needed a 5.27 GiB allocation with only 3.68 GiB free at 0.90, while lowering the fraction adds about 3.57 GiB of HBM headroom. Across every DP-attention profile, use a 49152-token global chunked-prefill budget, CUDA graph maximum batch size 32, total-requests DP balancing, one-second load snapshots, and correlation-ID session routing; set the cache-aware absolute balance threshold to 32 at concurrency 160."
     - "Fit the HiCache tier to NScale host memory by using ratio 2.75 for replicated TP8 profiles and retaining ratio 8 for sharded DP8 profiles. Ratio 8 on TP8 requests about 351 GiB per rank and fails host-pool initialization on a 1.7 TiB NScale node; ratio 2.75 targets about 121 GiB per rank while leaving startup headroom."