diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 000000000..213cb932a --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,101 @@ +cmake_minimum_required(VERSION 3.20) +project(teaclave-sgx-sdk LANGUAGES C CXX) + +include(GNUInstallDirs) + +# ============================================================================= +# Options +# ============================================================================= +option(BUILD_SYSROOT "Build the SGX sysroot (trusted Rust rlibs)" ON) +option(BUILD_URTS "Build sgx_urts (untrusted runtime)" ON) + +set(SGX_TARGET "x86_64-unknown-linux-sgx" CACHE STRING + "Rust target triple for the SGX enclave") +set(SGX_SYSROOT_FEATURES "untrusted_fs;untrusted_time;net;thread" CACHE STRING + "Semicolon-separated std features to enable in the sysroot build") +set(SGX_SYSROOT_OUTPUT "" CACHE PATH + "Where to install the sysroot (default: /sysroot)") + +# ============================================================================= +# Derived paths +# ============================================================================= +set(SDK_ROOT ${CMAKE_CURRENT_SOURCE_DIR}) +set(TARGET_JSON ${SDK_ROOT}/rustlib/${SGX_TARGET}.json) + +if(SGX_SYSROOT_OUTPUT STREQUAL "") + set(SGX_SYSROOT_OUTPUT ${SDK_ROOT}/sysroot) +endif() + +if(CMAKE_BUILD_TYPE STREQUAL "Release") + set(CARGO_PROFILE_FLAG "--release") + set(CARGO_OUT_DIR "release") +else() + set(CARGO_PROFILE_FLAG "") + set(CARGO_OUT_DIR "debug") +endif() + +# Convert semicolon-separated list to comma-separated for cargo --features +string(REPLACE ";" "," SGX_SYSROOT_FEATURES_CSV "${SGX_SYSROOT_FEATURES}") + +# ============================================================================= +# Target: sgx_sysroot — builds trusted Rust rlibs for x86_64-unknown-linux-sgx +# ============================================================================= +if(BUILD_SYSROOT) + set(SYSROOT_STAMP ${CMAKE_CURRENT_BINARY_DIR}/sgx_sysroot.stamp) + set(SYSROOT_LIB_DIR ${SGX_SYSROOT_OUTPUT}/lib/rustlib/${SGX_TARGET}/lib) + + add_custom_command( + OUTPUT ${SYSROOT_STAMP} + COMMENT "Building SGX sysroot (${CARGO_OUT_DIR})..." + COMMAND cargo build ${CARGO_PROFILE_FLAG} + -Zbuild-std=core,alloc + -Zjson-target-spec + --target ${TARGET_JSON} + --features "${SGX_SYSROOT_FEATURES_CSV}" + COMMAND ${CMAKE_COMMAND} -E rm -rf ${SGX_SYSROOT_OUTPUT} + COMMAND ${CMAKE_COMMAND} -E make_directory ${SYSROOT_LIB_DIR} + COMMAND ${CMAKE_COMMAND} -E copy_directory + ${SDK_ROOT}/rustlib/std/target/${SGX_TARGET}/${CARGO_OUT_DIR}/deps + ${SYSROOT_LIB_DIR} + COMMAND ${CMAKE_COMMAND} -E touch ${SYSROOT_STAMP} + WORKING_DIRECTORY ${SDK_ROOT}/rustlib/std + VERBATIM + ) + + add_custom_target(sgx_sysroot + DEPENDS ${SYSROOT_STAMP} + ) + + # Convenience: expose the sysroot path so consumers can reference it + set(SGX_SYSROOT_PATH ${SGX_SYSROOT_OUTPUT} CACHE INTERNAL + "Path to the installed SGX sysroot") +endif() + +# ============================================================================= +# Target: sgx_urts_rust — builds untrusted runtime +# ============================================================================= +if(BUILD_URTS) + message(STATUS "sgx_urts_rust") + + set(SGX_URTS_OUTPUT ${SDK_ROOT}/sgx_urts/target/release/libsgx_urts.a) + add_custom_command( + OUTPUT ${SGX_URTS_OUTPUT} + COMMAND cargo build --release + WORKING_DIRECTORY ${SDK_ROOT}/sgx_urts + ) + + add_custom_target(sgx_urts_target + DEPENDS ${SGX_URTS_OUTPUT} + ) + + add_library(sgx_urts_rust STATIC IMPORTED GLOBAL) + add_dependencies(sgx_urts_rust sgx_urts_target) + + set_target_properties(sgx_urts_rust + PROPERTIES + IMPORTED_LOCATION "${SGX_URTS_OUTPUT}" + ) + + # IMPORTED libraries cannot be installed, so we just copy the files + install(FILES ${SGX_URTS_OUTPUT} DESTINATION ${CMAKE_INSTALL_LIBDIR}) +endif() diff --git a/buildenv.mk b/buildenv.mk index b324f03a7..b37c9085e 100644 --- a/buildenv.mk +++ b/buildenv.mk @@ -67,6 +67,10 @@ else COMMON_FLAGS += -fstack-protector-strong endif +ifdef _TD_MIGRATION + COMMON_FLAGS += -D_TD_MIGRATION +endif + COMMON_FLAGS += -ffunction-sections -fdata-sections # turn on compiler warnings as much as possible diff --git a/common/inc/internal/arch.h b/common/inc/internal/arch.h index 14585ad64..1d44e6271 100644 --- a/common/inc/internal/arch.h +++ b/common/inc/internal/arch.h @@ -99,7 +99,7 @@ flags definitions typedef struct _tcs_t { uint64_t reserved0; /* (0) */ - uint64_t flags; /* (8)bit 0: DBGOPTION */ + uint64_t flags; /* (8)bit 0: DBGOPTION, bit 1: AEXNOTIFY */ uint64_t ossa; /* (16)State Save Area */ uint32_t cssa; /* (24)Current SSA slot */ uint32_t nssa; /* (28)Number of SSA slots */ @@ -131,10 +131,14 @@ typedef struct _exit_info_t #define SE_VECTOR_BP 3 #define SE_VECTOR_BR 5 #define SE_VECTOR_UD 6 +#define SE_VECTOR_GP 13 +#define SE_VECTOR_PF 14 #define SE_VECTOR_MF 16 #define SE_VECTOR_AC 17 #define SE_VECTOR_XM 19 +#define SSA_AEXNOTIFY_MASK 0x1U /* Only set the first bit */ + typedef struct _ssa_gpr_t { REGISTER( ax); /* (0) */ @@ -153,16 +157,26 @@ typedef struct _ssa_gpr_t uint64_t r13; /* (104) */ uint64_t r14; /* (112) */ uint64_t r15; /* (120) */ - REGISTER(flags); /* (128) */ - REGISTER( ip); /* (136) */ - REGISTER( sp_u); /* (144) untrusted stack pointer. saved by EENTER */ - REGISTER( bp_u); /* (152) untrusted frame pointer. saved by EENTER */ + REGISTER(flags); /* (128) */ + REGISTER( ip); /* (136) */ + REGISTER( sp_u); /* (144) untrusted stack pointer. saved by EENTER */ + REGISTER( bp_u); /* (152) untrusted frame pointer. saved by EENTER */ exit_info_t exit_info; /* (160) contain information for exits */ - uint32_t reserved; /* (164) padding to multiple of 8 bytes */ + uint8_t reserved[3]; /* (164) padding */ + uint8_t aex_notify; /* (167) AEX Notify */ uint64_t fs; /* (168) FS register */ uint64_t gs; /* (176) GS register */ } ssa_gpr_t; +typedef struct _misc_exinfo +{ + uint64_t maddr; // address for #PF, #GP. + uint32_t errcd; + uint32_t reserved; +} misc_exinfo_t; + +#define MISC_BYTE_SIZE sizeof(misc_exinfo_t) + typedef uint64_t si_flags_t; #define SI_FLAG_NONE 0x0 diff --git a/common/inc/internal/inst.h b/common/inc/internal/inst.h index 4f2b35756..e7baa7959 100644 --- a/common/inc/internal/inst.h +++ b/common/inc/internal/inst.h @@ -46,7 +46,10 @@ typedef enum { SE_ERESUME, SE_EEXIT, SE_EACCEPT, + SE_EMODPE, + SE_EACCEPTCOPY, SE_EVERIFYREPORT2 = 0x8, + SE_EDECCSSA = 0x9, SE_LAST_RING3, SE_ECREATE = 0x0, diff --git a/common/inc/internal/metadata.h b/common/inc/internal/metadata.h index 1968576c2..303052f7c 100644 --- a/common/inc/internal/metadata.h +++ b/common/inc/internal/metadata.h @@ -36,10 +36,10 @@ #pragma pack(1) /* version of metadata */ -#define MAJOR_VERSION 2 //MAJOR_VERSION should not larger than 0ffffffff -#define MINOR_VERSION 4 //MINOR_VERSION should not larger than 0ffffffff +#define MAJOR_VERSION 3 //MAJOR_VERSION should not larger than 0ffffffff +#define MINOR_VERSION 0 //MINOR_VERSION should not larger than 0ffffffff -#define SGX_2_ELRANGE_MAJOR_VERSION 12 +#define SGX_2_ELRANGE_MAJOR_VERSION 13 #define SGX_1_ELRANGE_MAJOR_VERSION 11 #define SGX_MAJOR_VERSION_GAP 10 @@ -71,18 +71,17 @@ #define TCS_POLICY_BIND 0x00000000 /* If set, the TCS is bound to the application thread */ #define TCS_POLICY_UNBIND 0x00000001 -#define MAX_SAVE_BUF_SIZE 2632 - #define TCS_NUM_MIN 1 #define SSA_NUM_MIN 2 #define SSA_FRAME_SIZE_MIN 1 -#define SSA_FRAME_SIZE_MAX 2 +#define SSA_FRAME_SIZE_MAX 4 #define STACK_SIZE_MIN 0x0002000 /* 8 KB */ #define STACK_SIZE_MAX 0x0040000 /* 256 KB */ #define HEAP_SIZE_MIN 0x0001000 /* 4 KB */ #define HEAP_SIZE_MAX 0x1000000 /* 16 MB */ #define RSRV_SIZE_MIN 0x0000000 /* 0 KB */ #define RSRV_SIZE_MAX 0x0000000 /* 0 KB */ +#define USER_REGION_SIZE 0x0000000 /* 0 KB */ #define DEFAULT_MISC_SELECT 0 #define DEFAULT_MISC_MASK 0xFFFFFFFF #define ISVFAMILYID_MAX 0xFFFFFFFFFFFFFFFFULL @@ -127,6 +126,7 @@ typedef enum #define LAYOUT_ID_RSRV_MIN (20) #define LAYOUT_ID_RSRV_INIT (21) #define LAYOUT_ID_RSRV_MAX (22) +#define LAYOUT_ID_USER_REGION (23) extern const char * layout_id_str[]; diff --git a/common/inc/sgx_attributes.h b/common/inc/sgx_attributes.h index 4f5e18008..b9be439cf 100644 --- a/common/inc/sgx_attributes.h +++ b/common/inc/sgx_attributes.h @@ -40,16 +40,20 @@ #define SGX_FLAGS_MODE64BIT 0x0000000000000004ULL /* If set, then the enclave is 64 bit */ #define SGX_FLAGS_PROVISION_KEY 0x0000000000000010ULL /* If set, then the enclave has access to provision key */ #define SGX_FLAGS_EINITTOKEN_KEY 0x0000000000000020ULL /* If set, then the enclave has access to EINITTOKEN key */ -#define SGX_FLAGS_KSS 0x0000000000000080ULL /* If set enclave uses KSS */ +#define SGX_FLAGS_KSS 0x0000000000000080ULL /* If set, then the enclave uses KSS */ +#define SGX_FLAGS_AEX_NOTIFY 0x0000000000000400ULL /* If set, then the enclave enables AEX Notify */ + +#define SGX_FLAGS_NON_CHECK_BITS 0x00FF000000000000ULL /* BIT[55-48] will not be checked */ /* XSAVE Feature Request Mask */ #define SGX_XFRM_LEGACY 0x0000000000000003ULL /* Legacy XFRM which includes the basic feature bits required by SGX, x87 state(0x01) and SSE state(0x02) */ #define SGX_XFRM_AVX 0x0000000000000006ULL /* AVX XFRM which includes AVX state(0x04) and SSE state(0x02) required by AVX */ -#define SGX_XFRM_AVX512 0x00000000000000E6ULL /* AVX-512 XFRM - not supported */ +#define SGX_XFRM_AVX512 0x00000000000000E6ULL /* AVX-512 XFRM */ #define SGX_XFRM_MPX 0x0000000000000018ULL /* MPX XFRM - not supported */ #define SGX_XFRM_PKRU 0x0000000000000200ULL /* PKRU state */ +#define SGX_XFRM_AMX 0x0000000000060000ULL /* AMX XFRM, including XTILEDATA(0x40000) and XTILECFG(0x20000) */ -#define SGX_XFRM_RESERVED (~(SGX_XFRM_LEGACY | SGX_XFRM_AVX | SGX_XFRM_AVX512 | SGX_XFRM_PKRU)) +#define SGX_XFRM_RESERVED (~(SGX_XFRM_LEGACY | SGX_XFRM_AVX | SGX_XFRM_AVX512 | SGX_XFRM_PKRU | SGX_XFRM_AMX)) typedef struct _attributes_t { @@ -57,7 +61,9 @@ typedef struct _attributes_t uint64_t xfrm; } sgx_attributes_t; -/* define MISCSELECT - all bits are currently reserved */ +/* Define MISCSELECT + * bit 0: EXINFO + * bit 31-1: reserved(0) */ typedef uint32_t sgx_misc_select_t; typedef struct _sgx_misc_attribute_t { diff --git a/common/inc/sgx_report2.h b/common/inc/sgx_report2.h index 14f764232..355bee8a9 100644 --- a/common/inc/sgx_report2.h +++ b/common/inc/sgx_report2.h @@ -36,6 +36,8 @@ #ifndef _SGX_REPORT2_H_ #define _SGX_REPORT2_H_ +#include + #define TEE_HASH_384_SIZE 48 /* SHA384 */ #define TEE_MAC_SIZE 32 /* Message SHA 256 HASH Code - 32 bytes */ @@ -67,6 +69,7 @@ typedef struct _tee_attributes_t #define TEE_REPORT2_TYPE 0x81 /* TEE Report Type2 */ #define TEE_REPORT2_SUBTYPE 0x0 /* SUBTYPE for Report Type2 is 0 */ #define TEE_REPORT2_VERSION 0x0 /* VERSION for Report Type2 is 0 */ +#define TEE_REPORT2_VERSION_SERVICETD 0x1 /* VERSION for Report Type2 which mr_servicetd is used */ typedef struct _tee_report_type_t { uint8_t type; /* Trusted Execution Environment(TEE) type: diff --git a/common/inc/sgx_tprotected_fs.h b/common/inc/sgx_tprotected_fs.h index cd90b921a..568387b8f 100644 --- a/common/inc/sgx_tprotected_fs.h +++ b/common/inc/sgx_tprotected_fs.h @@ -107,6 +107,28 @@ SGX_FILE* SGXAPI sgx_fopen_auto_key(const char* filename, const char* mode); */ SGX_FILE* SGXAPI sgx_fopen_integrity_only(const char* filename, const char* mode); +/* sgx_fopen_ex + * Purpose: Expert version of sgx_fopen/sgx_fopen_auto_key which is used if you want to control the internal `cache size`. + * The specified `cache size` must be page (4KB by default) aligned. + * Note that `sgx_fexport_auto_key` and `sgx_fimport_auto_key` don't support configuring `cache_size` right now + * + * Parameters: + * filename - [IN] the name of the file to open/create. + * mode - [IN] open mode. only supports 'r' or 'w' or 'a' (one and only one of them must be present), and optionally 'b' and/or '+'. + * key - [IN] encryption key that will be used for the file encryption. + * If it's NULL, we will swtich back to `sgx_fopen_auto_key and use enclave's seal key to protect the file + * NOTE - the key is actually used as a KDK (key derivation key) and only for the meta-data node, and not used directly for the encryption of any part of the file + * this is important in order to prevent hitting the key wear-out problem, and some other issues with GCM encryptions using the same key + * cache_size - [IN] Internal cache size in byte, which used to cache R/W data in enclave before flush to actual file + * It must larger than default cache size (192KB), and must be page (4KB by default) aligned + * a) Please make sure enclave heap is enough for the `cache`, e.g. Configure enough heap in enclave config file + * b) All the data in cache may lost after exeception, please try to call `sgx_fflush` explicitly to avoid data loss + * + * Return value: + * SGX_FILE* - pointer to the newly created file handle, NULL if an error occurred - check errno for the error code. +*/ +SGX_FILE* SGXAPI sgx_fopen_ex(const char* filename, const char* mode, const sgx_key_128bit_t *key, const uint16_t key_policy, const uint64_t cache_size); + /* sgx_fwrite * Purpose: write data to a file (see c++ fwrite documentation for more details). * @@ -276,7 +298,7 @@ int32_t SGXAPI sgx_fexport_auto_key(const char* filename, sgx_key_128bit_t *key) * Return value: * int32_t - result, 0 - success, 1 - there was an error, check errno for the error code */ -int32_t SGXAPI sgx_fimport_auto_key(const char* filename, const sgx_key_128bit_t *key); +int32_t SGXAPI sgx_fimport_auto_key(const char* filename, const sgx_key_128bit_t *key, const uint16_t key_policy); /* sgx_fclear_cache @@ -316,7 +338,7 @@ int32_t SGXAPI sgx_fget_mac(SGX_FILE* stream, sgx_aes_gcm_128bit_tag_t* mac); * Return value: * int32_t - result, 0 - success, -1 - there was an error, check sgx_ferror for error code */ -int32_t SGXAPI sgx_rename_meta(SGX_FILE* stream, const char* old_name, const char* new_name); +int32_t SGXAPI sgx_frename(SGX_FILE* stream, const char* old_name, const char* new_name); #ifdef __cplusplus } diff --git a/common/inc/sgx_trts_aex.h b/common/inc/sgx_trts_aex.h new file mode 100644 index 000000000..ea28ffc0a --- /dev/null +++ b/common/inc/sgx_trts_aex.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + + +/** + * File: sgx_trts_aex.h + * Description: + * Header file for aex notify handling APIs. + */ + +#ifndef _SGX_TRTS_AEX_H_ +#define _SGX_TRTS_AEX_H_ + +#include +#include +#include "sgx_defs.h" +#include "sgx_trts_exception.h" +#include "sgx_error.h" + +typedef void (*sgx_aex_mitigation_fn_t)(const sgx_exception_info_t *info, const void * args); + +typedef struct _aex_mitigation_node_t +{ + sgx_aex_mitigation_fn_t handler; + const void *args; + struct _aex_mitigation_node_t * next; +} sgx_aex_mitigation_node_t; + + +#ifdef __cplusplus +extern "C" { +#endif + +/* sgx_set_ssa_aexnotify() + * Parameters: + * flag - 0 to disable AEX-Notify + * non-zero to enable AEX-Notify + * Return Value: + * SGX_SUCCESS - success + * SGX_ERROR_UNEXPECTED - unexpected error + */ +sgx_status_t SGXAPI sgx_set_ssa_aexnotify(int flag); + + +/* sgx_register_aex_handler() + * Parameters: + * aex_node - A pointer to an AEX mitigation node. The mitigation node must exist and be valid until it is unregistered. + * handler - A function handler to call after being notified of an AEX + * args - Arguments to pass to the handler + * Return Value: + * SGX_SUCCESS - success + * SGX_ERROR_INVALID_PARAMETER - aex_node or handler are NULL + */ +sgx_status_t SGXAPI sgx_register_aex_handler(sgx_aex_mitigation_node_t *aex_node, sgx_aex_mitigation_fn_t handler, const void *args); + +/* sgx_unregister_aex_handler() + * Parameters: + * handler - A function handler that was previously registered + * Return Value: + * SGX_SUCCESS - success + * SGX_ERROR_INVALID_PARAMETER - handler was NULL or has not been previously registered + * SGX_ERROR_UNEXPECTED - There currently are no registered handlers + */ +sgx_status_t SGXAPI sgx_unregister_aex_handler(sgx_aex_mitigation_fn_t handler); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/common/inc/sgx_trts_exception.h b/common/inc/sgx_trts_exception.h index c47dccca9..6990f55ae 100644 --- a/common/inc/sgx_trts_exception.h +++ b/common/inc/sgx_trts_exception.h @@ -106,11 +106,29 @@ typedef struct _cpu_context_t } sgx_cpu_context_t; #endif +typedef struct _exinfo_t +{ + uint64_t faulting_address; + uint32_t error_code; + uint32_t reserved; +}sgx_misc_exinfo_t; + + __attribute__((aligned(64))) typedef struct _exception_info_t { sgx_cpu_context_t cpu_context; sgx_exception_vector_t exception_vector; sgx_exception_type_t exception_type; + sgx_misc_exinfo_t exinfo; + uint32_t exception_valid; + uint32_t do_aex_mitigation; + uint64_t xsave_size; +#if defined (_M_X64) || defined (__x86_64__) + uint64_t reserved[1]; +#else + uint64_t reserved[6]; +#endif + uint8_t xsave_area[0]; // 64-byte aligned } sgx_exception_info_t; typedef int (*sgx_exception_handler_t)(sgx_exception_info_t *info); diff --git a/common/inc/tlibc/stdalign.h b/common/inc/tlibc/stdalign.h new file mode 100644 index 000000000..380a0f1c2 --- /dev/null +++ b/common/inc/tlibc/stdalign.h @@ -0,0 +1,14 @@ +#ifndef _STDALIGN_H +#define _STDALIGN_H +#ifndef __cplusplus +/* this whole header only works in C11 or with compiler extensions */ +#if __STDC_VERSION__ < 201112L && defined( __GNUC__) +#define _Alignas(t) __attribute__((__aligned__(t))) +#define _Alignof(t) __alignof__(t) +#endif +#define alignas _Alignas +#define alignof _Alignof +#endif +#define __alignas_is_defined 1 +#define __alignof_is_defined 1 +#endif diff --git a/common/inc/tlibc/stdlib.h b/common/inc/tlibc/stdlib.h index b4019e6e9..9e839fd5f 100644 --- a/common/inc/tlibc/stdlib.h +++ b/common/inc/tlibc/stdlib.h @@ -99,6 +99,8 @@ long _TLIBC_CDECL_ labs(long); ldiv_t _TLIBC_CDECL_ ldiv(long, long); void * _TLIBC_CDECL_ malloc(size_t); void * _TLIBC_CDECL_ memalign(size_t, size_t); +int _TLIBC_CDECL_ posix_memalign(void **, size_t, size_t); +void * _TLIBC_CDECL_ aligned_alloc(size_t, size_t); void _TLIBC_CDECL_ qsort(void *, size_t, size_t, int (*)(const void *, const void *)); void * _TLIBC_CDECL_ realloc(void *, size_t); double _TLIBC_CDECL_ strtod(const char *, char **); diff --git a/rust-toolchain b/rust-toolchain index 33cc62763..000156feb 100644 --- a/rust-toolchain +++ b/rust-toolchain @@ -1 +1 @@ -nightly-2023-11-17 +nightly-2026-06-21 diff --git a/rustlib/panic_abort/src/lib.rs b/rustlib/panic_abort/src/lib.rs index 99b10fdb3..d56a6041e 100644 --- a/rustlib/panic_abort/src/lib.rs +++ b/rustlib/panic_abort/src/lib.rs @@ -14,7 +14,6 @@ #![feature(std_internals)] #![feature(staged_api)] #![feature(rustc_attrs)] -#![feature(c_unwind)] extern crate sgx_trts; @@ -22,7 +21,7 @@ use core::any::Any; use core::panic::PanicPayload; /// # Safety -#[rustc_std_internal_symbol] +#[no_mangle] #[allow(improper_ctypes_definitions)] pub unsafe extern "C" fn __rust_panic_cleanup(_: *mut u8) -> *mut (dyn Any + Send + 'static) { unreachable!() @@ -30,7 +29,7 @@ pub unsafe extern "C" fn __rust_panic_cleanup(_: *mut u8) -> *mut (dyn Any + Sen /// # Safety // "Leak" the payload and shim to the relevant abort on the platform in question. -#[rustc_std_internal_symbol] +#[no_mangle] pub unsafe fn __rust_start_panic(_payload: &mut dyn PanicPayload) -> u32 { sgx_trts::error::abort(); } diff --git a/rustlib/panic_unwind/src/lib.rs b/rustlib/panic_unwind/src/lib.rs index 60d7af26f..e2feda5fa 100644 --- a/rustlib/panic_unwind/src/lib.rs +++ b/rustlib/panic_unwind/src/lib.rs @@ -14,15 +14,12 @@ #![no_std] #![unstable(feature = "panic_unwind", issue = "32837")] #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] -#![feature(core_intrinsics)] -#![feature(lang_items)] #![feature(panic_unwind)] #![feature(staged_api)] #![feature(std_internals)] #![feature(rustc_attrs)] #![panic_runtime] #![feature(panic_runtime)] -#![feature(c_unwind)] #![allow(internal_features)] extern crate alloc; @@ -45,7 +42,7 @@ extern "C" { } /// # Safety -#[rustc_std_internal_symbol] +#[no_mangle] #[allow(improper_ctypes_definitions)] pub unsafe extern "C" fn __rust_panic_cleanup(payload: *mut u8) -> *mut (dyn Any + Send + 'static) { Box::into_raw(imp::cleanup(payload)) @@ -54,7 +51,7 @@ pub unsafe extern "C" fn __rust_panic_cleanup(payload: *mut u8) -> *mut (dyn Any /// # Safety // Entry point for raising an exception, just delegates to the platform-specific // implementation. -#[rustc_std_internal_symbol] +#[no_mangle] pub unsafe fn __rust_start_panic(payload: &mut dyn PanicPayload) -> u32 { let payload = Box::from_raw(payload.take_box()); diff --git a/rustlib/std/Cargo.toml b/rustlib/std/Cargo.toml index 6ede65f1f..d8b32ddf1 100644 --- a/rustlib/std/Cargo.toml +++ b/rustlib/std/Cargo.toml @@ -44,6 +44,7 @@ unsupported_process = [] panic-unwind = ["panic_unwind"] profiler = ["profiler_builtins"] capi = ["sgx_sync/capi", "sgx_rsrvmm/capi"] +unit_test = [] [dependencies] sgx_alloc = { path = "../../sgx_alloc" } diff --git a/rustlib/x86_64-sgx_sdk-linux-sgx.json b/rustlib/x86_64-sgx_sdk-linux-sgx.json new file mode 100644 index 000000000..5d456deec --- /dev/null +++ b/rustlib/x86_64-sgx_sdk-linux-sgx.json @@ -0,0 +1,46 @@ +{ + "abi": "sgx_sdk", + "arch": "x86_64", + "cpu": "x86-64", + "crt-static-respected": true, + "data-layout": "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128", + "dynamic-linking": true, + "env": "gnu", + "executables": true, + "has-rpath": true, + "has-thread-local": true, + "linker-flavor": "gcc", + "linker-is-gnu": true, + "llvm-target": "x86_64-unknown-linux-gnu", + "max-atomic-width": 64, + "os": "linux", + "position-independent-executables": true, + "pre-link-args": { + "gcc": [ + "-Wl,--as-needed", + "-Wl,-z,noexecstack", + "-m64" + ] + }, + "relro-level": "full", + "stack-probes": { + "kind": "inline-or-call", + "min-llvm-version-for-inline": [ + 11, + 0, + 1 + ] + }, + "supported-sanitizers": [ + "address", + "cfi", + "leak", + "memory", + "thread" + ], + "target-c-int-width": "32", + "target-endian": "little", + "target-family": "unix", + "target-pointer-width": "64", + "vendor": "teaclave" +} diff --git a/rustlib/x86_64-unknown-linux-sgx.json b/rustlib/x86_64-unknown-linux-sgx.json index ece4b8eef..5eb422246 100644 --- a/rustlib/x86_64-unknown-linux-sgx.json +++ b/rustlib/x86_64-unknown-linux-sgx.json @@ -2,7 +2,7 @@ "arch": "x86_64", "cpu": "x86-64", "crt-static-respected": true, - "data-layout": "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", + "data-layout": "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128", "dynamic-linking": true, "env": "gnu", "executables": true, @@ -37,9 +37,9 @@ "memory", "thread" ], - "target-c-int-width": "32", + "target-c-int-width": 32, "target-endian": "little", "target-family": "unix", - "target-pointer-width": "64", + "target-pointer-width": 64, "vendor": "teaclave" } diff --git a/sgx_alloc/src/lib.rs b/sgx_alloc/src/lib.rs index 3a4bfafad..677fb0457 100644 --- a/sgx_alloc/src/lib.rs +++ b/sgx_alloc/src/lib.rs @@ -26,8 +26,8 @@ #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] #![allow(clippy::missing_safety_doc)] #![allow(non_camel_case_types)] +#![allow(internal_features)] #![feature(allocator_api)] -#![feature(alloc_layout_extra)] #![feature(core_intrinsics)] #![feature(dropck_eyepatch)] #![feature(ptr_internals)] diff --git a/sgx_alloc/src/system.rs b/sgx_alloc/src/system.rs index 532699579..3d8e3900e 100644 --- a/sgx_alloc/src/system.rs +++ b/sgx_alloc/src/system.rs @@ -36,7 +36,7 @@ impl System { #[inline] fn alloc_impl(&self, layout: Layout, zeroed: bool) -> Result, AllocError> { match layout.size() { - 0 => Ok(NonNull::slice_from_raw_parts(layout.dangling(), 0)), + 0 => Ok(NonNull::slice_from_raw_parts(layout.dangling_ptr(), 0)), // SAFETY: `layout` is non-zero in size, size => unsafe { let raw_ptr = if zeroed { @@ -159,7 +159,7 @@ unsafe impl Allocator for System { // SAFETY: conditions must be upheld by the caller 0 => { Allocator::deallocate(&self, ptr, old_layout); - Ok(NonNull::slice_from_raw_parts(new_layout.dangling(), 0)) + Ok(NonNull::slice_from_raw_parts(new_layout.dangling_ptr(), 0)) } // SAFETY: `new_size` is non-zero. Other conditions must be upheld by the caller diff --git a/sgx_build_helper/download_prebuilt/download_prebuilt.sh b/sgx_build_helper/download_prebuilt/download_prebuilt.sh index 22fcfdc75..613acf1c4 100755 --- a/sgx_build_helper/download_prebuilt/download_prebuilt.sh +++ b/sgx_build_helper/download_prebuilt/download_prebuilt.sh @@ -20,9 +20,9 @@ set -e # change this on every release -optlibs_name=optimized_libs_2.17.tar.gz -checksum_file_name=SHA256SUM_prebuilt_2.17.cfg -server_url_path=https://download.01.org/intel-sgx/sgx-linux/2.17 +optlibs_name=optimized_libs_2.20.tar.gz +checksum_file_name=SHA256SUM_prebuilt_2.20.cfg +server_url_path=https://download.01.org/intel-sgx/sgx-linux/2.20 # unlikely to change unless opt lib structure changes top_dir=$(dirname "$(realpath "$0")") diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/Makefile b/sgx_crypto/sgx_crypto_sys/tcrypto/Makefile index f99e2e98d..d4c1b6865 100644 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/Makefile +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/Makefile @@ -77,7 +77,7 @@ CFLAGS += $(CPPFLAGS) $(ENCLAVE_CFLAGS) $(SGX_COMMON_FLAGS) -Werror -fno-excepti OBJ += sgx_tcrypto_common.o sgx_rsa_internal.o SRCDIR := ipp -DISPDIR := $(SRCDIR)/ipp_disp +DISPDIR := $(SRCDIR)/ipp_disp/intel64 LIB_NAME := libsgx_tcrypto_ipp.a diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippcpGetLibVersion.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippcpGetLibVersion.c new file mode 100644 index 000000000..fe4bb3f3f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippcpGetLibVersion.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppLibraryVersion*, k1_ippcpGetLibVersion, (void) ) +IPPAPI( const IppLibraryVersion*, l9_ippcpGetLibVersion, (void) ) +IPPAPI( const IppLibraryVersion*, y8_ippcpGetLibVersion, (void) ) + +IPPFUN( const IppLibraryVersion*, sgx_disp_ippcpGetLibVersion, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippcpGetLibVersion( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippcpGetLibVersion( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippcpGetLibVersion( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC.c new file mode 100644 index 000000000..ff36a5999 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS1.c new file mode 100644 index 000000000..45701bffc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS2.c new file mode 100644 index 000000000..0c0a6b7c7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS3.c new file mode 100644 index 000000000..bd1256849 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCBC_CS3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCFB.c new file mode 100644 index 000000000..08f5b9e6b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCTR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCTR.c new file mode 100644 index 000000000..ee3edd2ea --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptCTR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, l9_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, y8_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptECB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptECB.c new file mode 100644 index 000000000..66bb3701a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptECB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) +IPPAPI(IppStatus, l9_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) +IPPAPI(IppStatus, y8_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptOFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptOFB.c new file mode 100644 index 000000000..8724414c4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptOFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptXTS_Direct.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptXTS_Direct.c new file mode 100644 index 000000000..a8bf50ebb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESDecryptXTS_Direct.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) +IPPAPI(IppStatus, l9_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) +IPPAPI(IppStatus, y8_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC.c new file mode 100644 index 000000000..6d7ae7985 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS1.c new file mode 100644 index 000000000..8691fa94a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS2.c new file mode 100644 index 000000000..293f64551 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS3.c new file mode 100644 index 000000000..a88d463d3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCBC_CS3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCFB.c new file mode 100644 index 000000000..1a664f91e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCTR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCTR.c new file mode 100644 index 000000000..a0b318416 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptCTR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, l9_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, y8_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptECB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptECB.c new file mode 100644 index 000000000..071d7f559 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptECB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) +IPPAPI(IppStatus, l9_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) +IPPAPI(IppStatus, y8_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptOFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptOFB.c new file mode 100644 index 000000000..b1cca949f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptOFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptXTS_Direct.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptXTS_Direct.c new file mode 100644 index 000000000..089bbf9fd --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESEncryptXTS_Direct.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) +IPPAPI(IppStatus, l9_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) +IPPAPI(IppStatus, y8_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESGetSize.c new file mode 100644 index 000000000..5f2f2e5be --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESGetSize,(int *pSize)) +IPPAPI(IppStatus, l9_ippsAESGetSize,(int *pSize)) +IPPAPI(IppStatus, y8_ippsAESGetSize,(int *pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESGetSize,(int *pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESInit.c new file mode 100644 index 000000000..1eafc8180 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) +IPPAPI(IppStatus, l9_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) +IPPAPI(IppStatus, y8_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESPack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESPack.c new file mode 100644 index 000000000..eb016f608 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESPack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, l9_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, y8_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESPack( pCtx, pBuffer, bufSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESPack( pCtx, pBuffer, bufSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESPack( pCtx, pBuffer, bufSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESSetKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESSetKey.c new file mode 100644 index 000000000..ed5903b24 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESSetKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) +IPPAPI(IppStatus, l9_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) +IPPAPI(IppStatus, y8_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESSetKey( pKey, keyLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESSetKey( pKey, keyLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESSetKey( pKey, keyLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESSetupNoise.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESSetupNoise.c new file mode 100644 index 000000000..166c24e36 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESSetupNoise.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESSetupNoise,(Ipp32u noiseLevel, IppsAESSpec* pCtx)) +IPPAPI(IppStatus, l9_ippsAESSetupNoise,(Ipp32u noiseLevel, IppsAESSpec* pCtx)) +IPPAPI(IppStatus, y8_ippsAESSetupNoise,(Ipp32u noiseLevel, IppsAESSpec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsAESSetupNoise,(Ipp32u noiseLevel, IppsAESSpec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESSetupNoise( noiseLevel, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESSetupNoise( noiseLevel, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESSetupNoise( noiseLevel, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESUnpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESUnpack.c new file mode 100644 index 000000000..9dff7b8ad --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAESUnpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) +IPPAPI(IppStatus, l9_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) +IPPAPI(IppStatus, y8_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAESUnpack( pBuffer, pCtx, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAESUnpack( pBuffer, pCtx, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAESUnpack( pBuffer, pCtx, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMDecrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMDecrypt.c new file mode 100644 index 000000000..1354e65ce --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMDecrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMEncrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMEncrypt.c new file mode 100644 index 000000000..26ccc56cf --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMEncrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMGetSize.c new file mode 100644 index 000000000..17657fa30 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMGetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsAES_CCMGetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsAES_CCMGetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMGetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMGetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMGetTag.c new file mode 100644 index 000000000..24f213836 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMGetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMGetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMGetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMGetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMInit.c new file mode 100644 index 000000000..ab83f2288 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) +IPPAPI(IppStatus, l9_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) +IPPAPI(IppStatus, y8_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMMessageLen.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMMessageLen.c new file mode 100644 index 000000000..15d72dce7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMMessageLen.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMMessageLen( msgLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMMessageLen( msgLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMMessageLen( msgLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMStart.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMStart.c new file mode 100644 index 000000000..e6d525988 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMStart.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMTagLen.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMTagLen.c new file mode 100644 index 000000000..a8d729bb6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CCMTagLen.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CCMTagLen( tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CCMTagLen( tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CCMTagLen( tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACFinal.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACFinal.c new file mode 100644 index 000000000..fcac840ec --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACFinal.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CMACFinal( pMD, mdLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CMACFinal( pMD, mdLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CMACFinal( pMD, mdLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACGetSize.c new file mode 100644 index 000000000..7dd0ef21d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CMACGetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsAES_CMACGetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsAES_CMACGetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CMACGetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CMACGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CMACGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CMACGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACGetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACGetTag.c new file mode 100644 index 000000000..6e44435ed --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACGetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CMACGetTag( pMD, mdLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CMACGetTag( pMD, mdLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CMACGetTag( pMD, mdLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACInit.c new file mode 100644 index 000000000..3a6fbd3be --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) +IPPAPI(IppStatus, l9_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) +IPPAPI(IppStatus, y8_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACSetupNoise.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACSetupNoise.c new file mode 100644 index 000000000..4ad9b1b60 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACSetupNoise.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CMACSetupNoise,(Ipp32u noiseLevel, IppsAES_CMACState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CMACSetupNoise,(Ipp32u noiseLevel, IppsAES_CMACState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CMACSetupNoise,(Ipp32u noiseLevel, IppsAES_CMACState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CMACSetupNoise,(Ipp32u noiseLevel, IppsAES_CMACState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CMACSetupNoise( noiseLevel, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CMACSetupNoise( noiseLevel, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CMACSetupNoise( noiseLevel, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACUpdate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACUpdate.c new file mode 100644 index 000000000..addc2b229 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_CMACUpdate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) +IPPAPI(IppStatus, l9_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) +IPPAPI(IppStatus, y8_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_CMACUpdate( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_CMACUpdate( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_CMACUpdate( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_EncryptCFB16_MB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_EncryptCFB16_MB.c new file mode 100644 index 000000000..588d85cfb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_EncryptCFB16_MB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) +IPPAPI(IppStatus, l9_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) +IPPAPI(IppStatus, y8_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMDecrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMDecrypt.c new file mode 100644 index 000000000..fc11d7249 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMDecrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMEncrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMEncrypt.c new file mode 100644 index 000000000..ee71f6fdb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMEncrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMGetSize.c new file mode 100644 index 000000000..80f0b3b17 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMGetSize,(int * pSize)) +IPPAPI(IppStatus, l9_ippsAES_GCMGetSize,(int * pSize)) +IPPAPI(IppStatus, y8_ippsAES_GCMGetSize,(int * pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMGetSize,(int * pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMGetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMGetTag.c new file mode 100644 index 000000000..9d03d278a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMGetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMInit.c new file mode 100644 index 000000000..f31d1cb9b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) +IPPAPI(IppStatus, l9_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) +IPPAPI(IppStatus, y8_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMProcessAAD.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMProcessAAD.c new file mode 100644 index 000000000..2a4bd0201 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMProcessAAD.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMProcessAAD( pAAD, aadLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMProcessAAD( pAAD, aadLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMProcessAAD( pAAD, aadLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMProcessIV.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMProcessIV.c new file mode 100644 index 000000000..63788a8d5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMProcessIV.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMProcessIV( pIV, ivLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMProcessIV( pIV, ivLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMProcessIV( pIV, ivLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMReset.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMReset.c new file mode 100644 index 000000000..a50a1f7b7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMReset.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMReset,(IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMReset,(IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMReset,(IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMReset,(IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMReset( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMReset( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMReset( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMSetupNoise.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMSetupNoise.c new file mode 100644 index 000000000..78fb4728d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMSetupNoise.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMSetupNoise,(Ipp32u noiseLevel, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMSetupNoise,(Ipp32u noiseLevel, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMSetupNoise,(Ipp32u noiseLevel, IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMSetupNoise,(Ipp32u noiseLevel, IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMSetupNoise( noiseLevel, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMSetupNoise( noiseLevel, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMSetupNoise( noiseLevel, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMStart.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMStart.c new file mode 100644 index 000000000..606080f30 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_GCMStart.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, l9_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) +IPPAPI(IppStatus, y8_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_S2V_CMAC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_S2V_CMAC.c new file mode 100644 index 000000000..ef349cd9d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_S2V_CMAC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) +IPPAPI(IppStatus, l9_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) +IPPAPI(IppStatus, y8_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_SIVDecrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_SIVDecrypt.c new file mode 100644 index 000000000..03d5f5d9b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_SIVDecrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) +IPPAPI(IppStatus, l9_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) +IPPAPI(IppStatus, y8_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_SIVEncrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_SIVEncrypt.c new file mode 100644 index 000000000..04f19a4fb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_SIVEncrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) +IPPAPI(IppStatus, l9_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) +IPPAPI(IppStatus, y8_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSDecrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSDecrypt.c new file mode 100644 index 000000000..6691d14b1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSDecrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) +IPPAPI(IppStatus, l9_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) +IPPAPI(IppStatus, y8_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSEncrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSEncrypt.c new file mode 100644 index 000000000..01d7ed02b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSEncrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) +IPPAPI(IppStatus, l9_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) +IPPAPI(IppStatus, y8_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSGetSize.c new file mode 100644 index 000000000..16340b3c9 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_XTSGetSize,(int * pSize)) +IPPAPI(IppStatus, l9_ippsAES_XTSGetSize,(int * pSize)) +IPPAPI(IppStatus, y8_ippsAES_XTSGetSize,(int * pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_XTSGetSize,(int * pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_XTSGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_XTSGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_XTSGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSInit.c new file mode 100644 index 000000000..f4d2c3d90 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAES_XTSInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) +IPPAPI(IppStatus, l9_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) +IPPAPI(IppStatus, y8_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourCheckKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourCheckKey.c new file mode 100644 index 000000000..d1ca7f2e1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourCheckKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) +IPPAPI(IppStatus, l9_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) +IPPAPI(IppStatus, y8_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourDecrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourDecrypt.c new file mode 100644 index 000000000..0715e5e5a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourDecrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) +IPPAPI(IppStatus, l9_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) +IPPAPI(IppStatus, y8_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourEncrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourEncrypt.c new file mode 100644 index 000000000..d079366f4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourEncrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) +IPPAPI(IppStatus, l9_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) +IPPAPI(IppStatus, y8_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourGetSize.c new file mode 100644 index 000000000..9f0306049 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourGetSize, (int* pSize)) +IPPAPI(IppStatus, l9_ippsARCFourGetSize, (int* pSize)) +IPPAPI(IppStatus, y8_ippsARCFourGetSize, (int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourGetSize, (int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourInit.c new file mode 100644 index 000000000..5a22c25b0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) +IPPAPI(IppStatus, l9_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) +IPPAPI(IppStatus, y8_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourInit( pKey, keyLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourInit( pKey, keyLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourInit( pKey, keyLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourPack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourPack.c new file mode 100644 index 000000000..259394916 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourPack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourPack( pCtx, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourPack( pCtx, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourPack( pCtx, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourReset.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourReset.c new file mode 100644 index 000000000..eb957d781 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourReset.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourReset, (IppsARCFourState* pCtx)) +IPPAPI(IppStatus, l9_ippsARCFourReset, (IppsARCFourState* pCtx)) +IPPAPI(IppStatus, y8_ippsARCFourReset, (IppsARCFourState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourReset, (IppsARCFourState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourReset( pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourReset( pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourReset( pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourUnpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourUnpack.c new file mode 100644 index 000000000..c350f8947 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsARCFourUnpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) +IPPAPI(IppStatus, l9_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) +IPPAPI(IppStatus, y8_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsARCFourUnpack( pBuffer, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsARCFourUnpack( pBuffer, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsARCFourUnpack( pBuffer, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAdd_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAdd_BN.c new file mode 100644 index 000000000..425d83fae --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsAdd_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsAdd_BN( pA, pB, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsAdd_BN( pA, pB, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsAdd_BN( pA, pB, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsBigNumGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsBigNumGetSize.c new file mode 100644 index 000000000..30aea76b7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsBigNumGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsBigNumGetSize,(int length, int* pSize)) +IPPAPI(IppStatus, l9_ippsBigNumGetSize,(int length, int* pSize)) +IPPAPI(IppStatus, y8_ippsBigNumGetSize,(int length, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsBigNumGetSize,(int length, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsBigNumGetSize( length, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsBigNumGetSize( length, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsBigNumGetSize( length, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsBigNumInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsBigNumInit.c new file mode 100644 index 000000000..b3274f812 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsBigNumInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsBigNumInit,(int length, IppsBigNumState* pBN)) +IPPAPI(IppStatus, l9_ippsBigNumInit,(int length, IppsBigNumState* pBN)) +IPPAPI(IppStatus, y8_ippsBigNumInit,(int length, IppsBigNumState* pBN)) + +IPPFUN(IppStatus, sgx_disp_ippsBigNumInit,(int length, IppsBigNumState* pBN)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsBigNumInit( length, pBN ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsBigNumInit( length, pBN ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsBigNumInit( length, pBN ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsCmpZero_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsCmpZero_BN.c new file mode 100644 index 000000000..a0d28d945 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsCmpZero_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) +IPPAPI(IppStatus, l9_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) +IPPAPI(IppStatus, y8_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) + +IPPFUN(IppStatus, sgx_disp_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsCmpZero_BN( pBN, pResult ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsCmpZero_BN( pBN, pResult ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsCmpZero_BN( pBN, pResult ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsCmp_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsCmp_BN.c new file mode 100644 index 000000000..7a08e1b7c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsCmp_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) +IPPAPI(IppStatus, l9_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) +IPPAPI(IppStatus, y8_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) + +IPPFUN(IppStatus, sgx_disp_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsCmp_BN( pA, pB, pResult ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsCmp_BN( pA, pB, pResult ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsCmp_BN( pA, pB, pResult ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESGetSize.c new file mode 100644 index 000000000..d12993d08 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDESGetSize,(int *size)) +IPPAPI(IppStatus, l9_ippsDESGetSize,(int *size)) +IPPAPI(IppStatus, y8_ippsDESGetSize,(int *size)) + +IPPFUN(IppStatus, sgx_disp_ippsDESGetSize,(int *size)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDESGetSize( size ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDESGetSize( size ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDESGetSize( size ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESInit.c new file mode 100644 index 000000000..f59ad337d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) +IPPAPI(IppStatus, l9_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) +IPPAPI(IppStatus, y8_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDESInit( pKey, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDESInit( pKey, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDESInit( pKey, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESPack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESPack.c new file mode 100644 index 000000000..af93a528c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESPack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDESPack( pCtx, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDESPack( pCtx, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDESPack( pCtx, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESUnpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESUnpack.c new file mode 100644 index 000000000..3108912ea --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDESUnpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) +IPPAPI(IppStatus, l9_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) +IPPAPI(IppStatus, y8_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDESUnpack( pBuffer, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDESUnpack( pBuffer, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDESUnpack( pBuffer, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLGetResultString.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLGetResultString.c new file mode 100644 index 000000000..5b2b988de --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLGetResultString.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const char*, k1_ippsDLGetResultString, (IppDLResult code)) +IPPAPI( const char*, l9_ippsDLGetResultString, (IppDLResult code)) +IPPAPI( const char*, y8_ippsDLGetResultString, (IppDLResult code)) + +IPPFUN( const char*, sgx_disp_ippsDLGetResultString, (IppDLResult code)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLGetResultString( code ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLGetResultString( code ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLGetResultString( code ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenKeyPair.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenKeyPair.c new file mode 100644 index 000000000..0236dc3c5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenKeyPair.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenerateDH.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenerateDH.c new file mode 100644 index 000000000..280050c6c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenerateDH.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenerateDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenerateDSA.c new file mode 100644 index 000000000..388a62974 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGenerateDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGet.c new file mode 100644 index 000000000..d229f584d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPGet( pP, pR, pG, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPGet( pP, pR, pG, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPGet( pP, pR, pG, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGetDP.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGetDP.c new file mode 100644 index 000000000..47d52b61a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGetDP.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPGetDP( pDP, tag, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPGetDP( pDP, tag, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPGetDP( pDP, tag, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGetSize.c new file mode 100644 index 000000000..e67084661 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) +IPPAPI(IppStatus, l9_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) +IPPAPI(IppStatus, y8_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPInit.c new file mode 100644 index 000000000..a4ac5c06f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPPack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPPack.c new file mode 100644 index 000000000..4563315c8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPPack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPPack( pCtx, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPPack( pCtx, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPPack( pCtx, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPPublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPPublicKey.c new file mode 100644 index 000000000..632ddbca7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPPublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSet.c new file mode 100644 index 000000000..70d677f4a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPSet( pP, pR, pG, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPSet( pP, pR, pG, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPSet( pP, pR, pG, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSetDP.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSetDP.c new file mode 100644 index 000000000..b16f35b2b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSetDP.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPSetDP( pDP, tag, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPSetDP( pDP, tag, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPSetDP( pDP, tag, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSetKeyPair.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSetKeyPair.c new file mode 100644 index 000000000..b796cbee5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSetKeyPair.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSharedSecretDH.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSharedSecretDH.c new file mode 100644 index 000000000..bb7f28486 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSharedSecretDH.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSignDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSignDSA.c new file mode 100644 index 000000000..bb8f99456 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPSignDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPUnpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPUnpack.c new file mode 100644 index 000000000..4e95c4d27 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPUnpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPUnpack( pBuffer, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPUnpack( pBuffer, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPUnpack( pBuffer, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateDH.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateDH.c new file mode 100644 index 000000000..8bca6e18b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateDH.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateDSA.c new file mode 100644 index 000000000..32ce65a11 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateKeyPair.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateKeyPair.c new file mode 100644 index 000000000..370c52b48 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPValidateKeyPair.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPVerifyDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPVerifyDSA.c new file mode 100644 index 000000000..c0805f1c0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDLPVerifyDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) +IPPAPI(IppStatus, l9_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) +IPPAPI(IppStatus, y8_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDiv_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDiv_BN.c new file mode 100644 index 000000000..6e0cea27c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsDiv_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsDiv_BN( pA, pB, pQ, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsDiv_BN( pA, pB, pQ, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsDiv_BN( pA, pB, pQ, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCGetResultString.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCGetResultString.c new file mode 100644 index 000000000..567085a5d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCGetResultString.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const char*, k1_ippsECCGetResultString, (IppECResult code)) +IPPAPI( const char*, l9_ippsECCGetResultString, (IppECResult code)) +IPPAPI( const char*, y8_ippsECCGetResultString, (IppECResult code)) + +IPPFUN( const char*, sgx_disp_ippsECCGetResultString, (IppECResult code)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCGetResultString( code ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCGetResultString( code ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCGetResultString( code ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPAddPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPAddPoint.c new file mode 100644 index 000000000..c8e0d5990 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPAddPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPAddPoint( pP, pQ, pR, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPAddPoint( pP, pQ, pR, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPAddPoint( pP, pQ, pR, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd192r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd192r1.c new file mode 100644 index 000000000..efb4f2be2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd192r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPBindGxyTblStd192r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPBindGxyTblStd192r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPBindGxyTblStd192r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd224r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd224r1.c new file mode 100644 index 000000000..2dcbba9bb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd224r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPBindGxyTblStd224r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPBindGxyTblStd224r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPBindGxyTblStd224r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd256r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd256r1.c new file mode 100644 index 000000000..aa93559e1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd256r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPBindGxyTblStd256r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPBindGxyTblStd256r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPBindGxyTblStd256r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd384r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd384r1.c new file mode 100644 index 000000000..6cd0edcce --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd384r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPBindGxyTblStd384r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPBindGxyTblStd384r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPBindGxyTblStd384r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd521r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd521r1.c new file mode 100644 index 000000000..f7cfd03ac --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStd521r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPBindGxyTblStd521r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPBindGxyTblStd521r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPBindGxyTblStd521r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStdSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStdSM2.c new file mode 100644 index 000000000..2947e5bcf --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPBindGxyTblStdSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPBindGxyTblStdSM2( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPBindGxyTblStdSM2( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPBindGxyTblStdSM2( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPCheckPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPCheckPoint.c new file mode 100644 index 000000000..2ddc31166 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPCheckPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPCheckPoint( pP, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPCheckPoint( pP, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPCheckPoint( pP, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPComparePoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPComparePoint.c new file mode 100644 index 000000000..bd3f7e16c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPComparePoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPComparePoint( pP, pQ, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPComparePoint( pP, pQ, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPComparePoint( pP, pQ, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGenKeyPair.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGenKeyPair.c new file mode 100644 index 000000000..0ef6065e2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGenKeyPair.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGet.c new file mode 100644 index 000000000..6ab76ac17 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetOrderBitSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetOrderBitSize.c new file mode 100644 index 000000000..1654880e4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetOrderBitSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetOrderBitSize( pBitSize, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetOrderBitSize( pBitSize, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetOrderBitSize( pBitSize, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetPoint.c new file mode 100644 index 000000000..4c0805ba4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetPoint( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetPoint( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetPoint( pX, pY, pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSize.c new file mode 100644 index 000000000..c4f563ba6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSize,(int feBitSize, int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSize,(int feBitSize, int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSize,(int feBitSize, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSize,(int feBitSize, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSize( feBitSize, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSize( feBitSize, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSize( feBitSize, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd128r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd128r1.c new file mode 100644 index 000000000..f828805d2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd128r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStd128r1,(int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStd128r1,(int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStd128r1,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStd128r1,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStd128r1( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStd128r1( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStd128r1( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd128r2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd128r2.c new file mode 100644 index 000000000..7d208acde --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd128r2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStd128r2,(int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStd128r2,(int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStd128r2,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStd128r2,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStd128r2( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStd128r2( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStd128r2( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd192r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd192r1.c new file mode 100644 index 000000000..99692f064 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd192r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStd192r1,(int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStd192r1,(int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStd192r1,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStd192r1,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStd192r1( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStd192r1( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStd192r1( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd224r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd224r1.c new file mode 100644 index 000000000..50d346cb1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd224r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStd224r1,(int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStd224r1,(int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStd224r1,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStd224r1,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStd224r1( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStd224r1( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStd224r1( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd256r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd256r1.c new file mode 100644 index 000000000..2edeb151f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd256r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStd256r1,(int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStd256r1,(int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStd256r1,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStd256r1,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStd256r1( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStd256r1( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStd256r1( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd384r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd384r1.c new file mode 100644 index 000000000..ef24bf5ae --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd384r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStd384r1,(int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStd384r1,(int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStd384r1,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStd384r1,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStd384r1( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStd384r1( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStd384r1( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd521r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd521r1.c new file mode 100644 index 000000000..9b034c615 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStd521r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStd521r1,(int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStd521r1,(int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStd521r1,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStd521r1,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStd521r1( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStd521r1( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStd521r1( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStdSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStdSM2.c new file mode 100644 index 000000000..5938d68e0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPGetSizeStdSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPGetSizeStdSM2, (int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPGetSizeStdSM2, (int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPGetSizeStdSM2, (int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPGetSizeStdSM2, (int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPGetSizeStdSM2( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPGetSizeStdSM2( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPGetSizeStdSM2( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInit.c new file mode 100644 index 000000000..50a85a15f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInit( feBitSize, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInit( feBitSize, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInit( feBitSize, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd128r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd128r1.c new file mode 100644 index 000000000..dd9febd23 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd128r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStd128r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStd128r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStd128r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStd128r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStd128r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStd128r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStd128r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd128r2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd128r2.c new file mode 100644 index 000000000..204628cf2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd128r2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStd128r2,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStd128r2,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStd128r2,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStd128r2,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStd128r2( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStd128r2( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStd128r2( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd192r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd192r1.c new file mode 100644 index 000000000..352b3d4ba --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd192r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStd192r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStd192r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStd192r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStd192r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStd192r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStd192r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStd192r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd224r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd224r1.c new file mode 100644 index 000000000..ec39a7406 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd224r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStd224r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStd224r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStd224r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStd224r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStd224r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStd224r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStd224r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd256r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd256r1.c new file mode 100644 index 000000000..4749c1bf3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd256r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStd256r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStd256r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStd256r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStd256r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStd256r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStd256r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStd256r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd384r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd384r1.c new file mode 100644 index 000000000..d4d65ca19 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd384r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStd384r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStd384r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStd384r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStd384r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStd384r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStd384r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStd384r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd521r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd521r1.c new file mode 100644 index 000000000..913fc907d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStd521r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStd521r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStd521r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStd521r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStd521r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStd521r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStd521r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStd521r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStdSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStdSM2.c new file mode 100644 index 000000000..47b9f70e7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPInitStdSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPInitStdSM2, (IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPInitStdSM2, (IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPInitStdSM2, (IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPInitStdSM2, (IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPInitStdSM2( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPInitStdSM2( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPInitStdSM2( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPMulPointScalar.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPMulPointScalar.c new file mode 100644 index 000000000..b808d3f07 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPMulPointScalar.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPMulPointScalar( pP, pK, pR, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPMulPointScalar( pP, pK, pR, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPMulPointScalar( pP, pK, pR, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPNegativePoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPNegativePoint.c new file mode 100644 index 000000000..dc8eb6100 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPNegativePoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPNegativePoint( pP, pR, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPNegativePoint( pP, pR, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPNegativePoint( pP, pR, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPointGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPointGetSize.c new file mode 100644 index 000000000..58faabca9 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPointGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPPointGetSize,(int feBitSize, int* pSize)) +IPPAPI(IppStatus, l9_ippsECCPPointGetSize,(int feBitSize, int* pSize)) +IPPAPI(IppStatus, y8_ippsECCPPointGetSize,(int feBitSize, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPPointGetSize,(int feBitSize, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPPointGetSize( feBitSize, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPPointGetSize( feBitSize, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPPointGetSize( feBitSize, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPointInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPointInit.c new file mode 100644 index 000000000..b4b8b887c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPointInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) +IPPAPI(IppStatus, l9_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) +IPPAPI(IppStatus, y8_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPPointInit( feBitSize, pPoint ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPPointInit( feBitSize, pPoint ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPPointInit( feBitSize, pPoint ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPublicKey.c new file mode 100644 index 000000000..d2e283d80 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPPublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPPublicKey( pPrivate, pPublic, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPPublicKey( pPrivate, pPublic, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPPublicKey( pPrivate, pPublic, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSet.c new file mode 100644 index 000000000..2d31a2b57 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetKeyPair.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetKeyPair.c new file mode 100644 index 000000000..6241f8bac --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetKeyPair.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetPoint.c new file mode 100644 index 000000000..d37c4db38 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetPoint( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetPoint( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetPoint( pX, pY, pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetPointAtInfinity.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetPointAtInfinity.c new file mode 100644 index 000000000..9c90b668e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetPointAtInfinity.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetPointAtInfinity( pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetPointAtInfinity( pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetPointAtInfinity( pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd.c new file mode 100644 index 000000000..78bd0a916 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd( flag, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd( flag, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd( flag, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd128r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd128r1.c new file mode 100644 index 000000000..f7f82db22 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd128r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd128r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd128r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd128r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd128r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd128r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd128r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd128r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd128r2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd128r2.c new file mode 100644 index 000000000..807596969 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd128r2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd128r2,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd128r2,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd128r2,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd128r2,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd128r2( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd128r2( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd128r2( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd192r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd192r1.c new file mode 100644 index 000000000..75dccae9d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd192r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd192r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd192r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd192r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd192r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd192r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd192r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd192r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd224r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd224r1.c new file mode 100644 index 000000000..77a9c6dc3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd224r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd224r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd224r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd224r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd224r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd224r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd224r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd224r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd256r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd256r1.c new file mode 100644 index 000000000..cb20f02b7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd256r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd256r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd256r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd256r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd256r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd256r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd256r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd256r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd384r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd384r1.c new file mode 100644 index 000000000..3e1ce3d96 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd384r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd384r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd384r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd384r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd384r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd384r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd384r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd384r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd521r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd521r1.c new file mode 100644 index 000000000..5354012a0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStd521r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStd521r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStd521r1,(IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStd521r1,(IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStd521r1,(IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStd521r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStd521r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStd521r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStdSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStdSM2.c new file mode 100644 index 000000000..3f2fb608d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSetStdSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSetStdSM2, (IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSetStdSM2, (IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSetStdSM2, (IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSetStdSM2, (IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSetStdSM2( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSetStdSM2( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSetStdSM2( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSharedSecretDH.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSharedSecretDH.c new file mode 100644 index 000000000..03fbde341 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSharedSecretDH.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSharedSecretDHC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSharedSecretDHC.c new file mode 100644 index 000000000..fa1f58c9e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSharedSecretDHC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignDSA.c new file mode 100644 index 000000000..392ff1b2d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignNR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignNR.c new file mode 100644 index 000000000..ccf49a53d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignNR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignSM2.c new file mode 100644 index 000000000..4cbc6d435 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPSignSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPValidate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPValidate.c new file mode 100644 index 000000000..8b7a2e245 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPValidate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPValidateKeyPair.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPValidateKeyPair.c new file mode 100644 index 000000000..c1c1a9380 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPValidateKeyPair.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifyDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifyDSA.c new file mode 100644 index 000000000..7dfd3824f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifyDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifyNR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifyNR.c new file mode 100644 index 000000000..28e316846 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifyNR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifySM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifySM2.c new file mode 100644 index 000000000..b3737f9b1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsECCPVerifySM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, l9_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) +IPPAPI(IppStatus, y8_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsExtGet_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsExtGet_BN.c new file mode 100644 index 000000000..077294736 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsExtGet_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, l9_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, y8_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) + +IPPFUN(IppStatus, sgx_disp_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpAdd.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpAdd.c new file mode 100644 index 000000000..ceb8efb90 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpAdd.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpAdd( pA, pB, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpAdd( pA, pB, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpAdd( pA, pB, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpAdd_PE.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpAdd_PE.c new file mode 100644 index 000000000..3030b3129 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpAdd_PE.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpCmpElement.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpCmpElement.c new file mode 100644 index 000000000..aaed7d3c2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpCmpElement.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpCmpElement( pA, pB, pResult, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpCmpElement( pA, pB, pResult, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpCmpElement( pA, pB, pResult, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpConj.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpConj.c new file mode 100644 index 000000000..2b06fc817 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpConj.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpConj( pA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpConj( pA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpConj( pA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpCpyElement.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpCpyElement.c new file mode 100644 index 000000000..58fdaed25 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpCpyElement.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpCpyElement( pA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpCpyElement( pA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpCpyElement( pA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECAddPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECAddPoint.c new file mode 100644 index 000000000..ef705415b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECAddPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECAddPoint( pP, pQ, pR, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECAddPoint( pP, pQ, pR, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECAddPoint( pP, pQ, pR, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd192r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd192r1.c new file mode 100644 index 000000000..1a2521f0a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd192r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECBindGxyTblStd192r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECBindGxyTblStd192r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECBindGxyTblStd192r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd224r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd224r1.c new file mode 100644 index 000000000..901bd1d99 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd224r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECBindGxyTblStd224r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECBindGxyTblStd224r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECBindGxyTblStd224r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd256r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd256r1.c new file mode 100644 index 000000000..68ca27e7b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd256r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECBindGxyTblStd256r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECBindGxyTblStd256r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECBindGxyTblStd256r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd384r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd384r1.c new file mode 100644 index 000000000..6955f1d2d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd384r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECBindGxyTblStd384r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECBindGxyTblStd384r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECBindGxyTblStd384r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd521r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd521r1.c new file mode 100644 index 000000000..ef380ce20 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStd521r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECBindGxyTblStd521r1( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECBindGxyTblStd521r1( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECBindGxyTblStd521r1( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStdSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStdSM2.c new file mode 100644 index 000000000..234f6431a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECBindGxyTblStdSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECBindGxyTblStdSM2( pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECBindGxyTblStdSM2( pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECBindGxyTblStdSM2( pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECCmpPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECCmpPoint.c new file mode 100644 index 000000000..074e85d4f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECCmpPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECCpyPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECCpyPoint.c new file mode 100644 index 000000000..3dcd8a898 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECCpyPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECCpyPoint( pA, pR, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECCpyPoint( pA, pR, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECCpyPoint( pA, pR, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECDecryptSM2_Ext.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECDecryptSM2_Ext.c new file mode 100644 index 000000000..458fac799 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECDecryptSM2_Ext.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECDecryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsBigNumState *pPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECDecryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsBigNumState *pPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECDecryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsBigNumState *pPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECDecryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsBigNumState *pPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECDecryptSM2_Ext( pOut, maxOutLen, pOutSize, pInp, inpLen, pPrvKey, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECDecryptSM2_Ext( pOut, maxOutLen, pOutSize, pInp, inpLen, pPrvKey, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECDecryptSM2_Ext( pOut, maxOutLen, pOutSize, pInp, inpLen, pPrvKey, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECDecryptSM2_Ext_DecMsgSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECDecryptSM2_Ext_DecMsgSize.c new file mode 100644 index 000000000..f829ebcc1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECDecryptSM2_Ext_DecMsgSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECDecryptSM2_Ext_DecMsgSize, (const IppsGFpECState *pEC, int ctMsgSize, int *pSize)) +IPPAPI(IppStatus, l9_ippsGFpECDecryptSM2_Ext_DecMsgSize, (const IppsGFpECState *pEC, int ctMsgSize, int *pSize)) +IPPAPI(IppStatus, y8_ippsGFpECDecryptSM2_Ext_DecMsgSize, (const IppsGFpECState *pEC, int ctMsgSize, int *pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECDecryptSM2_Ext_DecMsgSize, (const IppsGFpECState *pEC, int ctMsgSize, int *pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECDecryptSM2_Ext_DecMsgSize( pEC, ctMsgSize, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECDecryptSM2_Ext_DecMsgSize( pEC, ctMsgSize, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECDecryptSM2_Ext_DecMsgSize( pEC, ctMsgSize, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESDecrypt_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESDecrypt_SM2.c new file mode 100644 index 000000000..959c9a54f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESDecrypt_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) +IPPAPI(IppStatus, l9_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) +IPPAPI(IppStatus, y8_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESEncrypt_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESEncrypt_SM2.c new file mode 100644 index 000000000..9028ef9de --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESEncrypt_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) +IPPAPI(IppStatus, l9_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) +IPPAPI(IppStatus, y8_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESFinal_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESFinal_SM2.c new file mode 100644 index 000000000..9584682a8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESFinal_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) +IPPAPI(IppStatus, l9_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) +IPPAPI(IppStatus, y8_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESGetBuffersSize_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESGetBuffersSize_SM2.c new file mode 100644 index 000000000..f03e2edfc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESGetBuffersSize_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) +IPPAPI(IppStatus, l9_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) +IPPAPI(IppStatus, y8_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESGetSize_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESGetSize_SM2.c new file mode 100644 index 000000000..5b81053a6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESGetSize_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) +IPPAPI(IppStatus, l9_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) +IPPAPI(IppStatus, y8_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESGetSize_SM2( pEC, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESGetSize_SM2( pEC, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESGetSize_SM2( pEC, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESInit_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESInit_SM2.c new file mode 100644 index 000000000..47406068b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESInit_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) +IPPAPI(IppStatus, l9_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) +IPPAPI(IppStatus, y8_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESSetKey_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESSetKey_SM2.c new file mode 100644 index 000000000..d3d47848e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESSetKey_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESStart_SM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESStart_SM2.c new file mode 100644 index 000000000..8fdb22f3d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECESStart_SM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) +IPPAPI(IppStatus, l9_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) +IPPAPI(IppStatus, y8_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECESStart_SM2( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECESStart_SM2( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECESStart_SM2( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECEncryptSM2_Ext.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECEncryptSM2_Ext.c new file mode 100644 index 000000000..547c2e9a5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECEncryptSM2_Ext.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECEncryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsGFpECPoint *pPublicKey, IppsGFpECPoint *pEhpPublicKey, IppsBigNumState *pEphPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECEncryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsGFpECPoint *pPublicKey, IppsGFpECPoint *pEhpPublicKey, IppsBigNumState *pEphPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECEncryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsGFpECPoint *pPublicKey, IppsGFpECPoint *pEhpPublicKey, IppsBigNumState *pEphPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECEncryptSM2_Ext, (Ipp8u *pOut, int maxOutLen, int *pOutSize, const Ipp8u *pInp, int inpLen, const IppsGFpECPoint *pPublicKey, IppsGFpECPoint *pEhpPublicKey, IppsBigNumState *pEphPrvKey, IppsGFpECState *pEC, Ipp8u *pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECEncryptSM2_Ext( pOut, maxOutLen, pOutSize, pInp, inpLen, pPublicKey, pEhpPublicKey, pEphPrvKey, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECEncryptSM2_Ext( pOut, maxOutLen, pOutSize, pInp, inpLen, pPublicKey, pEhpPublicKey, pEphPrvKey, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECEncryptSM2_Ext( pOut, maxOutLen, pOutSize, pInp, inpLen, pPublicKey, pEhpPublicKey, pEphPrvKey, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECEncryptSM2_Ext_EncMsgSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECEncryptSM2_Ext_EncMsgSize.c new file mode 100644 index 000000000..bf3d8dba1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECEncryptSM2_Ext_EncMsgSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECEncryptSM2_Ext_EncMsgSize, (const IppsGFpECState *pEC, int ptMsgSize, int *pSize)) +IPPAPI(IppStatus, l9_ippsGFpECEncryptSM2_Ext_EncMsgSize, (const IppsGFpECState *pEC, int ptMsgSize, int *pSize)) +IPPAPI(IppStatus, y8_ippsGFpECEncryptSM2_Ext_EncMsgSize, (const IppsGFpECState *pEC, int ptMsgSize, int *pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECEncryptSM2_Ext_EncMsgSize, (const IppsGFpECState *pEC, int ptMsgSize, int *pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECEncryptSM2_Ext_EncMsgSize( pEC, ptMsgSize, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECEncryptSM2_Ext_EncMsgSize( pEC, ptMsgSize, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECEncryptSM2_Ext_EncMsgSize( pEC, ptMsgSize, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGet.c new file mode 100644 index 000000000..406f7255c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECGet( ppGFp, pA, pB, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECGet( ppGFp, pA, pB, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECGet( ppGFp, pA, pB, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetInfo_GF.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetInfo_GF.c new file mode 100644 index 000000000..be189da32 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetInfo_GF.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECGetInfo_GF( pInfo, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECGetInfo_GF( pInfo, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECGetInfo_GF( pInfo, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPoint.c new file mode 100644 index 000000000..c3f5dfd4c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPointOctString.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPointOctString.c new file mode 100644 index 000000000..e5ffb8505 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPointOctString.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPointRegular.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPointRegular.c new file mode 100644 index 000000000..7645e5e5d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetPointRegular.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetSize.c new file mode 100644 index 000000000..69ed99f88 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) +IPPAPI(IppStatus, l9_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) +IPPAPI(IppStatus, y8_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECGetSize( pGFp, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECGetSize( pGFp, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECGetSize( pGFp, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetSubgroup.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetSubgroup.c new file mode 100644 index 000000000..4bb0ee2e1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECGetSubgroup.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInit.c new file mode 100644 index 000000000..d582ce813 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInit( pGFp, pA, pB, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInit( pGFp, pA, pB, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInit( pGFp, pA, pB, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd128r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd128r1.c new file mode 100644 index 000000000..92167daab --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd128r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStd128r1( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStd128r1( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStd128r1( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd128r2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd128r2.c new file mode 100644 index 000000000..16ee7450a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd128r2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStd128r2( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStd128r2( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStd128r2( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd192r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd192r1.c new file mode 100644 index 000000000..1989171f3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd192r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStd192r1( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStd192r1( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStd192r1( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd224r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd224r1.c new file mode 100644 index 000000000..82059508c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd224r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStd224r1( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStd224r1( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStd224r1( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd256r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd256r1.c new file mode 100644 index 000000000..585a9019e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd256r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStd256r1( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStd256r1( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStd256r1( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd384r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd384r1.c new file mode 100644 index 000000000..376bda965 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd384r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStd384r1( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStd384r1( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStd384r1( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd521r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd521r1.c new file mode 100644 index 000000000..2d64a508e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStd521r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStd521r1( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStd521r1( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStd521r1( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStdBN256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStdBN256.c new file mode 100644 index 000000000..b8b83ff82 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStdBN256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStdBN256( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStdBN256( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStdBN256( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStdSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStdSM2.c new file mode 100644 index 000000000..53de49dd5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECInitStdSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECInitStdSM2( pGFp, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECInitStdSM2( pGFp, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECInitStdSM2( pGFp, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Confirm.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Confirm.c new file mode 100644 index 000000000..f57b8d3d6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Confirm.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECKeyExchangeSM2_Confirm, (const Ipp8u pSPeer[IPP_SM3_DIGEST_BYTESIZE], int* pStatus, IppsGFpECKeyExchangeSM2State* pKE)) +IPPAPI(IppStatus, l9_ippsGFpECKeyExchangeSM2_Confirm, (const Ipp8u pSPeer[IPP_SM3_DIGEST_BYTESIZE], int* pStatus, IppsGFpECKeyExchangeSM2State* pKE)) +IPPAPI(IppStatus, y8_ippsGFpECKeyExchangeSM2_Confirm, (const Ipp8u pSPeer[IPP_SM3_DIGEST_BYTESIZE], int* pStatus, IppsGFpECKeyExchangeSM2State* pKE)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECKeyExchangeSM2_Confirm, (const Ipp8u pSPeer[IPP_SM3_DIGEST_BYTESIZE], int* pStatus, IppsGFpECKeyExchangeSM2State* pKE)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECKeyExchangeSM2_Confirm( pSPeer, pStatus, pKE ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECKeyExchangeSM2_Confirm( pSPeer, pStatus, pKE ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECKeyExchangeSM2_Confirm( pSPeer, pStatus, pKE ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_GetSize.c new file mode 100644 index 000000000..2889695dd --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECKeyExchangeSM2_GetSize, (const IppsGFpECState* pEC, int* pSize)) +IPPAPI(IppStatus, l9_ippsGFpECKeyExchangeSM2_GetSize, (const IppsGFpECState* pEC, int* pSize)) +IPPAPI(IppStatus, y8_ippsGFpECKeyExchangeSM2_GetSize, (const IppsGFpECState* pEC, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECKeyExchangeSM2_GetSize, (const IppsGFpECState* pEC, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECKeyExchangeSM2_GetSize( pEC, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECKeyExchangeSM2_GetSize( pEC, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECKeyExchangeSM2_GetSize( pEC, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Init.c new file mode 100644 index 000000000..3d10f9e57 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECKeyExchangeSM2_Init, (IppsGFpECKeyExchangeSM2State* pKE, IppsKeyExchangeRoleSM2 role, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECKeyExchangeSM2_Init, (IppsGFpECKeyExchangeSM2State* pKE, IppsKeyExchangeRoleSM2 role, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECKeyExchangeSM2_Init, (IppsGFpECKeyExchangeSM2State* pKE, IppsKeyExchangeRoleSM2 role, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECKeyExchangeSM2_Init, (IppsGFpECKeyExchangeSM2State* pKE, IppsKeyExchangeRoleSM2 role, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECKeyExchangeSM2_Init( pKE, role, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECKeyExchangeSM2_Init( pKE, role, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECKeyExchangeSM2_Init( pKE, role, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Setup.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Setup.c new file mode 100644 index 000000000..4882b99d0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_Setup.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECKeyExchangeSM2_Setup, (const Ipp8u pZSelf[IPP_SM3_DIGEST_BYTESIZE], const Ipp8u pZPeer[IPP_SM3_DIGEST_BYTESIZE], const IppsGFpECPoint *pPublicKeySelf, const IppsGFpECPoint *pPublicKeyPeer, const IppsGFpECPoint *pEphPublicKeySelf, const IppsGFpECPoint *pEphPublicKeyPeer, IppsGFpECKeyExchangeSM2State *pKE)) +IPPAPI(IppStatus, l9_ippsGFpECKeyExchangeSM2_Setup, (const Ipp8u pZSelf[IPP_SM3_DIGEST_BYTESIZE], const Ipp8u pZPeer[IPP_SM3_DIGEST_BYTESIZE], const IppsGFpECPoint *pPublicKeySelf, const IppsGFpECPoint *pPublicKeyPeer, const IppsGFpECPoint *pEphPublicKeySelf, const IppsGFpECPoint *pEphPublicKeyPeer, IppsGFpECKeyExchangeSM2State *pKE)) +IPPAPI(IppStatus, y8_ippsGFpECKeyExchangeSM2_Setup, (const Ipp8u pZSelf[IPP_SM3_DIGEST_BYTESIZE], const Ipp8u pZPeer[IPP_SM3_DIGEST_BYTESIZE], const IppsGFpECPoint *pPublicKeySelf, const IppsGFpECPoint *pPublicKeyPeer, const IppsGFpECPoint *pEphPublicKeySelf, const IppsGFpECPoint *pEphPublicKeyPeer, IppsGFpECKeyExchangeSM2State *pKE)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECKeyExchangeSM2_Setup, (const Ipp8u pZSelf[IPP_SM3_DIGEST_BYTESIZE], const Ipp8u pZPeer[IPP_SM3_DIGEST_BYTESIZE], const IppsGFpECPoint *pPublicKeySelf, const IppsGFpECPoint *pPublicKeyPeer, const IppsGFpECPoint *pEphPublicKeySelf, const IppsGFpECPoint *pEphPublicKeyPeer, IppsGFpECKeyExchangeSM2State *pKE)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECKeyExchangeSM2_Setup( pZSelf, pZPeer, pPublicKeySelf, pPublicKeyPeer, pEphPublicKeySelf, pEphPublicKeyPeer, pKE ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECKeyExchangeSM2_Setup( pZSelf, pZPeer, pPublicKeySelf, pPublicKeyPeer, pEphPublicKeySelf, pEphPublicKeyPeer, pKE ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECKeyExchangeSM2_Setup( pZSelf, pZPeer, pPublicKeySelf, pPublicKeyPeer, pEphPublicKeySelf, pEphPublicKeyPeer, pKE ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_SharedKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_SharedKey.c new file mode 100644 index 000000000..1f36a272d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECKeyExchangeSM2_SharedKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECKeyExchangeSM2_SharedKey, (Ipp8u* pSharedKey, int sharedKeySize, Ipp8u* pSSelf, const IppsBigNumState* pPrvKey, IppsBigNumState* pEphPrvKey, IppsGFpECKeyExchangeSM2State *pKE, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECKeyExchangeSM2_SharedKey, (Ipp8u* pSharedKey, int sharedKeySize, Ipp8u* pSSelf, const IppsBigNumState* pPrvKey, IppsBigNumState* pEphPrvKey, IppsGFpECKeyExchangeSM2State *pKE, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECKeyExchangeSM2_SharedKey, (Ipp8u* pSharedKey, int sharedKeySize, Ipp8u* pSSelf, const IppsBigNumState* pPrvKey, IppsBigNumState* pEphPrvKey, IppsGFpECKeyExchangeSM2State *pKE, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECKeyExchangeSM2_SharedKey, (Ipp8u* pSharedKey, int sharedKeySize, Ipp8u* pSSelf, const IppsBigNumState* pPrvKey, IppsBigNumState* pEphPrvKey, IppsGFpECKeyExchangeSM2State *pKE, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECKeyExchangeSM2_SharedKey( pSharedKey, sharedKeySize, pSSelf, pPrvKey, pEphPrvKey, pKE, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECKeyExchangeSM2_SharedKey( pSharedKey, sharedKeySize, pSSelf, pPrvKey, pEphPrvKey, pKE, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECKeyExchangeSM2_SharedKey( pSharedKey, sharedKeySize, pSSelf, pPrvKey, pEphPrvKey, pKE, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMakePoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMakePoint.c new file mode 100644 index 000000000..5e6a0c18a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMakePoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECMakePoint( pX, pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECMakePoint( pX, pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECMakePoint( pX, pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMessageRepresentationSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMessageRepresentationSM2.c new file mode 100644 index 000000000..d98a2038d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMessageRepresentationSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECMessageRepresentationSM2, (IppsBigNumState* pMsgDigest, const Ipp8u* pMsg, int msgLen, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pRegPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECMessageRepresentationSM2, (IppsBigNumState* pMsgDigest, const Ipp8u* pMsg, int msgLen, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pRegPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECMessageRepresentationSM2, (IppsBigNumState* pMsgDigest, const Ipp8u* pMsg, int msgLen, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pRegPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECMessageRepresentationSM2, (IppsBigNumState* pMsgDigest, const Ipp8u* pMsg, int msgLen, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pRegPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECMessageRepresentationSM2( pMsgDigest, pMsg, msgLen, pUserID, userIDLen, pRegPublic, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECMessageRepresentationSM2( pMsgDigest, pMsg, msgLen, pUserID, userIDLen, pRegPublic, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECMessageRepresentationSM2( pMsgDigest, pMsg, msgLen, pUserID, userIDLen, pRegPublic, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMulPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMulPoint.c new file mode 100644 index 000000000..aa30dbf33 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECMulPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECNegPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECNegPoint.c new file mode 100644 index 000000000..fdbea9b24 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECNegPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECNegPoint( pP, pR, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECNegPoint( pP, pR, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECNegPoint( pP, pR, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPointGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPointGetSize.c new file mode 100644 index 000000000..bdbdd0e32 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPointGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) +IPPAPI(IppStatus, l9_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) +IPPAPI(IppStatus, y8_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECPointGetSize( pEC, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECPointGetSize( pEC, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECPointGetSize( pEC, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPointInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPointInit.c new file mode 100644 index 000000000..1c5495930 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPointInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECPointInit( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECPointInit( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECPointInit( pX, pY, pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPrivateKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPrivateKey.c new file mode 100644 index 000000000..8140f4bb4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPrivateKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPublicKey.c new file mode 100644 index 000000000..b0e851568 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECPublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECScratchBufferSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECScratchBufferSize.c new file mode 100644 index 000000000..25e21b076 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECScratchBufferSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) +IPPAPI(IppStatus, l9_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) +IPPAPI(IppStatus, y8_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSet.c new file mode 100644 index 000000000..6e6961b04 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSet( pA, pB, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSet( pA, pB, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSet( pA, pB, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPoint.c new file mode 100644 index 000000000..1680a601b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointAtInfinity.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointAtInfinity.c new file mode 100644 index 000000000..6b198143a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointAtInfinity.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointAtInfinity( pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointAtInfinity( pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointAtInfinity( pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHash.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHash.c new file mode 100644 index 000000000..f6a8948ec --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHash.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHashBackCompatible.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHashBackCompatible.c new file mode 100644 index 000000000..4ace24968 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHashBackCompatible.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHashBackCompatible_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHashBackCompatible_rmf.c new file mode 100644 index 000000000..59973e41a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHashBackCompatible_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHash_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHash_rmf.c new file mode 100644 index 000000000..654156148 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointHash_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointOctString.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointOctString.c new file mode 100644 index 000000000..d64f9e4f7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointOctString.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointRandom.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointRandom.c new file mode 100644 index 000000000..5c6b7b891 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointRandom.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointRegular.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointRegular.c new file mode 100644 index 000000000..3f6fbbcf4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetPointRegular.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetSubgroup.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetSubgroup.c new file mode 100644 index 000000000..dea90103d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSetSubgroup.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSharedSecretDH.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSharedSecretDH.c new file mode 100644 index 000000000..bc645bea4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSharedSecretDH.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSharedSecretDHC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSharedSecretDHC.c new file mode 100644 index 000000000..318ca5706 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSharedSecretDHC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignDSA.c new file mode 100644 index 000000000..e4228f723 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignNR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignNR.c new file mode 100644 index 000000000..d03150332 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignNR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSignNR, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSignNR, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSignNR, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSignNR, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignSM2.c new file mode 100644 index 000000000..c2bc626ab --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECSignSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECSignSM2, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECSignSM2, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECSignSM2, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECSignSM2, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstKeyPair.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstKeyPair.c new file mode 100644 index 000000000..5c86a9cdd --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstKeyPair.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstPoint.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstPoint.c new file mode 100644 index 000000000..1ae5e0d5b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstPoint.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) +IPPAPI(IppStatus, l9_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) +IPPAPI(IppStatus, y8_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECTstPoint( pP, pResult, pEC ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECTstPoint( pP, pResult, pEC ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECTstPoint( pP, pResult, pEC ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstPointInSubgroup.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstPointInSubgroup.c new file mode 100644 index 000000000..f95328d3e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECTstPointInSubgroup.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECUserIDHashSM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECUserIDHashSM2.c new file mode 100644 index 000000000..96ad52269 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECUserIDHashSM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECUserIDHashSM2, (Ipp8u* pZaDigest, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pPublicKey, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECUserIDHashSM2, (Ipp8u* pZaDigest, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pPublicKey, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECUserIDHashSM2, (Ipp8u* pZaDigest, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pPublicKey, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECUserIDHashSM2, (Ipp8u* pZaDigest, const Ipp8u* pUserID, int userIDLen, const IppsGFpECPoint* pPublicKey, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECUserIDHashSM2( pZaDigest, pUserID, userIDLen, pPublicKey, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECUserIDHashSM2( pZaDigest, pUserID, userIDLen, pPublicKey, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECUserIDHashSM2( pZaDigest, pUserID, userIDLen, pPublicKey, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerify.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerify.c new file mode 100644 index 000000000..1c295152c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerify.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifyDSA.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifyDSA.c new file mode 100644 index 000000000..1ce8d5b44 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifyDSA.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECVerifyDSA, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECVerifyDSA, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECVerifyDSA, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECVerifyDSA, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifyNR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifyNR.c new file mode 100644 index 000000000..cd26ad18c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifyNR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECVerifyNR, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECVerifyNR, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECVerifyNR, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECVerifyNR, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifySM2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifySM2.c new file mode 100644 index 000000000..7bc0126a0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpECVerifySM2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpECVerifySM2, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpECVerifySM2, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpECVerifySM2, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpECVerifySM2, (const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpElementGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpElementGetSize.c new file mode 100644 index 000000000..7b39871b9 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpElementGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) +IPPAPI(IppStatus, l9_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) +IPPAPI(IppStatus, y8_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpElementGetSize( pGFp, pElementSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpElementGetSize( pGFp, pElementSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpElementGetSize( pGFp, pElementSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpElementInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpElementInit.c new file mode 100644 index 000000000..0669cb1ad --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpElementInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpElementInit( pA, lenA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpElementInit( pA, lenA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpElementInit( pA, lenA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpExp.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpExp.c new file mode 100644 index 000000000..e628e90f0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpExp.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetElement.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetElement.c new file mode 100644 index 000000000..90b984acd --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetElement.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetElementOctString.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetElementOctString.c new file mode 100644 index 000000000..66a24ab87 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetElementOctString.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetInfo.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetInfo.c new file mode 100644 index 000000000..51dd52782 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetInfo.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpGetInfo( pInfo, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpGetInfo( pInfo, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpGetInfo( pInfo, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetSize.c new file mode 100644 index 000000000..9217a63a2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpGetSize, (int feBitSize, int* pSize)) +IPPAPI(IppStatus, l9_ippsGFpGetSize, (int feBitSize, int* pSize)) +IPPAPI(IppStatus, y8_ippsGFpGetSize, (int feBitSize, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpGetSize, (int feBitSize, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpGetSize( feBitSize, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpGetSize( feBitSize, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpGetSize( feBitSize, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInit.c new file mode 100644 index 000000000..e89c22bf0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInitArbitrary.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInitArbitrary.c new file mode 100644 index 000000000..1c2660e8a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInitArbitrary.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInitFixed.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInitFixed.c new file mode 100644 index 000000000..b446c1af2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInitFixed.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInv.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInv.c new file mode 100644 index 000000000..9eaf47650 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpInv.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpInv( pA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpInv( pA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpInv( pA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpIsUnityElement.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpIsUnityElement.c new file mode 100644 index 000000000..a14ba7c80 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpIsUnityElement.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpIsUnityElement( pA, pResult, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpIsUnityElement( pA, pResult, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpIsUnityElement( pA, pResult, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpIsZeroElement.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpIsZeroElement.c new file mode 100644 index 000000000..c892ebc05 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpIsZeroElement.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpIsZeroElement( pA, pResult, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpIsZeroElement( pA, pResult, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpIsZeroElement( pA, pResult, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p192r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p192r1.c new file mode 100644 index 000000000..2fb95de19 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p192r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p192r1, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p192r1, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p192r1, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p192r1, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p192r1( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p192r1( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p192r1( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p224r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p224r1.c new file mode 100644 index 000000000..aa0fa6bad --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p224r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p224r1, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p224r1, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p224r1, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p224r1, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p224r1( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p224r1( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p224r1( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256.c new file mode 100644 index 000000000..cbcaa6e06 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p256, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p256( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p256( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p256( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256bn.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256bn.c new file mode 100644 index 000000000..5ffaa507a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256bn.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256bn, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256bn, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256bn, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p256bn, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p256bn( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p256bn( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p256bn( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256r1.c new file mode 100644 index 000000000..8168b3540 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256r1, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256r1, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256r1, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p256r1, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p256r1( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p256r1( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p256r1( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256sm2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256sm2.c new file mode 100644 index 000000000..0967af995 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p256sm2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256sm2,(void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256sm2,(void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256sm2,(void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p256sm2,(void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p256sm2( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p256sm2( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p256sm2( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p384r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p384r1.c new file mode 100644 index 000000000..572eee4f4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p384r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p384r1, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p384r1, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p384r1, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p384r1, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p384r1( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p384r1( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p384r1( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p521r1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p521r1.c new file mode 100644 index 000000000..5e8ce6f6e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_p521r1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p521r1, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p521r1, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p521r1, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_p521r1, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_p521r1( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_p521r1( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_p521r1( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_pArb.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_pArb.c new file mode 100644 index 000000000..db3914725 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMethod_pArb.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_pArb, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_pArb, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_pArb, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpMethod_pArb, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMethod_pArb( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMethod_pArb( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMethod_pArb( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMul.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMul.c new file mode 100644 index 000000000..61bd884c2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMul.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMul( pA, pB, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMul( pA, pB, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMul( pA, pB, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMul_PE.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMul_PE.c new file mode 100644 index 000000000..641752df7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMul_PE.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMultiExp.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMultiExp.c new file mode 100644 index 000000000..32ba1bf9e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpMultiExp.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpNeg.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpNeg.c new file mode 100644 index 000000000..7a50ef285 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpNeg.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpNeg( pA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpNeg( pA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpNeg( pA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpScratchBufferSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpScratchBufferSize.c new file mode 100644 index 000000000..f8672b395 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpScratchBufferSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) +IPPAPI(IppStatus, l9_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) +IPPAPI(IppStatus, y8_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElement.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElement.c new file mode 100644 index 000000000..fad6aae00 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElement.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSetElement( pA, lenA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSetElement( pA, lenA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSetElement( pA, lenA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementHash.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementHash.c new file mode 100644 index 000000000..f0c92ccb4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementHash.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) +IPPAPI(IppStatus, l9_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) +IPPAPI(IppStatus, y8_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementHash_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementHash_rmf.c new file mode 100644 index 000000000..e7c99d2d4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementHash_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementOctString.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementOctString.c new file mode 100644 index 000000000..bd8d1476f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementOctString.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementRandom.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementRandom.c new file mode 100644 index 000000000..192259705 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementRandom.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementRegular.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementRegular.c new file mode 100644 index 000000000..41e80c601 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSetElementRegular.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSetElementRegular( pBN, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSetElementRegular( pBN, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSetElementRegular( pBN, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSqr.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSqr.c new file mode 100644 index 000000000..4d62f4ba8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSqr.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSqr( pA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSqr( pA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSqr( pA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSqrt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSqrt.c new file mode 100644 index 000000000..4b2ae0d49 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSqrt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSqrt( pA, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSqrt( pA, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSqrt( pA, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSub.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSub.c new file mode 100644 index 000000000..7af4d6863 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSub.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSub( pA, pB, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSub( pA, pB, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSub( pA, pB, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSub_PE.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSub_PE.c new file mode 100644 index 000000000..964830f6f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpSub_PE.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, l9_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +IPPAPI(IppStatus, y8_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxGetSize.c new file mode 100644 index 000000000..50d443bdc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) +IPPAPI(IppStatus, l9_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) +IPPAPI(IppStatus, y8_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxGetSize( pGroundGF, degree, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxGetSize( pGroundGF, degree, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxGetSize( pGroundGF, degree, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxInit.c new file mode 100644 index 000000000..b5b8853b9 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) +IPPAPI(IppStatus, l9_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) +IPPAPI(IppStatus, y8_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxInitBinomial.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxInitBinomial.c new file mode 100644 index 000000000..5095c9cbc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxInitBinomial.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) +IPPAPI(IppStatus, l9_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) +IPPAPI(IppStatus, y8_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) + +IPPFUN(IppStatus, sgx_disp_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom.c new file mode 100644 index 000000000..7c0f894e1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpxMethod_binom, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxMethod_binom( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxMethod_binom( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxMethod_binom( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom2.c new file mode 100644 index 000000000..615633268 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom2, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom2, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom2, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpxMethod_binom2, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxMethod_binom2( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxMethod_binom2( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxMethod_binom2( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom2_epid2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom2_epid2.c new file mode 100644 index 000000000..47124df67 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom2_epid2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom2_epid2,(void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom2_epid2,(void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom2_epid2,(void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpxMethod_binom2_epid2,(void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxMethod_binom2_epid2( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxMethod_binom2_epid2( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxMethod_binom2_epid2( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom3.c new file mode 100644 index 000000000..72f68e39e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom3, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom3, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom3, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpxMethod_binom3, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxMethod_binom3( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxMethod_binom3( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxMethod_binom3( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom3_epid2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom3_epid2.c new file mode 100644 index 000000000..7ddcca3f9 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_binom3_epid2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom3_epid2,(void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom3_epid2,(void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom3_epid2,(void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpxMethod_binom3_epid2,(void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxMethod_binom3_epid2( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxMethod_binom3_epid2( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxMethod_binom3_epid2( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_com.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_com.c new file mode 100644 index 000000000..5abfc2002 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGFpxMethod_com.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_com, (void) ) +IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_com, (void) ) +IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_com, (void) ) + +IPPFUN( const IppsGFpMethod*, sgx_disp_ippsGFpxMethod_com, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGFpxMethod_com( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGFpxMethod_com( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGFpxMethod_com( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGcd_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGcd_BN.c new file mode 100644 index 000000000..885b309a4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGcd_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) +IPPAPI(IppStatus, l9_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) +IPPAPI(IppStatus, y8_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) + +IPPFUN(IppStatus, sgx_disp_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGcd_BN( pA, pB, pGCD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGcd_BN( pA, pB, pGCD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGcd_BN( pA, pB, pGCD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGetOctString_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGetOctString_BN.c new file mode 100644 index 000000000..50cae0536 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGetOctString_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, l9_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, y8_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) + +IPPFUN(IppStatus, sgx_disp_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGetOctString_BN( pStr, strLen, pBN ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGetOctString_BN( pStr, strLen, pBN ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGetOctString_BN( pStr, strLen, pBN ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGetSize_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGetSize_BN.c new file mode 100644 index 000000000..3df66c04d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGetSize_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) +IPPAPI(IppStatus, l9_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) +IPPAPI(IppStatus, y8_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGetSize_BN( pBN, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGetSize_BN( pBN, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGetSize_BN( pBN, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGet_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGet_BN.c new file mode 100644 index 000000000..c9ad5a8a1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsGet_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, l9_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, y8_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) + +IPPFUN(IppStatus, sgx_disp_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsGet_BN( pSgn, pLength, pData, pBN ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsGet_BN( pSgn, pLength, pData, pBN ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsGet_BN( pSgn, pLength, pData, pBN ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACDuplicate_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACDuplicate_rmf.c new file mode 100644 index 000000000..f569c4a91 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACDuplicate_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) +IPPAPI(IppStatus, l9_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) +IPPAPI(IppStatus, y8_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACFinal_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACFinal_rmf.c new file mode 100644 index 000000000..8e258d309 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACFinal_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, l9_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, y8_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACGetSize_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACGetSize_rmf.c new file mode 100644 index 000000000..8da676a7b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACGetSize_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACGetSize_rmf,(int* pSize)) +IPPAPI(IppStatus, l9_ippsHMACGetSize_rmf,(int* pSize)) +IPPAPI(IppStatus, y8_ippsHMACGetSize_rmf,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACGetSize_rmf,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACGetSize_rmf( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACGetSize_rmf( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACGetSize_rmf( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACGetTag_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACGetTag_rmf.c new file mode 100644 index 000000000..e5b963e14 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACGetTag_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, l9_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, y8_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACInit_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACInit_rmf.c new file mode 100644 index 000000000..8fd83e1ca --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACInit_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACMessage_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACMessage_rmf.c new file mode 100644 index 000000000..c98315c19 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACMessage_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACPack_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACPack_rmf.c new file mode 100644 index 000000000..98aea09f4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACPack_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, l9_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, y8_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACUnpack_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACUnpack_rmf.c new file mode 100644 index 000000000..0718ed4fb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACUnpack_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, l9_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, y8_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACUnpack_rmf( pBuffer, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACUnpack_rmf( pBuffer, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACUnpack_rmf( pBuffer, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACUpdate_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACUpdate_rmf.c new file mode 100644 index 000000000..ef6ad5250 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMACUpdate_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, l9_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) +IPPAPI(IppStatus, y8_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMACUpdate_rmf( pSrc, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMACUpdate_rmf( pSrc, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMACUpdate_rmf( pSrc, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Duplicate.c new file mode 100644 index 000000000..12d034f5a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) +IPPAPI(IppStatus, l9_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) +IPPAPI(IppStatus, y8_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Final.c new file mode 100644 index 000000000..2149a3e1a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) +IPPAPI(IppStatus, l9_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) +IPPAPI(IppStatus, y8_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_Final( pMD, mdLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_Final( pMD, mdLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_Final( pMD, mdLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_GetSize.c new file mode 100644 index 000000000..27737af6f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsHMAC_GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsHMAC_GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_GetTag.c new file mode 100644 index 000000000..d6e860b68 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) +IPPAPI(IppStatus, l9_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) +IPPAPI(IppStatus, y8_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_GetTag( pMD, mdLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_GetTag( pMD, mdLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_GetTag( pMD, mdLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Init.c new file mode 100644 index 000000000..f4d882da2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, l9_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, y8_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Message.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Message.c new file mode 100644 index 000000000..e6eba4eb6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Message.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, l9_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, y8_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Pack.c new file mode 100644 index 000000000..ef5c8c73c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, l9_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, y8_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Unpack.c new file mode 100644 index 000000000..ff388771b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) +IPPAPI(IppStatus, l9_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) +IPPAPI(IppStatus, y8_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_Unpack( pBuffer, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_Unpack( pBuffer, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_Unpack( pBuffer, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Update.c new file mode 100644 index 000000000..39cd5878e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHMAC_Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) +IPPAPI(IppStatus, l9_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) +IPPAPI(IppStatus, y8_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHMAC_Update( pSrc, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHMAC_Update( pSrc, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHMAC_Update( pSrc, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashDuplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashDuplicate.c new file mode 100644 index 000000000..4d73af125 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashDuplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) +IPPAPI(IppStatus, l9_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) +IPPAPI(IppStatus, y8_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashDuplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashDuplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashDuplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashDuplicate_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashDuplicate_rmf.c new file mode 100644 index 000000000..5c64ca44c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashDuplicate_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) +IPPAPI(IppStatus, l9_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) +IPPAPI(IppStatus, y8_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashDuplicate_rmf( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashDuplicate_rmf( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashDuplicate_rmf( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashFinal.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashFinal.c new file mode 100644 index 000000000..0884187d8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashFinal.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) +IPPAPI(IppStatus, l9_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) +IPPAPI(IppStatus, y8_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashFinal( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashFinal( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashFinal( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashFinal_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashFinal_rmf.c new file mode 100644 index 000000000..59f7825d7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashFinal_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) +IPPAPI(IppStatus, l9_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) +IPPAPI(IppStatus, y8_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashFinal_rmf( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashFinal_rmf( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashFinal_rmf( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetInfo_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetInfo_rmf.c new file mode 100644 index 000000000..603af841f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetInfo_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) +IPPAPI(IppStatus, l9_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) +IPPAPI(IppStatus, y8_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashGetInfo_rmf( pInfo, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashGetInfo_rmf( pInfo, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashGetInfo_rmf( pInfo, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetSize.c new file mode 100644 index 000000000..ac7e3250a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashGetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsHashGetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsHashGetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHashGetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetSize_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetSize_rmf.c new file mode 100644 index 000000000..2f12eadfc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetSize_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashGetSize_rmf,(int* pSize)) +IPPAPI(IppStatus, l9_ippsHashGetSize_rmf,(int* pSize)) +IPPAPI(IppStatus, y8_ippsHashGetSize_rmf,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHashGetSize_rmf,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashGetSize_rmf( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashGetSize_rmf( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashGetSize_rmf( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetTag.c new file mode 100644 index 000000000..a8a93d774 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) +IPPAPI(IppStatus, l9_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) +IPPAPI(IppStatus, y8_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashGetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashGetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashGetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetTag_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetTag_rmf.c new file mode 100644 index 000000000..bbd8e764d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashGetTag_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) +IPPAPI(IppStatus, l9_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) +IPPAPI(IppStatus, y8_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashGetTag_rmf( pMD, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashGetTag_rmf( pMD, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashGetTag_rmf( pMD, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashInit.c new file mode 100644 index 000000000..20431a58e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, l9_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, y8_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) + +IPPFUN(IppStatus, sgx_disp_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashInit( pState, hashAlg ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashInit( pState, hashAlg ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashInit( pState, hashAlg ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashInit_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashInit_rmf.c new file mode 100644 index 000000000..cb2eacb63 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashInit_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashInit_rmf( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashInit_rmf( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashInit_rmf( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMessage.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMessage.c new file mode 100644 index 000000000..e350c8b4e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMessage.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, l9_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, y8_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) + +IPPFUN(IppStatus, sgx_disp_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMessage( pMsg, len, pMD, hashAlg ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMessage( pMsg, len, pMD, hashAlg ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMessage( pMsg, len, pMD, hashAlg ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMessage_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMessage_rmf.c new file mode 100644 index 000000000..1c6f4fdde --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMessage_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodGetInfo.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodGetInfo.c new file mode 100644 index 000000000..49855124a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodGetInfo.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodGetInfo( pInfo, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodGetInfo( pInfo, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodGetInfo( pInfo, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodGetSize.c new file mode 100644 index 000000000..1d82cab89 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodGetSize, (int* pSize) ) +IPPAPI( IppStatus, l9_ippsHashMethodGetSize, (int* pSize) ) +IPPAPI( IppStatus, y8_ippsHashMethodGetSize, (int* pSize) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodGetSize, (int* pSize) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_MD5.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_MD5.c new file mode 100644 index 000000000..55e28d14b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_MD5.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_MD5( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_MD5( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_MD5( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1.c new file mode 100644 index 000000000..1b82fd7d0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA1( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA1( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA1( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1_NI.c new file mode 100644 index 000000000..a81067c0d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA1_NI( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA1_NI( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA1_NI( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1_TT.c new file mode 100644 index 000000000..55f9e416b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA1_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA1_TT( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA1_TT( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA1_TT( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224.c new file mode 100644 index 000000000..9a86c13b7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA224( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA224( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA224( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224_NI.c new file mode 100644 index 000000000..79186d59a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA224_NI( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA224_NI( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA224_NI( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224_TT.c new file mode 100644 index 000000000..ac57a19f9 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA224_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA224_TT( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA224_TT( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA224_TT( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256.c new file mode 100644 index 000000000..a0dd3df48 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA256( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA256( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA256( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256_NI.c new file mode 100644 index 000000000..6f62c601c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA256_NI( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA256_NI( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA256_NI( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256_TT.c new file mode 100644 index 000000000..2315646a1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA256_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA256_TT( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA256_TT( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA256_TT( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA384.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA384.c new file mode 100644 index 000000000..6eab7d3c6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA384.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA384( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA384( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA384( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512.c new file mode 100644 index 000000000..d46f08d1c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA512( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA512( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA512( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512_224.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512_224.c new file mode 100644 index 000000000..3500b6548 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512_224.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA512_224( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA512_224( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA512_224( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512_256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512_256.c new file mode 100644 index 000000000..15f1a3b36 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SHA512_256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SHA512_256( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SHA512_256( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SHA512_256( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SM3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SM3.c new file mode 100644 index 000000000..8e1ef35d6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethodSet_SM3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethodSet_SM3( pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethodSet_SM3( pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethodSet_SM3( pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_MD5.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_MD5.c new file mode 100644 index 000000000..8f1acf2c5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_MD5.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_MD5, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_MD5, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_MD5, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_MD5, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_MD5( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_MD5( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_MD5( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1.c new file mode 100644 index 000000000..a7b3810c0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA1, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA1, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA1, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA1, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA1( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA1( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA1( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1_NI.c new file mode 100644 index 000000000..a84bde762 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA1_NI, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA1_NI, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA1_NI, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA1_NI, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA1_NI( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA1_NI( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA1_NI( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1_TT.c new file mode 100644 index 000000000..32d4f1bb0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA1_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA1_TT, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA1_TT, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA1_TT, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA1_TT, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA1_TT( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA1_TT( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA1_TT( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224.c new file mode 100644 index 000000000..47b8b22d9 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA224, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA224, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA224, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA224, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA224( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA224( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA224( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224_NI.c new file mode 100644 index 000000000..37d70475d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA224_NI, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA224_NI, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA224_NI, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA224_NI, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA224_NI( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA224_NI( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA224_NI( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224_TT.c new file mode 100644 index 000000000..64a56a020 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA224_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA224_TT, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA224_TT, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA224_TT, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA224_TT, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA224_TT( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA224_TT( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA224_TT( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256.c new file mode 100644 index 000000000..ce118ef98 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA256, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA256, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA256, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA256, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA256( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA256( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA256( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256_NI.c new file mode 100644 index 000000000..938954dfb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA256_NI, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA256_NI, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA256_NI, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA256_NI, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA256_NI( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA256_NI( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA256_NI( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256_TT.c new file mode 100644 index 000000000..0bd67389b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA256_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA256_TT, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA256_TT, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA256_TT, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA256_TT, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA256_TT( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA256_TT( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA256_TT( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA384.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA384.c new file mode 100644 index 000000000..7c77b1309 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA384.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA384, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA384, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA384, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA384, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA384( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA384( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA384( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512.c new file mode 100644 index 000000000..aa774b47f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA512, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA512, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA512, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA512, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA512( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA512( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA512( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512_224.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512_224.c new file mode 100644 index 000000000..b090f0dcc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512_224.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA512_224, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA512_224, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA512_224, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA512_224, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA512_224( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA512_224( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA512_224( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512_256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512_256.c new file mode 100644 index 000000000..fb1cd7bd0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SHA512_256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA512_256, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA512_256, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA512_256, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SHA512_256, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SHA512_256( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SHA512_256( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SHA512_256( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SM3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SM3.c new file mode 100644 index 000000000..81b8e1720 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashMethod_SM3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SM3, (void) ) +IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SM3, (void) ) +IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SM3, (void) ) + +IPPFUN( const IppsHashMethod*, sgx_disp_ippsHashMethod_SM3, (void) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashMethod_SM3( ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashMethod_SM3( ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashMethod_SM3( ); + } else + return NULL; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashPack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashPack.c new file mode 100644 index 000000000..838baca79 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashPack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, l9_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, y8_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashPack( pState, pBuffer, bufSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashPack( pState, pBuffer, bufSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashPack( pState, pBuffer, bufSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashPack_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashPack_rmf.c new file mode 100644 index 000000000..ff37a744b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashPack_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, l9_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) +IPPAPI(IppStatus, y8_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) + +IPPFUN(IppStatus, sgx_disp_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashPack_rmf( pState, pBuffer, bufSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashPack_rmf( pState, pBuffer, bufSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashPack_rmf( pState, pBuffer, bufSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224.c new file mode 100644 index 000000000..39630722e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA224( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA224( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA224( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224_NI.c new file mode 100644 index 000000000..c856dd0a2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA224_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA224_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA224_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA224_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA224_NI( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA224_NI( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA224_NI( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224_TT.c new file mode 100644 index 000000000..db94f24a2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA224_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA224_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA224_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA224_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA224_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA224_TT( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA224_TT( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA224_TT( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256.c new file mode 100644 index 000000000..78cebdff4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA256( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA256( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA256( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256_NI.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256_NI.c new file mode 100644 index 000000000..e9e8358f5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256_NI.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA256_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA256_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA256_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA256_NI, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA256_NI( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA256_NI( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA256_NI( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256_TT.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256_TT.c new file mode 100644 index 000000000..ad6ef2956 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA256_TT.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA256_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA256_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA256_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA256_TT, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA256_TT( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA256_TT( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA256_TT( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA384.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA384.c new file mode 100644 index 000000000..f8218e9b7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA384.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA384, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA384, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA384, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA384, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA384( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA384( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA384( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512.c new file mode 100644 index 000000000..dd4b43dc4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA512, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA512, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA512, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA512, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA512( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA512( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA512( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512_224.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512_224.c new file mode 100644 index 000000000..4b321ee06 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512_224.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA512_224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA512_224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA512_224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA512_224, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA512_224( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA512_224( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA512_224( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512_256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512_256.c new file mode 100644 index 000000000..dd4196db5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SHA512_256.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SHA512_256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SHA512_256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SHA512_256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SHA512_256, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SHA512_256( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SHA512_256( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SHA512_256( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SM3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SM3.c new file mode 100644 index 000000000..fc8a7396f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashStateMethodSet_SM3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI( IppStatus, k1_ippsHashStateMethodSet_SM3, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, l9_ippsHashStateMethodSet_SM3, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +IPPAPI( IppStatus, y8_ippsHashStateMethodSet_SM3, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) + +IPPFUN( IppStatus, sgx_disp_ippsHashStateMethodSet_SM3, (IppsHashState_rmf* pState, IppsHashMethod* pMethod) ) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashStateMethodSet_SM3( pState, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashStateMethodSet_SM3( pState, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashStateMethodSet_SM3( pState, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUnpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUnpack.c new file mode 100644 index 000000000..6dd3ba3d8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUnpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) +IPPAPI(IppStatus, l9_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) +IPPAPI(IppStatus, y8_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashUnpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashUnpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashUnpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUnpack_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUnpack_rmf.c new file mode 100644 index 000000000..8a142d62a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUnpack_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) +IPPAPI(IppStatus, l9_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) +IPPAPI(IppStatus, y8_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashUnpack_rmf( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashUnpack_rmf( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashUnpack_rmf( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUpdate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUpdate.c new file mode 100644 index 000000000..1708a7f5f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUpdate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) +IPPAPI(IppStatus, l9_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) +IPPAPI(IppStatus, y8_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashUpdate( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashUpdate( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashUpdate( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUpdate_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUpdate_rmf.c new file mode 100644 index 000000000..291444f0f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsHashUpdate_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) +IPPAPI(IppStatus, l9_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) +IPPAPI(IppStatus, y8_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsHashUpdate_rmf( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsHashUpdate_rmf( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsHashUpdate_rmf( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMAC_BN_I.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMAC_BN_I.c new file mode 100644 index 000000000..df35c0e33 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMAC_BN_I.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMAC_BN_I( pA, pB, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMAC_BN_I( pA, pB, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMAC_BN_I( pA, pB, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Duplicate.c new file mode 100644 index 000000000..e40a5122d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) +IPPAPI(IppStatus, l9_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) +IPPAPI(IppStatus, y8_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5Duplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Final.c new file mode 100644 index 000000000..2c10b8f25 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) +IPPAPI(IppStatus, l9_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) +IPPAPI(IppStatus, y8_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5Final( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5Final( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5Final( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5GetSize.c new file mode 100644 index 000000000..662512216 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsMD5GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsMD5GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5GetTag.c new file mode 100644 index 000000000..dce8b00b4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) +IPPAPI(IppStatus, l9_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) +IPPAPI(IppStatus, y8_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5GetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Init.c new file mode 100644 index 000000000..facf95149 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5Init,(IppsMD5State* pState)) +IPPAPI(IppStatus, l9_ippsMD5Init,(IppsMD5State* pState)) +IPPAPI(IppStatus, y8_ippsMD5Init,(IppsMD5State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5Init,(IppsMD5State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5Init( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5Init( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5Init( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5MessageDigest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5MessageDigest.c new file mode 100644 index 000000000..16cf2eefc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5MessageDigest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, l9_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, y8_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5MessageDigest( pMsg, len, pMD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Pack.c new file mode 100644 index 000000000..e92a3d077 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5Pack( pState, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5Pack( pState, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5Pack( pState, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Unpack.c new file mode 100644 index 000000000..a771838a6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) +IPPAPI(IppStatus, l9_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) +IPPAPI(IppStatus, y8_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5Unpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5Unpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5Unpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Update.c new file mode 100644 index 000000000..5de972334 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMD5Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) +IPPAPI(IppStatus, l9_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) +IPPAPI(IppStatus, y8_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMD5Update( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMD5Update( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMD5Update( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF.c new file mode 100644 index 000000000..cd125e5fa --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, l9_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) +IPPAPI(IppStatus, y8_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) + +IPPFUN(IppStatus, sgx_disp_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF1_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF1_rmf.c new file mode 100644 index 000000000..7580ded2e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF1_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF2_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF2_rmf.c new file mode 100644 index 000000000..cdcb2fcd0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMGF2_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, l9_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) +IPPAPI(IppStatus, y8_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) + +IPPFUN(IppStatus, sgx_disp_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsModInv_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsModInv_BN.c new file mode 100644 index 000000000..5e6c9fa97 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsModInv_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) +IPPAPI(IppStatus, l9_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) +IPPAPI(IppStatus, y8_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) + +IPPFUN(IppStatus, sgx_disp_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsModInv_BN( pA, pM, pInv ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsModInv_BN( pA, pM, pInv ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsModInv_BN( pA, pM, pInv ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMod_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMod_BN.c new file mode 100644 index 000000000..f2499a29c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMod_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMod_BN( pA, pM, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMod_BN( pA, pM, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMod_BN( pA, pM, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontExp.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontExp.c new file mode 100644 index 000000000..fac540ba3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontExp.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMontExp( pA, pE, m, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMontExp( pA, pE, m, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMontExp( pA, pE, m, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontForm.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontForm.c new file mode 100644 index 000000000..e8b0f8b26 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontForm.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMontForm( pA, pCtx, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMontForm( pA, pCtx, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMontForm( pA, pCtx, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontGet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontGet.c new file mode 100644 index 000000000..c4f3fdfaf --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontGet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) +IPPAPI(IppStatus, l9_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) +IPPAPI(IppStatus, y8_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMontGet( pModulo, pSize, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMontGet( pModulo, pSize, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMontGet( pModulo, pSize, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontGetSize.c new file mode 100644 index 000000000..887076099 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) +IPPAPI(IppStatus, l9_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) +IPPAPI(IppStatus, y8_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMontGetSize( method, length, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMontGetSize( method, length, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMontGetSize( method, length, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontInit.c new file mode 100644 index 000000000..a6e4b080f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) +IPPAPI(IppStatus, l9_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) +IPPAPI(IppStatus, y8_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMontInit( method, length, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMontInit( method, length, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMontInit( method, length, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontMul.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontMul.c new file mode 100644 index 000000000..296d322cc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontMul.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMontMul( pA, pB, m, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMontMul( pA, pB, m, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMontMul( pA, pB, m, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontSet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontSet.c new file mode 100644 index 000000000..df84d94e8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMontSet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) +IPPAPI(IppStatus, l9_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) +IPPAPI(IppStatus, y8_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMontSet( pModulo, size, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMontSet( pModulo, size, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMontSet( pModulo, size, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMul_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMul_BN.c new file mode 100644 index 000000000..0f51bf4ab --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsMul_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsMul_BN( pA, pB, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsMul_BN( pA, pB, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsMul_BN( pA, pB, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGGetSeed.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGGetSeed.c new file mode 100644 index 000000000..6e8e0b807 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGGetSeed.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) +IPPAPI(IppStatus, l9_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) +IPPAPI(IppStatus, y8_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGGetSeed( pCtx, pSeed ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGGetSeed( pCtx, pSeed ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGGetSeed( pCtx, pSeed ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGGetSize.c new file mode 100644 index 000000000..9d0c0ab4c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGGetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsPRNGGetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsPRNGGetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGGetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGInit.c new file mode 100644 index 000000000..a7423800d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGInit( seedBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGInit( seedBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGInit( seedBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetAugment.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetAugment.c new file mode 100644 index 000000000..93a2aa429 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetAugment.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGSetAugment( pAug, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGSetAugment( pAug, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGSetAugment( pAug, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetH0.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetH0.c new file mode 100644 index 000000000..79880e740 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetH0.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGSetH0( pH0, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGSetH0( pH0, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGSetH0( pH0, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetModulus.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetModulus.c new file mode 100644 index 000000000..938e4182c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetModulus.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGSetModulus( pMod, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGSetModulus( pMod, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGSetModulus( pMod, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetSeed.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetSeed.c new file mode 100644 index 000000000..64441f1ab --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGSetSeed.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGSetSeed( pSeed, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGSetSeed( pSeed, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGSetSeed( pSeed, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGen.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGen.c new file mode 100644 index 000000000..0f54d9227 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGen.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGen( pRand, nBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGen( pRand, nBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGen( pRand, nBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGenRDRAND.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGenRDRAND.c new file mode 100644 index 000000000..7723ae488 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGenRDRAND.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGenRDRAND( pRand, nBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGenRDRAND( pRand, nBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGenRDRAND( pRand, nBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGenRDRAND_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGenRDRAND_BN.c new file mode 100644 index 000000000..d2cb38bc1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGenRDRAND_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGen_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGen_BN.c new file mode 100644 index 000000000..5f59ea47a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPRNGen_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, l9_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, y8_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPRNGen_BN( pRand, nBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPRNGen_BN( pRand, nBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPRNGen_BN( pRand, nBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGen.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGen.c new file mode 100644 index 000000000..dbfca4823 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGen.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGen_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGen_BN.c new file mode 100644 index 000000000..4d368b5a8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGen_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGet.c new file mode 100644 index 000000000..ee0c46b1e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) +IPPAPI(IppStatus, l9_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) +IPPAPI(IppStatus, y8_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeGet( pPrime, pLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeGet( pPrime, pLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeGet( pPrime, pLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGetSize.c new file mode 100644 index 000000000..69926e62b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeGetSize,(int nMaxBits, int* pSize)) +IPPAPI(IppStatus, l9_ippsPrimeGetSize,(int nMaxBits, int* pSize)) +IPPAPI(IppStatus, y8_ippsPrimeGetSize,(int nMaxBits, int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeGetSize,(int nMaxBits, int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeGetSize( nMaxBits, pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeGetSize( nMaxBits, pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeGetSize( nMaxBits, pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGet_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGet_BN.c new file mode 100644 index 000000000..ff4b9a51f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeGet_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) +IPPAPI(IppStatus, l9_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) +IPPAPI(IppStatus, y8_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeGet_BN( pPrime, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeGet_BN( pPrime, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeGet_BN( pPrime, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeInit.c new file mode 100644 index 000000000..6ceb594a6 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) +IPPAPI(IppStatus, l9_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) +IPPAPI(IppStatus, y8_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeInit( nMaxBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeInit( nMaxBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeInit( nMaxBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeSet.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeSet.c new file mode 100644 index 000000000..8a4c22008 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeSet.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) +IPPAPI(IppStatus, l9_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) +IPPAPI(IppStatus, y8_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeSet( pPrime, nBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeSet( pPrime, nBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeSet( pPrime, nBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeSet_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeSet_BN.c new file mode 100644 index 000000000..43ccd07eb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeSet_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) +IPPAPI(IppStatus, l9_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) +IPPAPI(IppStatus, y8_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeSet_BN( pPrime, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeSet_BN( pPrime, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeSet_BN( pPrime, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeTest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeTest.c new file mode 100644 index 000000000..8ee64f96c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeTest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeTest_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeTest_BN.c new file mode 100644 index 000000000..bcbca8fd4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsPrimeTest_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_OAEP.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_OAEP.c new file mode 100644 index 000000000..352ab1577 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_OAEP.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_OAEP_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_OAEP_rmf.c new file mode 100644 index 000000000..09232d53d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_OAEP_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_PKCSv15.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_PKCSv15.c new file mode 100644 index 000000000..71ac07972 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSADecrypt_PKCSv15.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_OAEP.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_OAEP.c new file mode 100644 index 000000000..46120d905 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_OAEP.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_OAEP_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_OAEP_rmf.c new file mode 100644 index 000000000..ab493f150 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_OAEP_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_PKCSv15.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_PKCSv15.c new file mode 100644 index 000000000..e0ca19533 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAEncrypt_PKCSv15.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PKCS1v15.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PKCS1v15.c new file mode 100644 index 000000000..a0d481791 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PKCS1v15.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PKCS1v15_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PKCS1v15_rmf.c new file mode 100644 index 000000000..da4a962c5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PKCS1v15_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PSS.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PSS.c new file mode 100644 index 000000000..a9f561b65 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PSS.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PSS_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PSS_rmf.c new file mode 100644 index 000000000..119392b37 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSASign_PSS_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PKCS1v15.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PKCS1v15.c new file mode 100644 index 000000000..1c4860d5f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PKCS1v15.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PKCS1v15_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PKCS1v15_rmf.c new file mode 100644 index 000000000..e8f3d7985 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PKCS1v15_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PSS.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PSS.c new file mode 100644 index 000000000..1f786e3ed --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PSS.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PSS_rmf.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PSS_rmf.c new file mode 100644 index 000000000..5f95bfe3a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSAVerify_PSS_rmf.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_Decrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_Decrypt.c new file mode 100644 index 000000000..6d7d601e1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_Decrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_Encrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_Encrypt.c new file mode 100644 index 000000000..95f2a26cd --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_Encrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, l9_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) +IPPAPI(IppStatus, y8_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GenerateKeys.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GenerateKeys.c new file mode 100644 index 000000000..44c401386 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GenerateKeys.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetBufferSizePrivateKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetBufferSizePrivateKey.c new file mode 100644 index 000000000..86ea72a91 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetBufferSizePrivateKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetBufferSizePublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetBufferSizePublicKey.c new file mode 100644 index 000000000..2887876ed --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetBufferSizePublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPrivateKeyType1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPrivateKeyType1.c new file mode 100644 index 000000000..50dbf2de5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPrivateKeyType1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPrivateKeyType2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPrivateKeyType2.c new file mode 100644 index 000000000..365ca362d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPrivateKeyType2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPublicKey.c new file mode 100644 index 000000000..2390fedf8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetPublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePrivateKeyType1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePrivateKeyType1.c new file mode 100644 index 000000000..f7ca0d1a8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePrivateKeyType1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) +IPPAPI(IppStatus, l9_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) +IPPAPI(IppStatus, y8_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePrivateKeyType2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePrivateKeyType2.c new file mode 100644 index 000000000..c62bfaf8b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePrivateKeyType2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) +IPPAPI(IppStatus, l9_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) +IPPAPI(IppStatus, y8_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePublicKey.c new file mode 100644 index 000000000..8e9a8274f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_GetSizePublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) +IPPAPI(IppStatus, l9_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) +IPPAPI(IppStatus, y8_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPrivateKeyType1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPrivateKeyType1.c new file mode 100644 index 000000000..d3cc2fe08 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPrivateKeyType1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) +IPPAPI(IppStatus, l9_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) +IPPAPI(IppStatus, y8_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPrivateKeyType2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPrivateKeyType2.c new file mode 100644 index 000000000..ed5ef6061 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPrivateKeyType2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) +IPPAPI(IppStatus, l9_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) +IPPAPI(IppStatus, y8_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPublicKey.c new file mode 100644 index 000000000..8d34cf1de --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_InitPublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) +IPPAPI(IppStatus, l9_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) +IPPAPI(IppStatus, y8_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPrivateKeyType1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPrivateKeyType1.c new file mode 100644 index 000000000..03f0f9803 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPrivateKeyType1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPrivateKeyType2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPrivateKeyType2.c new file mode 100644 index 000000000..09f19f411 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPrivateKeyType2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPublicKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPublicKey.c new file mode 100644 index 000000000..5190b4c57 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_SetPublicKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) +IPPAPI(IppStatus, l9_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) +IPPAPI(IppStatus, y8_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_ValidateKeys.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_ValidateKeys.c new file mode 100644 index 000000000..867ecec1e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRSA_ValidateKeys.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, l9_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) +IPPAPI(IppStatus, y8_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) + +IPPFUN(IppStatus, sgx_disp_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRef_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRef_BN.c new file mode 100644 index 000000000..a520daec2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsRef_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, l9_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) +IPPAPI(IppStatus, y8_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) + +IPPFUN(IppStatus, sgx_disp_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsRef_BN( pSgn, bitSize, ppData, pBN ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsRef_BN( pSgn, bitSize, ppData, pBN ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsRef_BN( pSgn, bitSize, ppData, pBN ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Duplicate.c new file mode 100644 index 000000000..3d696695f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) +IPPAPI(IppStatus, l9_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) +IPPAPI(IppStatus, y8_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1Duplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Final.c new file mode 100644 index 000000000..92c5ec4b4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) +IPPAPI(IppStatus, l9_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) +IPPAPI(IppStatus, y8_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1Final( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1Final( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1Final( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1GetSize.c new file mode 100644 index 000000000..a623a5491 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsSHA1GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsSHA1GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1GetTag.c new file mode 100644 index 000000000..383f649aa --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) +IPPAPI(IppStatus, l9_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) +IPPAPI(IppStatus, y8_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1GetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Init.c new file mode 100644 index 000000000..e94ed519d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1Init,(IppsSHA1State* pState)) +IPPAPI(IppStatus, l9_ippsSHA1Init,(IppsSHA1State* pState)) +IPPAPI(IppStatus, y8_ippsSHA1Init,(IppsSHA1State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1Init,(IppsSHA1State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1Init( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1Init( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1Init( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1MessageDigest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1MessageDigest.c new file mode 100644 index 000000000..4a51a3873 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1MessageDigest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, l9_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, y8_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1MessageDigest( pMsg, len, pMD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Pack.c new file mode 100644 index 000000000..cb26b14f0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1Pack( pState, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1Pack( pState, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1Pack( pState, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Unpack.c new file mode 100644 index 000000000..334c77d26 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) +IPPAPI(IppStatus, l9_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) +IPPAPI(IppStatus, y8_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1Unpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1Unpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1Unpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Update.c new file mode 100644 index 000000000..dee3a61e0 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA1Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) +IPPAPI(IppStatus, l9_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) +IPPAPI(IppStatus, y8_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA1Update( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA1Update( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA1Update( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Duplicate.c new file mode 100644 index 000000000..1d624c3f5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) +IPPAPI(IppStatus, l9_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) +IPPAPI(IppStatus, y8_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224Duplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Final.c new file mode 100644 index 000000000..ab7a5fda2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) +IPPAPI(IppStatus, l9_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) +IPPAPI(IppStatus, y8_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224Final( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224Final( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224Final( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224GetSize.c new file mode 100644 index 000000000..e7f801086 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsSHA224GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsSHA224GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224GetTag.c new file mode 100644 index 000000000..50d1ca64f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) +IPPAPI(IppStatus, l9_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) +IPPAPI(IppStatus, y8_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224GetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Init.c new file mode 100644 index 000000000..da1d4d7d2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224Init,(IppsSHA224State* pState)) +IPPAPI(IppStatus, l9_ippsSHA224Init,(IppsSHA224State* pState)) +IPPAPI(IppStatus, y8_ippsSHA224Init,(IppsSHA224State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224Init,(IppsSHA224State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224Init( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224Init( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224Init( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224MessageDigest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224MessageDigest.c new file mode 100644 index 000000000..cf78bd16f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224MessageDigest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, l9_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, y8_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224MessageDigest( pMsg, len, pMD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Pack.c new file mode 100644 index 000000000..5364a9e66 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224Pack( pState, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224Pack( pState, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224Pack( pState, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Unpack.c new file mode 100644 index 000000000..f79d1c5b3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) +IPPAPI(IppStatus, l9_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) +IPPAPI(IppStatus, y8_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224Unpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224Unpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224Unpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Update.c new file mode 100644 index 000000000..f8afd7e75 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA224Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) +IPPAPI(IppStatus, l9_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) +IPPAPI(IppStatus, y8_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA224Update( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA224Update( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA224Update( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Duplicate.c new file mode 100644 index 000000000..01df16096 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) +IPPAPI(IppStatus, l9_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) +IPPAPI(IppStatus, y8_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256Duplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Final.c new file mode 100644 index 000000000..f8c43ef10 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) +IPPAPI(IppStatus, l9_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) +IPPAPI(IppStatus, y8_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256Final( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256Final( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256Final( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256GetSize.c new file mode 100644 index 000000000..765706204 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsSHA256GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsSHA256GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256GetTag.c new file mode 100644 index 000000000..01a560880 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) +IPPAPI(IppStatus, l9_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) +IPPAPI(IppStatus, y8_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256GetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Init.c new file mode 100644 index 000000000..f781e0e83 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256Init,(IppsSHA256State* pState)) +IPPAPI(IppStatus, l9_ippsSHA256Init,(IppsSHA256State* pState)) +IPPAPI(IppStatus, y8_ippsSHA256Init,(IppsSHA256State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256Init,(IppsSHA256State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256Init( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256Init( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256Init( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256MessageDigest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256MessageDigest.c new file mode 100644 index 000000000..0f0f374ed --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256MessageDigest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, l9_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, y8_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256MessageDigest( pMsg, len, pMD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Pack.c new file mode 100644 index 000000000..65ecbb330 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256Pack( pState, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256Pack( pState, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256Pack( pState, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Unpack.c new file mode 100644 index 000000000..bfe9d6c10 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) +IPPAPI(IppStatus, l9_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) +IPPAPI(IppStatus, y8_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256Unpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256Unpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256Unpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Update.c new file mode 100644 index 000000000..6e560afc1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA256Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) +IPPAPI(IppStatus, l9_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) +IPPAPI(IppStatus, y8_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA256Update( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA256Update( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA256Update( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Duplicate.c new file mode 100644 index 000000000..e708bcecf --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) +IPPAPI(IppStatus, l9_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) +IPPAPI(IppStatus, y8_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384Duplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Final.c new file mode 100644 index 000000000..d5d3f79e5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) +IPPAPI(IppStatus, l9_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) +IPPAPI(IppStatus, y8_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384Final( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384Final( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384Final( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384GetSize.c new file mode 100644 index 000000000..d7ddc38e1 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsSHA384GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsSHA384GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384GetTag.c new file mode 100644 index 000000000..0db3c1d7a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) +IPPAPI(IppStatus, l9_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) +IPPAPI(IppStatus, y8_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384GetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Init.c new file mode 100644 index 000000000..0d078f18a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384Init,(IppsSHA384State* pState)) +IPPAPI(IppStatus, l9_ippsSHA384Init,(IppsSHA384State* pState)) +IPPAPI(IppStatus, y8_ippsSHA384Init,(IppsSHA384State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384Init,(IppsSHA384State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384Init( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384Init( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384Init( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384MessageDigest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384MessageDigest.c new file mode 100644 index 000000000..95b3f7842 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384MessageDigest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, l9_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, y8_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384MessageDigest( pMsg, len, pMD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Pack.c new file mode 100644 index 000000000..1f319b871 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384Pack( pState, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384Pack( pState, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384Pack( pState, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Unpack.c new file mode 100644 index 000000000..d6a90536b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) +IPPAPI(IppStatus, l9_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) +IPPAPI(IppStatus, y8_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384Unpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384Unpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384Unpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Update.c new file mode 100644 index 000000000..d7e21c9f7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA384Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) +IPPAPI(IppStatus, l9_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) +IPPAPI(IppStatus, y8_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA384Update( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA384Update( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA384Update( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Duplicate.c new file mode 100644 index 000000000..82082ffd5 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) +IPPAPI(IppStatus, l9_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) +IPPAPI(IppStatus, y8_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512Duplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Final.c new file mode 100644 index 000000000..826d6e7f8 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) +IPPAPI(IppStatus, l9_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) +IPPAPI(IppStatus, y8_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512Final( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512Final( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512Final( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512GetSize.c new file mode 100644 index 000000000..312d8ae7c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsSHA512GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsSHA512GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512GetTag.c new file mode 100644 index 000000000..00404c522 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) +IPPAPI(IppStatus, l9_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) +IPPAPI(IppStatus, y8_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512GetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Init.c new file mode 100644 index 000000000..bd98c260e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512Init,(IppsSHA512State* pState)) +IPPAPI(IppStatus, l9_ippsSHA512Init,(IppsSHA512State* pState)) +IPPAPI(IppStatus, y8_ippsSHA512Init,(IppsSHA512State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512Init,(IppsSHA512State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512Init( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512Init( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512Init( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512MessageDigest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512MessageDigest.c new file mode 100644 index 000000000..70d0ec4e4 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512MessageDigest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, l9_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, y8_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512MessageDigest( pMsg, len, pMD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Pack.c new file mode 100644 index 000000000..9316ca3af --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512Pack( pState, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512Pack( pState, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512Pack( pState, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Unpack.c new file mode 100644 index 000000000..b5a78915e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) +IPPAPI(IppStatus, l9_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) +IPPAPI(IppStatus, y8_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512Unpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512Unpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512Unpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Update.c new file mode 100644 index 000000000..b59451b14 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSHA512Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) +IPPAPI(IppStatus, l9_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) +IPPAPI(IppStatus, y8_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSHA512Update( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSHA512Update( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSHA512Update( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Duplicate.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Duplicate.c new file mode 100644 index 000000000..ae0d2cf35 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Duplicate.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) +IPPAPI(IppStatus, l9_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) +IPPAPI(IppStatus, y8_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3Duplicate( pSrcState, pDstState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3Duplicate( pSrcState, pDstState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Final.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Final.c new file mode 100644 index 000000000..3e093c57e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Final.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) +IPPAPI(IppStatus, l9_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) +IPPAPI(IppStatus, y8_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3Final( pMD, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3Final( pMD, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3Final( pMD, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3GetSize.c new file mode 100644 index 000000000..46b3d619c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3GetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsSM3GetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsSM3GetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3GetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3GetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3GetTag.c new file mode 100644 index 000000000..d6691ad2d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3GetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) +IPPAPI(IppStatus, l9_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) +IPPAPI(IppStatus, y8_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3GetTag( pTag, tagLen, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3GetTag( pTag, tagLen, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Init.c new file mode 100644 index 000000000..c740148ed --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3Init,(IppsSM3State* pState)) +IPPAPI(IppStatus, l9_ippsSM3Init,(IppsSM3State* pState)) +IPPAPI(IppStatus, y8_ippsSM3Init,(IppsSM3State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3Init,(IppsSM3State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3Init( pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3Init( pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3Init( pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3MessageDigest.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3MessageDigest.c new file mode 100644 index 000000000..ef6d4a05f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3MessageDigest.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, l9_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +IPPAPI(IppStatus, y8_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3MessageDigest( pMsg, len, pMD ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3MessageDigest( pMsg, len, pMD ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Pack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Pack.c new file mode 100644 index 000000000..2a90376d3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Pack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, l9_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) +IPPAPI(IppStatus, y8_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3Pack( pState, pBuffer ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3Pack( pState, pBuffer ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3Pack( pState, pBuffer ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Unpack.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Unpack.c new file mode 100644 index 000000000..690714e09 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Unpack.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) +IPPAPI(IppStatus, l9_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) +IPPAPI(IppStatus, y8_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3Unpack( pBuffer, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3Unpack( pBuffer, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3Unpack( pBuffer, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Update.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Update.c new file mode 100644 index 000000000..39bcad78a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSM3Update.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) +IPPAPI(IppStatus, l9_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) +IPPAPI(IppStatus, y8_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) + +IPPFUN(IppStatus, sgx_disp_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSM3Update( pSrc, len, pState ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSM3Update( pSrc, len, pState ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSM3Update( pSrc, len, pState ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC.c new file mode 100644 index 000000000..aff7791cc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS1.c new file mode 100644 index 000000000..2b7e8e44f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS2.c new file mode 100644 index 000000000..a39d7e195 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS3.c new file mode 100644 index 000000000..aa6301513 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCBC_CS3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCFB.c new file mode 100644 index 000000000..b4d1a6c18 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCTR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCTR.c new file mode 100644 index 000000000..fd8e6ee2b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptCTR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptECB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptECB.c new file mode 100644 index 000000000..1a9b4f26f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptECB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptOFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptOFB.c new file mode 100644 index 000000000..24a5aceec --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4DecryptOFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC.c new file mode 100644 index 000000000..8412bb6a7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS1.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS1.c new file mode 100644 index 000000000..ebfdd92b7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS1.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS2.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS2.c new file mode 100644 index 000000000..0f1c9ebf7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS2.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS3.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS3.c new file mode 100644 index 000000000..7c41090f3 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCBC_CS3.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCFB.c new file mode 100644 index 000000000..64eeced64 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCTR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCTR.c new file mode 100644 index 000000000..4154f615b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptCTR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptECB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptECB.c new file mode 100644 index 000000000..b7cd73259 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptECB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptOFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptOFB.c new file mode 100644 index 000000000..0eb3b7bd7 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4EncryptOFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4GetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4GetSize.c new file mode 100644 index 000000000..80dbc8c3d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4GetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4GetSize,(int *pSize)) +IPPAPI(IppStatus, l9_ippsSMS4GetSize,(int *pSize)) +IPPAPI(IppStatus, y8_ippsSMS4GetSize,(int *pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4GetSize,(int *pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4GetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4GetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4GetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4Init.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4Init.c new file mode 100644 index 000000000..b1845c755 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4Init.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) +IPPAPI(IppStatus, l9_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) +IPPAPI(IppStatus, y8_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4SetKey.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4SetKey.c new file mode 100644 index 000000000..09172933c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4SetKey.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4SetKey( pKey, keyLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4SetKey( pKey, keyLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4SetKey( pKey, keyLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMDecrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMDecrypt.c new file mode 100644 index 000000000..03306391c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMDecrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMEncrypt.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMEncrypt.c new file mode 100644 index 000000000..22817efbb --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMEncrypt.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMGetSize.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMGetSize.c new file mode 100644 index 000000000..f118c802e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMGetSize.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMGetSize,(int* pSize)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMGetSize,(int* pSize)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMGetSize,(int* pSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMGetSize,(int* pSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMGetSize( pSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMGetSize( pSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMGetSize( pSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMGetTag.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMGetTag.c new file mode 100644 index 000000000..aa9455bc2 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMGetTag.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMInit.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMInit.c new file mode 100644 index 000000000..bbdb66189 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMInit.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMMessageLen.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMMessageLen.c new file mode 100644 index 000000000..a8cd0381b --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMMessageLen.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMMessageLen( msgLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMMessageLen( msgLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMMessageLen( msgLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMStart.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMStart.c new file mode 100644 index 000000000..744e5ae6e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMStart.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMTagLen.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMTagLen.c new file mode 100644 index 000000000..eb801212c --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSMS4_CCMTagLen.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, l9_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) +IPPAPI(IppStatus, y8_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSMS4_CCMTagLen( tagLen, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSMS4_CCMTagLen( tagLen, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSMS4_CCMTagLen( tagLen, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSetOctString_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSetOctString_BN.c new file mode 100644 index 000000000..49743e662 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSetOctString_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) +IPPAPI(IppStatus, l9_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) +IPPAPI(IppStatus, y8_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) + +IPPFUN(IppStatus, sgx_disp_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSetOctString_BN( pStr, strLen, pBN ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSetOctString_BN( pStr, strLen, pBN ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSetOctString_BN( pStr, strLen, pBN ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSet_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSet_BN.c new file mode 100644 index 000000000..9af25431e --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSet_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) +IPPAPI(IppStatus, l9_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) +IPPAPI(IppStatus, y8_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) + +IPPFUN(IppStatus, sgx_disp_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSet_BN( sgn, length, pData, pBN ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSet_BN( sgn, length, pData, pBN ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSet_BN( sgn, length, pData, pBN ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSub_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSub_BN.c new file mode 100644 index 000000000..7a3abc295 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsSub_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, l9_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +IPPAPI(IppStatus, y8_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) + +IPPFUN(IppStatus, sgx_disp_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsSub_BN( pA, pB, pR ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsSub_BN( pA, pB, pR ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsSub_BN( pA, pB, pR ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCBC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCBC.c new file mode 100644 index 000000000..85da7632d --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCBC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, l9_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, y8_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCFB.c new file mode 100644 index 000000000..c7a499b06 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, l9_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, y8_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCTR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCTR.c new file mode 100644 index 000000000..4a82c4d74 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptCTR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, l9_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, y8_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptECB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptECB.c new file mode 100644 index 000000000..5bcd29859 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptECB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) +IPPAPI(IppStatus, l9_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) +IPPAPI(IppStatus, y8_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptOFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptOFB.c new file mode 100644 index 000000000..876a1bdfe --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESDecryptOFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCBC.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCBC.c new file mode 100644 index 000000000..2f9fc5ccc --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCBC.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, l9_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, y8_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCFB.c new file mode 100644 index 000000000..87ce91706 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, l9_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +IPPAPI(IppStatus, y8_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCTR.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCTR.c new file mode 100644 index 000000000..6e5b50b49 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptCTR.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, l9_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) +IPPAPI(IppStatus, y8_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptECB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptECB.c new file mode 100644 index 000000000..67d95614a --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptECB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) +IPPAPI(IppStatus, l9_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) +IPPAPI(IppStatus, y8_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptOFB.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptOFB.c new file mode 100644 index 000000000..3d4af1130 --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTDESEncryptOFB.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) +IPPAPI(IppStatus, l9_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) +IPPAPI(IppStatus, y8_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) + +IPPFUN(IppStatus, sgx_disp_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTRNGenRDSEED.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTRNGenRDSEED.c new file mode 100644 index 000000000..dcc2fe28f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTRNGenRDSEED.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, l9_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, y8_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTRNGenRDSEED( pRand, nBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTRNGenRDSEED( pRand, nBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTRNGenRDSEED( pRand, nBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTRNGenRDSEED_BN.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTRNGenRDSEED_BN.c new file mode 100644 index 000000000..54fba285f --- /dev/null +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/intel64/ippsTRNGenRDSEED_BN.c @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#include "ippcp.h" + +#ifndef IPP_CALL +#define IPP_CALL IPP_STDCALL +#endif +#define IPPFUN(type,name,arg) extern type IPP_CALL name arg + +#ifndef NULL +#ifdef __cplusplus +#define NULL 0 +#else +#define NULL ((void *)0) +#endif +#endif + +#if defined (_M_AMD64) || defined (__x86_64__) + +#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) +#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) +#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) + +#ifdef __cplusplus +extern "C" { +#endif + +IPPAPI(IppStatus, k1_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, l9_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) +IPPAPI(IppStatus, y8_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) + +IPPFUN(IppStatus, sgx_disp_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) +{ + Ipp64u _features; + _features = ippcpGetEnabledCpuFeatures(); + + if( AVX3I_FEATURES == ( _features & AVX3I_FEATURES )) { + return k1_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); + } else + if( ippCPUID_AVX2 == ( _features & ippCPUID_AVX2 )) { + return l9_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); + } else + if( ippCPUID_SSE42 == ( _features & ippCPUID_SSE42 )) { + return y8_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); + } else + return ippStsCpuNotSupportedErr; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00000.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00000.c deleted file mode 100644 index af7275142..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00000.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppLibraryVersion*, y8_ippcpGetLibVersion, (void) ) -IPPAPI( const IppLibraryVersion*, l9_ippcpGetLibVersion, (void) ) -IPPAPI( const IppLibraryVersion*, k1_ippcpGetLibVersion, (void) ) - -IPPFUN( const IppLibraryVersion*,sgx_disp_ippcpGetLibVersion, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippcpGetLibVersion( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippcpGetLibVersion( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippcpGetLibVersion( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppLibraryVersion*, p8_ippcpGetLibVersion, (void) ) -IPPAPI( const IppLibraryVersion*, h9_ippcpGetLibVersion, (void) ) - -IPPFUN( const IppLibraryVersion*,sgx_disp_ippcpGetLibVersion, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippcpGetLibVersion( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippcpGetLibVersion( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00001.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00001.c deleted file mode 100644 index f8baca34d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00001.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDESGetSize,(int *size)) -IPPAPI(IppStatus, l9_ippsDESGetSize,(int *size)) -IPPAPI(IppStatus, k1_ippsDESGetSize,(int *size)) - -IPPFUN(IppStatus,sgx_disp_ippsDESGetSize,(int *size)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDESGetSize( size ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDESGetSize( size ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDESGetSize( size ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDESGetSize,(int *size)) -IPPAPI(IppStatus, h9_ippsDESGetSize,(int *size)) - -IPPFUN(IppStatus,sgx_disp_ippsDESGetSize,(int *size)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDESGetSize( size ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDESGetSize( size ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00002.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00002.c deleted file mode 100644 index 310861e1b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00002.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) -IPPAPI(IppStatus, l9_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) -IPPAPI(IppStatus, k1_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDESInit( pKey, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDESInit( pKey, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDESInit( pKey, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) -IPPAPI(IppStatus, h9_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDESInit,(const Ipp8u* pKey, IppsDESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDESInit( pKey, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDESInit( pKey, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00003.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00003.c deleted file mode 100644 index 2545e617a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00003.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDESPack( pCtx, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDESPack( pCtx, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDESPack( pCtx, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsDESPack,(const IppsDESSpec* pCtx, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDESPack( pCtx, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDESPack( pCtx, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00004.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00004.c deleted file mode 100644 index 704251b9e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00004.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) -IPPAPI(IppStatus, l9_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) -IPPAPI(IppStatus, k1_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDESUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDESUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDESUnpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) -IPPAPI(IppStatus, h9_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDESUnpack,(const Ipp8u* pBuffer, IppsDESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDESUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDESUnpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00005.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00005.c deleted file mode 100644 index 8cdc8e3c5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00005.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -IPPAPI(IppStatus, l9_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -IPPAPI(IppStatus, k1_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -IPPAPI(IppStatus, h9_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESEncryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00006.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00006.c deleted file mode 100644 index 077a084d2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00006.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -IPPAPI(IppStatus, l9_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -IPPAPI(IppStatus, k1_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -IPPAPI(IppStatus, h9_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESDecryptECB( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00007.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00007.c deleted file mode 100644 index 4fe7c4950..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00007.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, l9_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, k1_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, h9_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESEncryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00008.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00008.c deleted file mode 100644 index 4e33f907e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00008.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, l9_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, k1_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, h9_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESDecryptCBC( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00009.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00009.c deleted file mode 100644 index 73b9f67aa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00009.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, l9_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, k1_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, h9_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00010.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00010.c deleted file mode 100644 index 88b994b92..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00010.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, l9_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, k1_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -IPPAPI(IppStatus, h9_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, const Ipp8u* pIV, IppsCPPadding padding)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx1, pCtx2, pCtx3, pIV, padding ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00011.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00011.c deleted file mode 100644 index 674979398..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00011.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00012.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00012.c deleted file mode 100644 index 858e3f63f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00012.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx1, pCtx2, pCtx3, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00013.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00013.c deleted file mode 100644 index e76957bec..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00013.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, l9_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, k1_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, h9_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESEncryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00014.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00014.c deleted file mode 100644 index dc535cce5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00014.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, l9_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, k1_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, h9_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsTDESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsDESSpec* pCtx1, const IppsDESSpec* pCtx2, const IppsDESSpec* pCtx3, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTDESDecryptCTR( pSrc, pDst, len, pCtx1, pCtx2, pCtx3, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00015.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00015.c deleted file mode 100644 index 6fb991355..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00015.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESGetSize,(int *pSize)) -IPPAPI(IppStatus, l9_ippsAESGetSize,(int *pSize)) -IPPAPI(IppStatus, k1_ippsAESGetSize,(int *pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESGetSize,(int *pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESGetSize,(int *pSize)) -IPPAPI(IppStatus, h9_ippsAESGetSize,(int *pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESGetSize,(int *pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00016.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00016.c deleted file mode 100644 index 0d6634592..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00016.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) -IPPAPI(IppStatus, l9_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) -IPPAPI(IppStatus, k1_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) -IPPAPI(IppStatus, h9_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESInit,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESInit( pKey, keyLen, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00017.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00017.c deleted file mode 100644 index 02f6c6383..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00017.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) -IPPAPI(IppStatus, l9_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) -IPPAPI(IppStatus, k1_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESSetKey( pKey, keyLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESSetKey( pKey, keyLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESSetKey( pKey, keyLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) -IPPAPI(IppStatus, h9_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsAESSetKey,(const Ipp8u* pKey, int keyLen, IppsAESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESSetKey( pKey, keyLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESSetKey( pKey, keyLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00018.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00018.c deleted file mode 100644 index 2b6feed3d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00018.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, l9_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, k1_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESPack( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESPack( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESPack( pCtx, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, h9_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESPack,(const IppsAESSpec* pCtx, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESPack( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESPack( pCtx, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00019.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00019.c deleted file mode 100644 index 8daa3eff7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00019.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) -IPPAPI(IppStatus, l9_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) -IPPAPI(IppStatus, k1_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESUnpack( pBuffer, pCtx, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESUnpack( pBuffer, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESUnpack( pBuffer, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) -IPPAPI(IppStatus, h9_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESUnpack,(const Ipp8u* pBuffer, IppsAESSpec* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESUnpack( pBuffer, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESUnpack( pBuffer, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00020.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00020.c deleted file mode 100644 index f04fb4f9a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00020.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -IPPAPI(IppStatus, l9_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -IPPAPI(IppStatus, k1_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -IPPAPI(IppStatus, h9_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00021.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00021.c deleted file mode 100644 index feaba5884..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00021.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -IPPAPI(IppStatus, l9_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -IPPAPI(IppStatus, k1_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -IPPAPI(IppStatus, h9_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00022.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00022.c deleted file mode 100644 index cbc25d5e0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00022.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00023.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00023.c deleted file mode 100644 index 9518854fb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00023.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00024.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00024.c deleted file mode 100644 index 5b108febe..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00024.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00025.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00025.c deleted file mode 100644 index 7c1c38365..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00025.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00026.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00026.c deleted file mode 100644 index 8640f4a2f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00026.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00027.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00027.c deleted file mode 100644 index 8a877c9a1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00027.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00028.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00028.c deleted file mode 100644 index f38b6d528..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00028.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00029.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00029.c deleted file mode 100644 index eaf668f64..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00029.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00030.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00030.c deleted file mode 100644 index 11eba7dfb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00030.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00031.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00031.c deleted file mode 100644 index b389dc67f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00031.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsAESSpec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00032.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00032.c deleted file mode 100644 index 4adf930f1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00032.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00033.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00033.c deleted file mode 100644 index 4c679a138..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00033.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsAESSpec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00034.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00034.c deleted file mode 100644 index c764963fb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00034.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, l9_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, k1_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, h9_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00035.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00035.c deleted file mode 100644 index 364e1cea2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00035.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, l9_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, k1_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, h9_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsAESSpec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00036.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00036.c deleted file mode 100644 index 94cd95a3c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00036.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -IPPAPI(IppStatus, l9_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -IPPAPI(IppStatus, k1_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -IPPAPI(IppStatus, h9_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESEncryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESEncryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00037.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00037.c deleted file mode 100644 index 871e32805..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00037.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -IPPAPI(IppStatus, l9_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -IPPAPI(IppStatus, k1_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -IPPAPI(IppStatus, h9_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) - -IPPFUN(IppStatus,sgx_disp_ippsAESDecryptXTS_Direct,(const Ipp8u* pSrc, Ipp8u* pDst, int encBitsize, int aesBlkNo, const Ipp8u* pTweakPT, const Ipp8u* pKey, int keyBitsize, int dataUnitBitsize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAESDecryptXTS_Direct( pSrc, pDst, encBitsize, aesBlkNo, pTweakPT, pKey, keyBitsize, dataUnitBitsize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00038.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00038.c deleted file mode 100644 index 47fac89d2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00038.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) -IPPAPI(IppStatus, l9_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) -IPPAPI(IppStatus, k1_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) -IPPAPI(IppStatus, h9_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_EncryptCFB16_MB, (const Ipp8u* pSrc[], Ipp8u* pDst[], int len[], const IppsAESSpec* pCtx[], const Ipp8u* pIV[], IppStatus status[], int numBuffers)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_EncryptCFB16_MB( pSrc, pDst, len, pCtx, pIV, status, numBuffers ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00039.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00039.c deleted file mode 100644 index 69c4f843d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00039.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4GetSize,(int *pSize)) -IPPAPI(IppStatus, l9_ippsSMS4GetSize,(int *pSize)) -IPPAPI(IppStatus, k1_ippsSMS4GetSize,(int *pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4GetSize,(int *pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4GetSize,(int *pSize)) -IPPAPI(IppStatus, h9_ippsSMS4GetSize,(int *pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4GetSize,(int *pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00040.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00040.c deleted file mode 100644 index bfe0e1cc5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00040.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) -IPPAPI(IppStatus, l9_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) -IPPAPI(IppStatus, k1_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) -IPPAPI(IppStatus, h9_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4Init,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4Init( pKey, keyLen, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00041.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00041.c deleted file mode 100644 index 5456dbd76..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00041.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4SetKey( pKey, keyLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4SetKey( pKey, keyLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4SetKey( pKey, keyLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4SetKey,(const Ipp8u* pKey, int keyLen, IppsSMS4Spec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4SetKey( pKey, keyLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4SetKey( pKey, keyLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00042.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00042.c deleted file mode 100644 index 42f47c726..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00042.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00043.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00043.c deleted file mode 100644 index af5801a33..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00043.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptECB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptECB( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00044.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00044.c deleted file mode 100644 index b62788b4a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00044.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00045.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00045.c deleted file mode 100644 index aee63ea2e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00045.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00046.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00046.c deleted file mode 100644 index 11aaf656e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00046.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00047.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00047.c deleted file mode 100644 index 3533a72aa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00047.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00048.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00048.c deleted file mode 100644 index 83ebdc0ce..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00048.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptCBC( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00049.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00049.c deleted file mode 100644 index d26d3b449..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00049.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC_CS1,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptCBC_CS1( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00050.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00050.c deleted file mode 100644 index ec5a4625a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00050.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC_CS2,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptCBC_CS2( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00051.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00051.c deleted file mode 100644 index 5e08c0520..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00051.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCBC_CS3,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptCBC_CS3( pSrc, pDst, len, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00052.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00052.c deleted file mode 100644 index 1c6a1bf84..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00052.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00053.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00053.c deleted file mode 100644 index 6ba30b449..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00053.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int cfbBlkSize, const IppsSMS4Spec* pCtx, const Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptCFB( pSrc, pDst, len, cfbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00054.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00054.c deleted file mode 100644 index 934d27488..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00054.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00055.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00055.c deleted file mode 100644 index abda7e7dc..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00055.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptOFB,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int ofbBlkSize, const IppsSMS4Spec* pCtx, Ipp8u* pIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptOFB( pSrc, pDst, len, ofbBlkSize, pCtx, pIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00056.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00056.c deleted file mode 100644 index dcf4f4d03..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00056.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, l9_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, k1_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, h9_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4EncryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4EncryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00057.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00057.c deleted file mode 100644 index 9b494adc9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00057.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, l9_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, k1_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -IPPAPI(IppStatus, h9_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4DecryptCTR,(const Ipp8u* pSrc, Ipp8u* pDst, int len, const IppsSMS4Spec* pCtx, Ipp8u* pCtrValue, int ctrNumBitSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4DecryptCTR( pSrc, pDst, len, pCtx, pCtrValue, ctrNumBitSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00058.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00058.c deleted file mode 100644 index ea268852b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00058.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMGetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMGetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMGetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00059.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00059.c deleted file mode 100644 index 6963e2287..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00059.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMInit,(const Ipp8u* pKey, int keyLen, IppsSMS4_CCMState* pCtx, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMInit( pKey, keyLen, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00060.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00060.c deleted file mode 100644 index 4a2cd10be..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00060.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMMessageLen( msgLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMMessageLen( msgLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMMessageLen( msgLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMMessageLen,(Ipp64u msgLen, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMMessageLen( msgLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMMessageLen( msgLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00061.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00061.c deleted file mode 100644 index 7c9006118..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00061.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMTagLen( tagLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMTagLen( tagLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMTagLen( tagLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMTagLen,(int tagLen, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMTagLen( tagLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMTagLen( tagLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00062.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00062.c deleted file mode 100644 index 79809d216..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00062.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMStart( pIV, ivLen, pAD, adLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00063.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00063.c deleted file mode 100644 index 8a1575563..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00063.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMEncrypt( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00064.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00064.c deleted file mode 100644 index 440e2a48b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00064.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMDecrypt( pSrc, pDst, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00065.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00065.c deleted file mode 100644 index 616c7f2bf..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00065.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, l9_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, k1_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) -IPPAPI(IppStatus, h9_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsSMS4_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsSMS4_CCMState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSMS4_CCMGetTag( pTag, tagLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00066.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00066.c deleted file mode 100644 index 2efa0843a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00066.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMGetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsAES_CCMGetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsAES_CCMGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMGetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsAES_CCMGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00067.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00067.c deleted file mode 100644 index 6f6319064..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00067.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) -IPPAPI(IppStatus, l9_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) -IPPAPI(IppStatus, k1_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) -IPPAPI(IppStatus, h9_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_CCMState* pState, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMInit( pKey, keyLen, pState, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00068.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00068.c deleted file mode 100644 index 41674960d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00068.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMMessageLen( msgLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMMessageLen( msgLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMMessageLen( msgLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMMessageLen,(Ipp64u msgLen, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMMessageLen( msgLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMMessageLen( msgLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00069.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00069.c deleted file mode 100644 index e4d144b98..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00069.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMTagLen( tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMTagLen( tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMTagLen( tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMTagLen,(int tagLen, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMTagLen( tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMTagLen( tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00070.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00070.c deleted file mode 100644 index ee61d86b0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00070.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAD, int adLen, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMStart( pIV, ivLen, pAD, adLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00071.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00071.c deleted file mode 100644 index c4c657517..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00071.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMEncrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00072.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00072.c deleted file mode 100644 index f64003477..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00072.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMDecrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00073.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00073.c deleted file mode 100644 index f7d008f15..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00073.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CCMGetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CCMGetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CCMGetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CCMGetTag,(Ipp8u* pTag, int tagLen, const IppsAES_CCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CCMGetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CCMGetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00074.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00074.c deleted file mode 100644 index 86540a114..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00074.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMGetSize,(int * pSize)) -IPPAPI(IppStatus, l9_ippsAES_GCMGetSize,(int * pSize)) -IPPAPI(IppStatus, k1_ippsAES_GCMGetSize,(int * pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMGetSize,(int * pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMGetSize,(int * pSize)) -IPPAPI(IppStatus, h9_ippsAES_GCMGetSize,(int * pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMGetSize,(int * pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00075.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00075.c deleted file mode 100644 index 71a2f67da..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00075.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) -IPPAPI(IppStatus, l9_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) -IPPAPI(IppStatus, k1_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) -IPPAPI(IppStatus, h9_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMInit,(const Ipp8u* pKey, int keyLen, IppsAES_GCMState* pState, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMInit( pKey, keyLen, pState, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00076.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00076.c deleted file mode 100644 index 110b8d7dc..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00076.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMReset,(IppsAES_GCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_GCMReset,(IppsAES_GCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_GCMReset,(IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMReset,(IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMReset( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMReset( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMReset( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMReset,(IppsAES_GCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_GCMReset,(IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMReset,(IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMReset( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMReset( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00077.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00077.c deleted file mode 100644 index be6a5523d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00077.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMProcessIV( pIV, ivLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMProcessIV( pIV, ivLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMProcessIV( pIV, ivLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMProcessIV,(const Ipp8u* pIV, int ivLen, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMProcessIV( pIV, ivLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMProcessIV( pIV, ivLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00078.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00078.c deleted file mode 100644 index 58b3f893a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00078.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMProcessAAD( pAAD, ivAAD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMProcessAAD( pAAD, ivAAD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMProcessAAD( pAAD, ivAAD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMProcessAAD,(const Ipp8u* pAAD, int ivAAD, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMProcessAAD( pAAD, ivAAD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMProcessAAD( pAAD, ivAAD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00079.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00079.c deleted file mode 100644 index 3f5fb2f9d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00079.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMStart,(const Ipp8u* pIV, int ivLen, const Ipp8u* pAAD, int aadLen, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMStart( pIV, ivLen, pAAD, aadLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00080.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00080.c deleted file mode 100644 index fdbc59710..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00080.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMEncrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00081.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00081.c deleted file mode 100644 index a70b6c340..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00081.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMDecrypt( pSrc, pDst, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00082.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00082.c deleted file mode 100644 index 058fc1c2f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00082.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) -IPPAPI(IppStatus, l9_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) -IPPAPI(IppStatus, k1_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) -IPPAPI(IppStatus, h9_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_GCMGetTag,(Ipp8u* pDstTag, int tagLen, const IppsAES_GCMState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_GCMGetTag( pDstTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00083.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00083.c deleted file mode 100644 index 04c5b16e6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00083.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_XTSGetSize,(int * pSize)) -IPPAPI(IppStatus, l9_ippsAES_XTSGetSize,(int * pSize)) -IPPAPI(IppStatus, k1_ippsAES_XTSGetSize,(int * pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSGetSize,(int * pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_XTSGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_XTSGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_XTSGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_XTSGetSize,(int * pSize)) -IPPAPI(IppStatus, h9_ippsAES_XTSGetSize,(int * pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSGetSize,(int * pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_XTSGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_XTSGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00084.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00084.c deleted file mode 100644 index 7f3556102..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00084.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) -IPPAPI(IppStatus, l9_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) -IPPAPI(IppStatus, k1_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) -IPPAPI(IppStatus, h9_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSInit,(const Ipp8u* pKey, int keyLen, int duBitsize, IppsAES_XTSSpec* pCtx,int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_XTSInit( pKey, keyLen, duBitsize, pCtx, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00085.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00085.c deleted file mode 100644 index 2f7d35da7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00085.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -IPPAPI(IppStatus, l9_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -IPPAPI(IppStatus, k1_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -IPPAPI(IppStatus, h9_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_XTSEncrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00086.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00086.c deleted file mode 100644 index f4db2a5e8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00086.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -IPPAPI(IppStatus, l9_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -IPPAPI(IppStatus, k1_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -IPPAPI(IppStatus, h9_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_XTSDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int bitSizeLen, const IppsAES_XTSSpec* pCtx, const Ipp8u* pTweak, int startCipherBlkNo)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_XTSDecrypt( pSrc, pDst, bitSizeLen, pCtx, pTweak, startCipherBlkNo ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00087.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00087.c deleted file mode 100644 index 2225165aa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00087.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) -IPPAPI(IppStatus, l9_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) -IPPAPI(IppStatus, k1_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) -IPPAPI(IppStatus, h9_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_S2V_CMAC,(const Ipp8u* pKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, Ipp8u* pV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_S2V_CMAC( pKey, keyLen, pAD, pADlen, numAD, pV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00088.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00088.c deleted file mode 100644 index c2fd7088c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00088.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) -IPPAPI(IppStatus, l9_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) -IPPAPI(IppStatus, k1_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) -IPPAPI(IppStatus, h9_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_SIVEncrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, Ipp8u* pSIV, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_SIVEncrypt( pSrc, pDst, len, pSIV, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00089.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00089.c deleted file mode 100644 index e63b28193..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00089.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) -IPPAPI(IppStatus, l9_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) -IPPAPI(IppStatus, k1_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) -IPPAPI(IppStatus, h9_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_SIVDecrypt,(const Ipp8u* pSrc, Ipp8u* pDst, int len, int* pAuthPassed, const Ipp8u* pAuthKey, const Ipp8u* pConfKey, int keyLen, const Ipp8u* pAD[], const int pADlen[], int numAD, const Ipp8u* pSIV)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_SIVDecrypt( pSrc, pDst, len, pAuthPassed, pAuthKey, pConfKey, keyLen, pAD, pADlen, numAD, pSIV ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00090.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00090.c deleted file mode 100644 index 35fe89b82..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00090.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CMACGetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsAES_CMACGetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsAES_CMACGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CMACGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CMACGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CMACGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CMACGetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsAES_CMACGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CMACGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CMACGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00091.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00091.c deleted file mode 100644 index 89539adb7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00091.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) -IPPAPI(IppStatus, l9_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) -IPPAPI(IppStatus, k1_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) -IPPAPI(IppStatus, h9_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACInit,(const Ipp8u* pKey, int keyLen, IppsAES_CMACState* pState, int ctxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CMACInit( pKey, keyLen, pState, ctxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00092.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00092.c deleted file mode 100644 index 69ca6e259..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00092.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CMACUpdate( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CMACUpdate( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CMACUpdate( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACUpdate,(const Ipp8u* pSrc, int len, IppsAES_CMACState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CMACUpdate( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CMACUpdate( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00093.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00093.c deleted file mode 100644 index 2998da092..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00093.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CMACFinal( pMD, mdLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CMACFinal( pMD, mdLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CMACFinal( pMD, mdLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACFinal,(Ipp8u* pMD, int mdLen, IppsAES_CMACState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CMACFinal( pMD, mdLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CMACFinal( pMD, mdLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00094.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00094.c deleted file mode 100644 index dba8be557..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00094.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) -IPPAPI(IppStatus, l9_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) -IPPAPI(IppStatus, k1_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAES_CMACGetTag( pMD, mdLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAES_CMACGetTag( pMD, mdLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAES_CMACGetTag( pMD, mdLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) -IPPAPI(IppStatus, h9_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsAES_CMACGetTag,(Ipp8u* pMD, int mdLen, const IppsAES_CMACState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAES_CMACGetTag( pMD, mdLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAES_CMACGetTag( pMD, mdLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00095.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00095.c deleted file mode 100644 index 8d9e2d37d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00095.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) -IPPAPI(IppStatus, l9_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) -IPPAPI(IppStatus, k1_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) -IPPAPI(IppStatus, h9_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourCheckKey, (const Ipp8u *pKey, int keyLen, IppBool* pIsWeak)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourCheckKey( pKey, keyLen, pIsWeak ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00096.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00096.c deleted file mode 100644 index 8bb94204c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00096.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourGetSize, (int* pSize)) -IPPAPI(IppStatus, l9_ippsARCFourGetSize, (int* pSize)) -IPPAPI(IppStatus, k1_ippsARCFourGetSize, (int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourGetSize, (int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourGetSize, (int* pSize)) -IPPAPI(IppStatus, h9_ippsARCFourGetSize, (int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourGetSize, (int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00097.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00097.c deleted file mode 100644 index 085c66e70..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00097.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, l9_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, k1_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourInit( pKey, keyLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourInit( pKey, keyLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourInit( pKey, keyLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, h9_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourInit, (const Ipp8u *pKey, int keyLen, IppsARCFourState *pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourInit( pKey, keyLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourInit( pKey, keyLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00098.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00098.c deleted file mode 100644 index fc2e91b30..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00098.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourReset, (IppsARCFourState* pCtx)) -IPPAPI(IppStatus, l9_ippsARCFourReset, (IppsARCFourState* pCtx)) -IPPAPI(IppStatus, k1_ippsARCFourReset, (IppsARCFourState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourReset, (IppsARCFourState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourReset( pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourReset( pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourReset( pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourReset, (IppsARCFourState* pCtx)) -IPPAPI(IppStatus, h9_ippsARCFourReset, (IppsARCFourState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourReset, (IppsARCFourState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourReset( pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourReset( pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00099.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00099.c deleted file mode 100644 index 1d7a5e179..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00099.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourPack( pCtx, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourPack( pCtx, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourPack( pCtx, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourPack,(const IppsARCFourState* pCtx, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourPack( pCtx, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourPack( pCtx, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00100.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00100.c deleted file mode 100644 index 963644e87..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00100.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) -IPPAPI(IppStatus, l9_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) -IPPAPI(IppStatus, k1_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourUnpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) -IPPAPI(IppStatus, h9_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourUnpack,(const Ipp8u* pBuffer, IppsARCFourState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourUnpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00101.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00101.c deleted file mode 100644 index 0dbb41523..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00101.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, l9_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, k1_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, h9_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourEncrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourEncrypt( pSrc, pDst, length, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00102.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00102.c deleted file mode 100644 index 4d80ae7c2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00102.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, l9_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, k1_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -IPPAPI(IppStatus, h9_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsARCFourDecrypt, (const Ipp8u *pSrc, Ipp8u *pDst, int length, IppsARCFourState *pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsARCFourDecrypt( pSrc, pDst, length, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00103.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00103.c deleted file mode 100644 index 829b0eb1b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00103.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsSHA1GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsSHA1GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsSHA1GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00104.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00104.c deleted file mode 100644 index dd8732d7e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00104.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1Init,(IppsSHA1State* pState)) -IPPAPI(IppStatus, l9_ippsSHA1Init,(IppsSHA1State* pState)) -IPPAPI(IppStatus, k1_ippsSHA1Init,(IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Init,(IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1Init( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1Init,(IppsSHA1State* pState)) -IPPAPI(IppStatus, h9_ippsSHA1Init,(IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Init,(IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00105.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00105.c deleted file mode 100644 index 159aac3ec..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00105.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) -IPPAPI(IppStatus, l9_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) -IPPAPI(IppStatus, k1_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) -IPPAPI(IppStatus, h9_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Duplicate,(const IppsSHA1State* pSrcState, IppsSHA1State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00106.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00106.c deleted file mode 100644 index ceb78974a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00106.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1Pack( pState, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Pack,(const IppsSHA1State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00107.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00107.c deleted file mode 100644 index af9fb99d1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00107.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) -IPPAPI(IppStatus, l9_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) -IPPAPI(IppStatus, k1_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1Unpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) -IPPAPI(IppStatus, h9_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Unpack,(const Ipp8u* pBuffer, IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00108.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00108.c deleted file mode 100644 index 054495401..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00108.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) -IPPAPI(IppStatus, l9_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) -IPPAPI(IppStatus, k1_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1Update( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) -IPPAPI(IppStatus, h9_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Update,(const Ipp8u* pSrc, int len, IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00109.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00109.c deleted file mode 100644 index f020bb75e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00109.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) -IPPAPI(IppStatus, l9_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) -IPPAPI(IppStatus, k1_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) -IPPAPI(IppStatus, h9_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00110.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00110.c deleted file mode 100644 index 81dafa132..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00110.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) -IPPAPI(IppStatus, l9_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) -IPPAPI(IppStatus, k1_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1Final( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) -IPPAPI(IppStatus, h9_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1Final,(Ipp8u* pMD, IppsSHA1State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00111.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00111.c deleted file mode 100644 index 5fb2bc34d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00111.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, l9_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, k1_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA1MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA1MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA1MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, h9_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA1MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA1MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA1MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00112.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00112.c deleted file mode 100644 index c73bc3782..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00112.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsSHA224GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsSHA224GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsSHA224GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00113.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00113.c deleted file mode 100644 index fb009cd6f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00113.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224Init,(IppsSHA224State* pState)) -IPPAPI(IppStatus, l9_ippsSHA224Init,(IppsSHA224State* pState)) -IPPAPI(IppStatus, k1_ippsSHA224Init,(IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Init,(IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224Init( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224Init,(IppsSHA224State* pState)) -IPPAPI(IppStatus, h9_ippsSHA224Init,(IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Init,(IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00114.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00114.c deleted file mode 100644 index e2455ea17..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00114.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) -IPPAPI(IppStatus, l9_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) -IPPAPI(IppStatus, k1_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) -IPPAPI(IppStatus, h9_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Duplicate,(const IppsSHA224State* pSrcState, IppsSHA224State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00115.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00115.c deleted file mode 100644 index 49be24ae8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00115.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224Pack( pState, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Pack,(const IppsSHA224State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00116.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00116.c deleted file mode 100644 index 5dabc8a5b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00116.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) -IPPAPI(IppStatus, l9_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) -IPPAPI(IppStatus, k1_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224Unpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) -IPPAPI(IppStatus, h9_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Unpack,(const Ipp8u* pBuffer, IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00117.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00117.c deleted file mode 100644 index 2adcf5842..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00117.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) -IPPAPI(IppStatus, l9_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) -IPPAPI(IppStatus, k1_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224Update( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) -IPPAPI(IppStatus, h9_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Update,(const Ipp8u* pSrc, int len, IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00118.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00118.c deleted file mode 100644 index 3ba4e6cb9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00118.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) -IPPAPI(IppStatus, l9_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) -IPPAPI(IppStatus, k1_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) -IPPAPI(IppStatus, h9_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00119.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00119.c deleted file mode 100644 index 603652dda..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00119.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) -IPPAPI(IppStatus, l9_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) -IPPAPI(IppStatus, k1_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224Final( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) -IPPAPI(IppStatus, h9_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224Final,(Ipp8u* pMD, IppsSHA224State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00120.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00120.c deleted file mode 100644 index d314029ff..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00120.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, l9_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, k1_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA224MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA224MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA224MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, h9_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA224MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA224MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA224MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00121.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00121.c deleted file mode 100644 index c0618bd94..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00121.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsSHA256GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsSHA256GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsSHA256GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00122.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00122.c deleted file mode 100644 index 262f4368e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00122.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256Init,(IppsSHA256State* pState)) -IPPAPI(IppStatus, l9_ippsSHA256Init,(IppsSHA256State* pState)) -IPPAPI(IppStatus, k1_ippsSHA256Init,(IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Init,(IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256Init( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256Init,(IppsSHA256State* pState)) -IPPAPI(IppStatus, h9_ippsSHA256Init,(IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Init,(IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00123.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00123.c deleted file mode 100644 index 52523fa3e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00123.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) -IPPAPI(IppStatus, l9_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) -IPPAPI(IppStatus, k1_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) -IPPAPI(IppStatus, h9_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Duplicate,(const IppsSHA256State* pSrcState, IppsSHA256State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00124.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00124.c deleted file mode 100644 index 05dc26c3a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00124.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256Pack( pState, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Pack,(const IppsSHA256State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00125.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00125.c deleted file mode 100644 index 62a67ca90..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00125.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) -IPPAPI(IppStatus, l9_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) -IPPAPI(IppStatus, k1_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256Unpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) -IPPAPI(IppStatus, h9_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Unpack,(const Ipp8u* pBuffer, IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00126.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00126.c deleted file mode 100644 index 9f6758696..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00126.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) -IPPAPI(IppStatus, l9_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) -IPPAPI(IppStatus, k1_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256Update( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) -IPPAPI(IppStatus, h9_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Update,(const Ipp8u* pSrc, int len, IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00127.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00127.c deleted file mode 100644 index 93038d447..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00127.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) -IPPAPI(IppStatus, l9_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) -IPPAPI(IppStatus, k1_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) -IPPAPI(IppStatus, h9_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00128.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00128.c deleted file mode 100644 index 0ab67c085..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00128.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) -IPPAPI(IppStatus, l9_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) -IPPAPI(IppStatus, k1_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256Final( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) -IPPAPI(IppStatus, h9_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256Final,(Ipp8u* pMD, IppsSHA256State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00129.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00129.c deleted file mode 100644 index 0659945f2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00129.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, l9_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, k1_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA256MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA256MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA256MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, h9_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA256MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA256MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA256MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00130.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00130.c deleted file mode 100644 index af84e0ef7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00130.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsSHA384GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsSHA384GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsSHA384GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00131.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00131.c deleted file mode 100644 index c0f28db48..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00131.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384Init,(IppsSHA384State* pState)) -IPPAPI(IppStatus, l9_ippsSHA384Init,(IppsSHA384State* pState)) -IPPAPI(IppStatus, k1_ippsSHA384Init,(IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Init,(IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384Init( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384Init,(IppsSHA384State* pState)) -IPPAPI(IppStatus, h9_ippsSHA384Init,(IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Init,(IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00132.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00132.c deleted file mode 100644 index 27c97a5e6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00132.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) -IPPAPI(IppStatus, l9_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) -IPPAPI(IppStatus, k1_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) -IPPAPI(IppStatus, h9_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Duplicate,(const IppsSHA384State* pSrcState, IppsSHA384State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00133.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00133.c deleted file mode 100644 index 6c7aa366d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00133.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384Pack( pState, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Pack,(const IppsSHA384State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00134.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00134.c deleted file mode 100644 index 829c4b8f1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00134.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) -IPPAPI(IppStatus, l9_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) -IPPAPI(IppStatus, k1_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384Unpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) -IPPAPI(IppStatus, h9_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Unpack,(const Ipp8u* pBuffer, IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00135.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00135.c deleted file mode 100644 index 894388b11..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00135.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) -IPPAPI(IppStatus, l9_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) -IPPAPI(IppStatus, k1_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384Update( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) -IPPAPI(IppStatus, h9_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Update,(const Ipp8u* pSrc, int len, IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00136.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00136.c deleted file mode 100644 index bd3d1321e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00136.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) -IPPAPI(IppStatus, l9_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) -IPPAPI(IppStatus, k1_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) -IPPAPI(IppStatus, h9_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00137.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00137.c deleted file mode 100644 index ca6616e3c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00137.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) -IPPAPI(IppStatus, l9_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) -IPPAPI(IppStatus, k1_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384Final( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) -IPPAPI(IppStatus, h9_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384Final,(Ipp8u* pMD, IppsSHA384State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00138.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00138.c deleted file mode 100644 index be9f63230..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00138.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, l9_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, k1_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA384MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA384MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA384MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, h9_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA384MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA384MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA384MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00139.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00139.c deleted file mode 100644 index a85a2c055..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00139.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsSHA512GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsSHA512GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsSHA512GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00140.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00140.c deleted file mode 100644 index e0034133d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00140.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512Init,(IppsSHA512State* pState)) -IPPAPI(IppStatus, l9_ippsSHA512Init,(IppsSHA512State* pState)) -IPPAPI(IppStatus, k1_ippsSHA512Init,(IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Init,(IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512Init( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512Init,(IppsSHA512State* pState)) -IPPAPI(IppStatus, h9_ippsSHA512Init,(IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Init,(IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00141.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00141.c deleted file mode 100644 index 78494d127..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00141.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) -IPPAPI(IppStatus, l9_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) -IPPAPI(IppStatus, k1_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) -IPPAPI(IppStatus, h9_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Duplicate,(const IppsSHA512State* pSrcState, IppsSHA512State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00142.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00142.c deleted file mode 100644 index 7d5b8cbb8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00142.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512Pack( pState, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Pack,(const IppsSHA512State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00143.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00143.c deleted file mode 100644 index 079d0831c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00143.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) -IPPAPI(IppStatus, l9_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) -IPPAPI(IppStatus, k1_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512Unpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) -IPPAPI(IppStatus, h9_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Unpack,(const Ipp8u* pBuffer, IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00144.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00144.c deleted file mode 100644 index 02b7480fb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00144.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) -IPPAPI(IppStatus, l9_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) -IPPAPI(IppStatus, k1_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512Update( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) -IPPAPI(IppStatus, h9_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Update,(const Ipp8u* pSrc, int len, IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00145.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00145.c deleted file mode 100644 index b874c8e95..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00145.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) -IPPAPI(IppStatus, l9_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) -IPPAPI(IppStatus, k1_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) -IPPAPI(IppStatus, h9_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00146.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00146.c deleted file mode 100644 index aa535c052..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00146.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) -IPPAPI(IppStatus, l9_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) -IPPAPI(IppStatus, k1_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512Final( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) -IPPAPI(IppStatus, h9_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512Final,(Ipp8u* pMD, IppsSHA512State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00147.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00147.c deleted file mode 100644 index 9002052f7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00147.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, l9_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, k1_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSHA512MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSHA512MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSHA512MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, h9_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSHA512MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSHA512MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSHA512MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00148.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00148.c deleted file mode 100644 index 32a5bd472..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00148.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsMD5GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsMD5GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsMD5GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00149.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00149.c deleted file mode 100644 index 2329a852e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00149.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5Init,(IppsMD5State* pState)) -IPPAPI(IppStatus, l9_ippsMD5Init,(IppsMD5State* pState)) -IPPAPI(IppStatus, k1_ippsMD5Init,(IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Init,(IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5Init( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5Init,(IppsMD5State* pState)) -IPPAPI(IppStatus, h9_ippsMD5Init,(IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Init,(IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00150.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00150.c deleted file mode 100644 index 9397a0b2c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00150.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) -IPPAPI(IppStatus, l9_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) -IPPAPI(IppStatus, k1_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) -IPPAPI(IppStatus, h9_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Duplicate,(const IppsMD5State* pSrcState, IppsMD5State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00151.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00151.c deleted file mode 100644 index b7420a551..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00151.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5Pack( pState, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Pack,(const IppsMD5State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00152.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00152.c deleted file mode 100644 index 78797cb33..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00152.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) -IPPAPI(IppStatus, l9_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) -IPPAPI(IppStatus, k1_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5Unpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) -IPPAPI(IppStatus, h9_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Unpack,(const Ipp8u* pBuffer, IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00153.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00153.c deleted file mode 100644 index d99c422be..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00153.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) -IPPAPI(IppStatus, l9_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) -IPPAPI(IppStatus, k1_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5Update( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) -IPPAPI(IppStatus, h9_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Update,(const Ipp8u* pSrc, int len, IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00154.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00154.c deleted file mode 100644 index 39ffa7839..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00154.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) -IPPAPI(IppStatus, l9_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) -IPPAPI(IppStatus, k1_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) -IPPAPI(IppStatus, h9_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00155.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00155.c deleted file mode 100644 index 16f20d298..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00155.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) -IPPAPI(IppStatus, l9_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) -IPPAPI(IppStatus, k1_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5Final( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) -IPPAPI(IppStatus, h9_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5Final,(Ipp8u* pMD, IppsMD5State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00156.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00156.c deleted file mode 100644 index d95818298..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00156.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, l9_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, k1_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMD5MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMD5MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMD5MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, h9_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsMD5MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMD5MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMD5MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00157.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00157.c deleted file mode 100644 index 7c2f64714..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00157.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsSM3GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsSM3GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsSM3GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00158.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00158.c deleted file mode 100644 index af5180247..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00158.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3Init,(IppsSM3State* pState)) -IPPAPI(IppStatus, l9_ippsSM3Init,(IppsSM3State* pState)) -IPPAPI(IppStatus, k1_ippsSM3Init,(IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Init,(IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3Init( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3Init,(IppsSM3State* pState)) -IPPAPI(IppStatus, h9_ippsSM3Init,(IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Init,(IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3Init( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3Init( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00159.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00159.c deleted file mode 100644 index c86eab3cf..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00159.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) -IPPAPI(IppStatus, l9_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) -IPPAPI(IppStatus, k1_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) -IPPAPI(IppStatus, h9_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Duplicate,(const IppsSM3State* pSrcState, IppsSM3State* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3Duplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3Duplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00160.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00160.c deleted file mode 100644 index 37ce9b17d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00160.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3Pack( pState, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Pack,(const IppsSM3State* pState, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3Pack( pState, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3Pack( pState, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00161.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00161.c deleted file mode 100644 index 9f697070b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00161.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) -IPPAPI(IppStatus, l9_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) -IPPAPI(IppStatus, k1_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3Unpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) -IPPAPI(IppStatus, h9_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Unpack,(const Ipp8u* pBuffer, IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3Unpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3Unpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00162.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00162.c deleted file mode 100644 index 9eb60b711..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00162.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) -IPPAPI(IppStatus, l9_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) -IPPAPI(IppStatus, k1_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3Update( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) -IPPAPI(IppStatus, h9_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Update,(const Ipp8u* pSrc, int len, IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3Update( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3Update( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00163.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00163.c deleted file mode 100644 index d437359b4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00163.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) -IPPAPI(IppStatus, l9_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) -IPPAPI(IppStatus, k1_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) -IPPAPI(IppStatus, h9_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3GetTag,(Ipp8u* pTag, Ipp32u tagLen, const IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3GetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3GetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00164.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00164.c deleted file mode 100644 index e41749d6d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00164.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) -IPPAPI(IppStatus, l9_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) -IPPAPI(IppStatus, k1_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3Final( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) -IPPAPI(IppStatus, h9_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3Final,(Ipp8u* pMD, IppsSM3State* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3Final( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3Final( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00165.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00165.c deleted file mode 100644 index 4eba930f1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00165.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, l9_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, k1_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSM3MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSM3MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSM3MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -IPPAPI(IppStatus, h9_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) - -IPPFUN(IppStatus,sgx_disp_ippsSM3MessageDigest,(const Ipp8u* pMsg, int len, Ipp8u* pMD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSM3MessageDigest( pMsg, len, pMD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSM3MessageDigest( pMsg, len, pMD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00166.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00166.c deleted file mode 100644 index 7e9f05f24..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00166.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashGetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsHashGetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsHashGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashGetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsHashGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00167.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00167.c deleted file mode 100644 index 4ee4ebfce..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00167.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, l9_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, k1_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashInit( pState, hashAlg ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashInit( pState, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashInit( pState, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, h9_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHashInit,(IppsHashState* pState, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashInit( pState, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashInit( pState, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00168.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00168.c deleted file mode 100644 index e2ad120a7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00168.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, l9_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, k1_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashPack( pState, pBuffer, bufSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashPack( pState, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashPack( pState, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, h9_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashPack,(const IppsHashState* pState, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashPack( pState, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashPack( pState, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00169.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00169.c deleted file mode 100644 index 72e06670f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00169.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) -IPPAPI(IppStatus, l9_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) -IPPAPI(IppStatus, k1_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashUnpack( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashUnpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashUnpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) -IPPAPI(IppStatus, h9_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUnpack,(const Ipp8u* pBuffer, IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashUnpack( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashUnpack( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00170.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00170.c deleted file mode 100644 index c1727569f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00170.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) -IPPAPI(IppStatus, l9_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) -IPPAPI(IppStatus, k1_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashDuplicate( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashDuplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashDuplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) -IPPAPI(IppStatus, h9_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashDuplicate,(const IppsHashState* pSrcState, IppsHashState* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashDuplicate( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashDuplicate( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00171.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00171.c deleted file mode 100644 index a173c8112..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00171.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) -IPPAPI(IppStatus, l9_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) -IPPAPI(IppStatus, k1_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashUpdate( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashUpdate( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashUpdate( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) -IPPAPI(IppStatus, h9_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUpdate,(const Ipp8u* pSrc, int len, IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashUpdate( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashUpdate( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00172.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00172.c deleted file mode 100644 index 63f1ad335..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00172.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) -IPPAPI(IppStatus, l9_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) -IPPAPI(IppStatus, k1_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashGetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashGetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashGetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) -IPPAPI(IppStatus, h9_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetTag,(Ipp8u* pTag, int tagLen, const IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashGetTag( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashGetTag( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00173.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00173.c deleted file mode 100644 index 9bb9149d6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00173.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) -IPPAPI(IppStatus, l9_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) -IPPAPI(IppStatus, k1_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashFinal( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashFinal( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashFinal( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) -IPPAPI(IppStatus, h9_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashFinal,(Ipp8u* pMD, IppsHashState* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashFinal( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashFinal( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00174.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00174.c deleted file mode 100644 index 39610e427..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00174.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, l9_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, k1_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMessage( pMsg, len, pMD, hashAlg ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMessage( pMsg, len, pMD, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMessage( pMsg, len, pMD, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, h9_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHashMessage,(const Ipp8u* pMsg, int len, Ipp8u* pMD, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMessage( pMsg, len, pMD, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMessage( pMsg, len, pMD, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00175.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00175.c deleted file mode 100644 index 6dc25f830..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00175.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_MD5, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_MD5, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_MD5, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_MD5, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_MD5( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_MD5( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_MD5( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_MD5, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_MD5, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_MD5, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_MD5( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_MD5( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00176.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00176.c deleted file mode 100644 index 2983a8c00..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00176.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SM3, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SM3, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SM3, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SM3, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SM3( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SM3( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SM3( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SM3, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SM3, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SM3, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SM3( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SM3( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00177.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00177.c deleted file mode 100644 index 72e1c8af8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00177.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA1, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA1, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA1, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA1( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA1( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA1, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA1, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA1( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00178.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00178.c deleted file mode 100644 index c62850ff3..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00178.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA1_NI, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA1_NI, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA1_NI, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA1_NI, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA1_NI( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA1_NI( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA1_NI( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA1_NI, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA1_NI, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA1_NI, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA1_NI( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA1_NI( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00179.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00179.c deleted file mode 100644 index 5fe504516..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00179.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA1_TT, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA1_TT, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA1_TT, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA1_TT, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA1_TT( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA1_TT( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA1_TT( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA1_TT, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA1_TT, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA1_TT, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA1_TT( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA1_TT( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00180.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00180.c deleted file mode 100644 index 05d4ac6a4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00180.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA256, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA256, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA256, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA256, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA256( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA256( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA256( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA256, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA256, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA256, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA256( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA256( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00181.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00181.c deleted file mode 100644 index bc06781f8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00181.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA256_NI, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA256_NI, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA256_NI, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA256_NI, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA256_NI( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA256_NI( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA256_NI( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA256_NI, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA256_NI, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA256_NI, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA256_NI( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA256_NI( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00182.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00182.c deleted file mode 100644 index 6b9c91ddc..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00182.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA256_TT, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA256_TT, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA256_TT, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA256_TT, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA256_TT( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA256_TT( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA256_TT( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA256_TT, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA256_TT, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA256_TT, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA256_TT( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA256_TT( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00183.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00183.c deleted file mode 100644 index 8c3368d72..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00183.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA224, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA224, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA224, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA224, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA224( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA224( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA224( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA224, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA224, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA224, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA224( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA224( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00184.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00184.c deleted file mode 100644 index e546f916c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00184.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA224_NI, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA224_NI, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA224_NI, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA224_NI, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA224_NI( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA224_NI( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA224_NI( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA224_NI, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA224_NI, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA224_NI, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA224_NI( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA224_NI( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00185.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00185.c deleted file mode 100644 index 2e43a4b9f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00185.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA224_TT, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA224_TT, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA224_TT, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA224_TT, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA224_TT( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA224_TT( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA224_TT( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA224_TT, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA224_TT, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA224_TT, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA224_TT( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA224_TT( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00186.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00186.c deleted file mode 100644 index cf75736aa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00186.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA512, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA512, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA512, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA512, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA512( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA512( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA512( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA512, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA512, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA512, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA512( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA512( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00187.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00187.c deleted file mode 100644 index 4afac172e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00187.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA384, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA384, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA384, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA384, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA384( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA384( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA384( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA384, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA384, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA384, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA384( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA384( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00188.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00188.c deleted file mode 100644 index a24110c55..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00188.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA512_256, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA512_256, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA512_256, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA512_256, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA512_256( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA512_256( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA512_256( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA512_256, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA512_256, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA512_256, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA512_256( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA512_256( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00189.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00189.c deleted file mode 100644 index 01aeac84e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00189.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsHashMethod*, y8_ippsHashMethod_SHA512_224, (void) ) -IPPAPI( const IppsHashMethod*, l9_ippsHashMethod_SHA512_224, (void) ) -IPPAPI( const IppsHashMethod*, k1_ippsHashMethod_SHA512_224, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA512_224, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethod_SHA512_224( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethod_SHA512_224( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethod_SHA512_224( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsHashMethod*, p8_ippsHashMethod_SHA512_224, (void) ) -IPPAPI( const IppsHashMethod*, h9_ippsHashMethod_SHA512_224, (void) ) - -IPPFUN( const IppsHashMethod*,sgx_disp_ippsHashMethod_SHA512_224, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethod_SHA512_224( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethod_SHA512_224( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00190.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00190.c deleted file mode 100644 index 64d8329f3..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00190.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodGetSize, (int* pSize) ) -IPPAPI( IppStatus, l9_ippsHashMethodGetSize, (int* pSize) ) -IPPAPI( IppStatus, k1_ippsHashMethodGetSize, (int* pSize) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodGetSize, (int* pSize) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodGetSize, (int* pSize) ) -IPPAPI( IppStatus, h9_ippsHashMethodGetSize, (int* pSize) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodGetSize, (int* pSize) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00191.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00191.c deleted file mode 100644 index 590421cfb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00191.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_MD5( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_MD5( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_MD5( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_MD5, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_MD5( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_MD5( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00192.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00192.c deleted file mode 100644 index 3ce7cc6fa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00192.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SM3( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SM3( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SM3( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SM3, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SM3( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SM3( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00193.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00193.c deleted file mode 100644 index 03bf66589..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00193.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA1( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA1( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA1( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA1, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA1( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA1( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00194.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00194.c deleted file mode 100644 index dc2c8d8a5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00194.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA1_NI( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA1_NI( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA1_NI( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA1_NI, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA1_NI( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA1_NI( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00195.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00195.c deleted file mode 100644 index 8ef07de58..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00195.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA1_TT( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA1_TT( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA1_TT( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA1_TT, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA1_TT( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA1_TT( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00196.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00196.c deleted file mode 100644 index f42df9cb4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00196.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA256( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA256( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA256( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA256, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA256( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA256( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00197.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00197.c deleted file mode 100644 index 4575d093b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00197.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA256_NI( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA256_NI( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA256_NI( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA256_NI, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA256_NI( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA256_NI( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00198.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00198.c deleted file mode 100644 index 9c4025839..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00198.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA256_TT( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA256_TT( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA256_TT( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA256_TT, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA256_TT( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA256_TT( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00199.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00199.c deleted file mode 100644 index be4c61cbe..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00199.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA224( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA224( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA224( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA224, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA224( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA224( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00200.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00200.c deleted file mode 100644 index e780d60ad..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00200.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA224_NI( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA224_NI( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA224_NI( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA224_NI, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA224_NI( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA224_NI( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00201.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00201.c deleted file mode 100644 index 330f7f5a6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00201.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA224_TT( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA224_TT( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA224_TT( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA224_TT, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA224_TT( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA224_TT( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00202.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00202.c deleted file mode 100644 index 84c12c8b6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00202.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA512( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA512( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA512( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA512, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA512( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA512( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00203.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00203.c deleted file mode 100644 index b99d7e84e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00203.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA384( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA384( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA384( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA384, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA384( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA384( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00204.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00204.c deleted file mode 100644 index 8952ab85a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00204.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA512_256( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA512_256( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA512_256( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA512_256, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA512_256( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA512_256( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00205.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00205.c deleted file mode 100644 index 76804815d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00205.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( IppStatus, y8_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, l9_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, k1_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodSet_SHA512_224( pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodSet_SHA512_224( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodSet_SHA512_224( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI( IppStatus, p8_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) -IPPAPI( IppStatus, h9_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) - -IPPFUN( IppStatus,sgx_disp_ippsHashMethodSet_SHA512_224, (IppsHashMethod* pMethod) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodSet_SHA512_224( pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodSet_SHA512_224( pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00206.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00206.c deleted file mode 100644 index eb58e4d18..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00206.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashGetSize_rmf,(int* pSize)) -IPPAPI(IppStatus, l9_ippsHashGetSize_rmf,(int* pSize)) -IPPAPI(IppStatus, k1_ippsHashGetSize_rmf,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetSize_rmf,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashGetSize_rmf( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashGetSize_rmf( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashGetSize_rmf( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashGetSize_rmf,(int* pSize)) -IPPAPI(IppStatus, h9_ippsHashGetSize_rmf,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetSize_rmf,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashGetSize_rmf( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashGetSize_rmf( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00207.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00207.c deleted file mode 100644 index 995c28739..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00207.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashInit_rmf( pState, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashInit_rmf( pState, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashInit_rmf( pState, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHashInit_rmf,(IppsHashState_rmf* pState, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashInit_rmf( pState, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashInit_rmf( pState, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00208.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00208.c deleted file mode 100644 index fef0e67d0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00208.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, l9_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, k1_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashPack_rmf( pState, pBuffer, bufSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashPack_rmf( pState, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashPack_rmf( pState, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, h9_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHashPack_rmf,(const IppsHashState_rmf* pState, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashPack_rmf( pState, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashPack_rmf( pState, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00209.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00209.c deleted file mode 100644 index 2ecc8d05d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00209.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, l9_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, k1_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashUnpack_rmf( pBuffer, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashUnpack_rmf( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashUnpack_rmf( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, h9_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUnpack_rmf,(const Ipp8u* pBuffer, IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashUnpack_rmf( pBuffer, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashUnpack_rmf( pBuffer, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00210.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00210.c deleted file mode 100644 index 4a90dd8a5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00210.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) -IPPAPI(IppStatus, l9_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) -IPPAPI(IppStatus, k1_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashDuplicate_rmf( pSrcState, pDstState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashDuplicate_rmf( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashDuplicate_rmf( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) -IPPAPI(IppStatus, h9_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashDuplicate_rmf,(const IppsHashState_rmf* pSrcState, IppsHashState_rmf* pDstState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashDuplicate_rmf( pSrcState, pDstState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashDuplicate_rmf( pSrcState, pDstState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00211.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00211.c deleted file mode 100644 index e77bb2e1b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00211.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, l9_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, k1_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashUpdate_rmf( pSrc, len, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashUpdate_rmf( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashUpdate_rmf( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, h9_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashUpdate_rmf( pSrc, len, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashUpdate_rmf( pSrc, len, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00212.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00212.c deleted file mode 100644 index 6155f9cb4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00212.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) -IPPAPI(IppStatus, l9_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) -IPPAPI(IppStatus, k1_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashGetTag_rmf( pMD, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashGetTag_rmf( pMD, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashGetTag_rmf( pMD, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) -IPPAPI(IppStatus, h9_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetTag_rmf,(Ipp8u* pMD, int tagLen, const IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashGetTag_rmf( pMD, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashGetTag_rmf( pMD, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00213.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00213.c deleted file mode 100644 index 4e6027d09..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00213.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, l9_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, k1_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashFinal_rmf( pMD, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashFinal_rmf( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashFinal_rmf( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) -IPPAPI(IppStatus, h9_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashFinal_rmf,(Ipp8u* pMD, IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashFinal_rmf( pMD, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashFinal_rmf( pMD, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00214.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00214.c deleted file mode 100644 index 7d7a57904..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00214.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHashMessage_rmf,(const Ipp8u* pMsg, int len, Ipp8u* pMD, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMessage_rmf( pMsg, len, pMD, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00215.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00215.c deleted file mode 100644 index e9d140369..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00215.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashMethodGetInfo( pInfo, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashMethodGetInfo( pInfo, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashMethodGetInfo( pInfo, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHashMethodGetInfo,(IppsHashInfo* pInfo, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashMethodGetInfo( pInfo, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashMethodGetInfo( pInfo, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00216.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00216.c deleted file mode 100644 index 6cff30c62..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00216.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) -IPPAPI(IppStatus, l9_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) -IPPAPI(IppStatus, k1_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHashGetInfo_rmf( pInfo, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHashGetInfo_rmf( pInfo, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHashGetInfo_rmf( pInfo, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) -IPPAPI(IppStatus, h9_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsHashGetInfo_rmf,(IppsHashInfo* pInfo, const IppsHashState_rmf* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHashGetInfo_rmf( pInfo, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHashGetInfo_rmf( pInfo, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00217.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00217.c deleted file mode 100644 index 13871400c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00217.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, l9_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, k1_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, h9_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsMGF,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMGF( pSeed, seedLen, pMask, maskLen, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00218.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00218.c deleted file mode 100644 index eefb0508e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00218.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsMGF1_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMGF1_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00219.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00219.c deleted file mode 100644 index 033aa2c7e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00219.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsMGF2_rmf,(const Ipp8u* pSeed, int seedLen, Ipp8u* pMask, int maskLen, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMGF2_rmf( pSeed, seedLen, pMask, maskLen, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00220.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00220.c deleted file mode 100644 index 9a8097a56..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00220.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_GetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsHMAC_GetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsHMAC_GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_GetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_GetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsHMAC_GetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_GetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_GetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_GetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00221.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00221.c deleted file mode 100644 index f15933813..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00221.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, l9_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, k1_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, h9_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Init,(const Ipp8u* pKey, int keyLen, IppsHMACState* pCtx, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_Init( pKey, keyLen, pCtx, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00222.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00222.c deleted file mode 100644 index 1c242fa79..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00222.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, l9_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, k1_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, h9_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Pack,(const IppsHMACState* pCtx, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_Pack( pCtx, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00223.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00223.c deleted file mode 100644 index 923027d4c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00223.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) -IPPAPI(IppStatus, l9_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) -IPPAPI(IppStatus, k1_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_Unpack( pBuffer, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_Unpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_Unpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) -IPPAPI(IppStatus, h9_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Unpack,(const Ipp8u* pBuffer, IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_Unpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_Unpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00224.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00224.c deleted file mode 100644 index 6763e40f3..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00224.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) -IPPAPI(IppStatus, l9_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) -IPPAPI(IppStatus, k1_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) -IPPAPI(IppStatus, h9_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Duplicate,(const IppsHMACState* pSrcCtx, IppsHMACState* pDstCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_Duplicate( pSrcCtx, pDstCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00225.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00225.c deleted file mode 100644 index 45c84f02b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00225.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) -IPPAPI(IppStatus, l9_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) -IPPAPI(IppStatus, k1_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_Update( pSrc, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_Update( pSrc, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_Update( pSrc, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) -IPPAPI(IppStatus, h9_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Update,(const Ipp8u* pSrc, int len, IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_Update( pSrc, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_Update( pSrc, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00226.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00226.c deleted file mode 100644 index 12997aeb7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00226.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) -IPPAPI(IppStatus, l9_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) -IPPAPI(IppStatus, k1_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_Final( pMD, mdLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_Final( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_Final( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) -IPPAPI(IppStatus, h9_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Final,(Ipp8u* pMD, int mdLen, IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_Final( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_Final( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00227.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00227.c deleted file mode 100644 index fee1eae92..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00227.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) -IPPAPI(IppStatus, l9_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) -IPPAPI(IppStatus, k1_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_GetTag( pMD, mdLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_GetTag( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_GetTag( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) -IPPAPI(IppStatus, h9_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_GetTag,(Ipp8u* pMD, int mdLen, const IppsHMACState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_GetTag( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_GetTag( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00228.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00228.c deleted file mode 100644 index 3095326bf..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00228.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, l9_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, k1_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) -IPPAPI(IppStatus, h9_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) - -IPPFUN(IppStatus,sgx_disp_ippsHMAC_Message,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, IppHashAlgId hashAlg)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMAC_Message( pMsg, msgLen, pKey, keyLen, pMD, mdLen, hashAlg ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00229.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00229.c deleted file mode 100644 index 9704c400f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00229.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACGetSize_rmf,(int* pSize)) -IPPAPI(IppStatus, l9_ippsHMACGetSize_rmf,(int* pSize)) -IPPAPI(IppStatus, k1_ippsHMACGetSize_rmf,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACGetSize_rmf,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACGetSize_rmf( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACGetSize_rmf( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACGetSize_rmf( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACGetSize_rmf,(int* pSize)) -IPPAPI(IppStatus, h9_ippsHMACGetSize_rmf,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACGetSize_rmf,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACGetSize_rmf( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACGetSize_rmf( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00230.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00230.c deleted file mode 100644 index 70f4f007e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00230.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACInit_rmf,(const Ipp8u* pKey, int keyLen, IppsHMACState_rmf* pCtx, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACInit_rmf( pKey, keyLen, pCtx, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00231.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00231.c deleted file mode 100644 index 773172050..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00231.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, l9_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, k1_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) -IPPAPI(IppStatus, h9_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACPack_rmf,(const IppsHMACState_rmf* pCtx, Ipp8u* pBuffer, int bufSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACPack_rmf( pCtx, pBuffer, bufSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00232.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00232.c deleted file mode 100644 index 99f4bdf58..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00232.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, l9_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, k1_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACUnpack_rmf( pBuffer, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACUnpack_rmf( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACUnpack_rmf( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, h9_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACUnpack_rmf,(const Ipp8u* pBuffer, IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACUnpack_rmf( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACUnpack_rmf( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00233.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00233.c deleted file mode 100644 index e92ab7717..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00233.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) -IPPAPI(IppStatus, l9_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) -IPPAPI(IppStatus, k1_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) -IPPAPI(IppStatus, h9_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACDuplicate_rmf,(const IppsHMACState_rmf* pSrcCtx, IppsHMACState_rmf* pDstCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACDuplicate_rmf( pSrcCtx, pDstCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00234.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00234.c deleted file mode 100644 index 056668a90..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00234.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, l9_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, k1_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACUpdate_rmf( pSrc, len, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACUpdate_rmf( pSrc, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACUpdate_rmf( pSrc, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, h9_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACUpdate_rmf,(const Ipp8u* pSrc, int len, IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACUpdate_rmf( pSrc, len, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACUpdate_rmf( pSrc, len, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00235.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00235.c deleted file mode 100644 index e035b2885..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00235.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, l9_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, k1_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, h9_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACFinal_rmf,(Ipp8u* pMD, int mdLen, IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACFinal_rmf( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00236.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00236.c deleted file mode 100644 index 118fb4ca6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00236.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, l9_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, k1_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) -IPPAPI(IppStatus, h9_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACGetTag_rmf,(Ipp8u* pMD, int mdLen, const IppsHMACState_rmf* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACGetTag_rmf( pMD, mdLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00237.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00237.c deleted file mode 100644 index 41accb773..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00237.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsHMACMessage_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pKey, int keyLen, Ipp8u* pMD, int mdLen, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsHMACMessage_rmf( pMsg, msgLen, pKey, keyLen, pMD, mdLen, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00238.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00238.c deleted file mode 100644 index 4debdfeab..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00238.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsBigNumGetSize,(int length, int* pSize)) -IPPAPI(IppStatus, l9_ippsBigNumGetSize,(int length, int* pSize)) -IPPAPI(IppStatus, k1_ippsBigNumGetSize,(int length, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsBigNumGetSize,(int length, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsBigNumGetSize( length, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsBigNumGetSize( length, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsBigNumGetSize( length, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsBigNumGetSize,(int length, int* pSize)) -IPPAPI(IppStatus, h9_ippsBigNumGetSize,(int length, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsBigNumGetSize,(int length, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsBigNumGetSize( length, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsBigNumGetSize( length, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00239.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00239.c deleted file mode 100644 index f0316b20a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00239.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsBigNumInit,(int length, IppsBigNumState* pBN)) -IPPAPI(IppStatus, l9_ippsBigNumInit,(int length, IppsBigNumState* pBN)) -IPPAPI(IppStatus, k1_ippsBigNumInit,(int length, IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsBigNumInit,(int length, IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsBigNumInit( length, pBN ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsBigNumInit( length, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsBigNumInit( length, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsBigNumInit,(int length, IppsBigNumState* pBN)) -IPPAPI(IppStatus, h9_ippsBigNumInit,(int length, IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsBigNumInit,(int length, IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsBigNumInit( length, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsBigNumInit( length, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00240.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00240.c deleted file mode 100644 index 45ce49b1f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00240.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) -IPPAPI(IppStatus, l9_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) -IPPAPI(IppStatus, k1_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) - -IPPFUN(IppStatus,sgx_disp_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsCmpZero_BN( pBN, pResult ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsCmpZero_BN( pBN, pResult ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsCmpZero_BN( pBN, pResult ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) -IPPAPI(IppStatus, h9_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) - -IPPFUN(IppStatus,sgx_disp_ippsCmpZero_BN,(const IppsBigNumState* pBN, Ipp32u* pResult)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsCmpZero_BN( pBN, pResult ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsCmpZero_BN( pBN, pResult ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00241.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00241.c deleted file mode 100644 index 66774d955..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00241.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) -IPPAPI(IppStatus, l9_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) -IPPAPI(IppStatus, k1_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) - -IPPFUN(IppStatus,sgx_disp_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsCmp_BN( pA, pB, pResult ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsCmp_BN( pA, pB, pResult ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsCmp_BN( pA, pB, pResult ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) -IPPAPI(IppStatus, h9_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) - -IPPFUN(IppStatus,sgx_disp_ippsCmp_BN,(const IppsBigNumState* pA, const IppsBigNumState* pB, Ipp32u* pResult)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsCmp_BN( pA, pB, pResult ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsCmp_BN( pA, pB, pResult ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00242.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00242.c deleted file mode 100644 index e2b152494..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00242.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) -IPPAPI(IppStatus, l9_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) -IPPAPI(IppStatus, k1_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGetSize_BN( pBN, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGetSize_BN( pBN, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGetSize_BN( pBN, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) -IPPAPI(IppStatus, h9_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGetSize_BN,(const IppsBigNumState* pBN, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGetSize_BN( pBN, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGetSize_BN( pBN, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00243.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00243.c deleted file mode 100644 index c1658c7d1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00243.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) -IPPAPI(IppStatus, l9_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) -IPPAPI(IppStatus, k1_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSet_BN( sgn, length, pData, pBN ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSet_BN( sgn, length, pData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSet_BN( sgn, length, pData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) -IPPAPI(IppStatus, h9_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsSet_BN,(IppsBigNumSGN sgn, int length, const Ipp32u* pData, IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSet_BN( sgn, length, pData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSet_BN( sgn, length, pData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00244.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00244.c deleted file mode 100644 index fef8739a7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00244.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, l9_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, k1_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGet_BN( pSgn, pLength, pData, pBN ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGet_BN( pSgn, pLength, pData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGet_BN( pSgn, pLength, pData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, h9_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsGet_BN,(IppsBigNumSGN* pSgn, int* pLength, Ipp32u* pData, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGet_BN( pSgn, pLength, pData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGet_BN( pSgn, pLength, pData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00245.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00245.c deleted file mode 100644 index c1ca34670..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00245.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, l9_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, k1_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRef_BN( pSgn, bitSize, ppData, pBN ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRef_BN( pSgn, bitSize, ppData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRef_BN( pSgn, bitSize, ppData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, h9_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsRef_BN,(IppsBigNumSGN* pSgn, int* bitSize, Ipp32u** const ppData, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRef_BN( pSgn, bitSize, ppData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRef_BN( pSgn, bitSize, ppData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00246.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00246.c deleted file mode 100644 index 967bfcf3b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00246.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, l9_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, k1_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, h9_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsExtGet_BN,(IppsBigNumSGN* pSgn, int* pBitSize, Ipp32u* pData, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsExtGet_BN( pSgn, pBitSize, pData, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00247.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00247.c deleted file mode 100644 index a13d92f30..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00247.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsAdd_BN( pA, pB, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsAdd_BN( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsAdd_BN( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsAdd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsAdd_BN( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsAdd_BN( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00248.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00248.c deleted file mode 100644 index d8fd33f25..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00248.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSub_BN( pA, pB, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSub_BN( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSub_BN( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsSub_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSub_BN( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSub_BN( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00249.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00249.c deleted file mode 100644 index 07fbbc723..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00249.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMul_BN( pA, pB, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMul_BN( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMul_BN( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMul_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMul_BN( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMul_BN( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00250.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00250.c deleted file mode 100644 index da5035c29..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00250.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMAC_BN_I( pA, pB, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMAC_BN_I( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMAC_BN_I( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMAC_BN_I, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMAC_BN_I( pA, pB, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMAC_BN_I( pA, pB, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00251.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00251.c deleted file mode 100644 index 7108956b2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00251.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDiv_BN( pA, pB, pQ, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDiv_BN( pA, pB, pQ, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDiv_BN( pA, pB, pQ, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsDiv_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pQ, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDiv_BN( pA, pB, pQ, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDiv_BN( pA, pB, pQ, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00252.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00252.c deleted file mode 100644 index 9da0c39b9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00252.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMod_BN( pA, pM, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMod_BN( pA, pM, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMod_BN( pA, pM, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMod_BN, (IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMod_BN( pA, pM, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMod_BN( pA, pM, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00253.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00253.c deleted file mode 100644 index 5fc14e768..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00253.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) -IPPAPI(IppStatus, l9_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) -IPPAPI(IppStatus, k1_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) - -IPPFUN(IppStatus,sgx_disp_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGcd_BN( pA, pB, pGCD ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGcd_BN( pA, pB, pGCD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGcd_BN( pA, pB, pGCD ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) -IPPAPI(IppStatus, h9_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) - -IPPFUN(IppStatus,sgx_disp_ippsGcd_BN, (IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGCD)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGcd_BN( pA, pB, pGCD ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGcd_BN( pA, pB, pGCD ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00254.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00254.c deleted file mode 100644 index 46bd61fc9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00254.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) -IPPAPI(IppStatus, l9_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) -IPPAPI(IppStatus, k1_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) - -IPPFUN(IppStatus,sgx_disp_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsModInv_BN( pA, pM, pInv ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsModInv_BN( pA, pM, pInv ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsModInv_BN( pA, pM, pInv ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) -IPPAPI(IppStatus, h9_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) - -IPPFUN(IppStatus,sgx_disp_ippsModInv_BN,(IppsBigNumState* pA, IppsBigNumState* pM, IppsBigNumState* pInv)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsModInv_BN( pA, pM, pInv ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsModInv_BN( pA, pM, pInv ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00255.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00255.c deleted file mode 100644 index 0b7218a71..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00255.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) -IPPAPI(IppStatus, l9_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) -IPPAPI(IppStatus, k1_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsSetOctString_BN( pStr, strLen, pBN ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsSetOctString_BN( pStr, strLen, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsSetOctString_BN( pStr, strLen, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) -IPPAPI(IppStatus, h9_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsSetOctString_BN,(const Ipp8u* pStr, int strLen, IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsSetOctString_BN( pStr, strLen, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsSetOctString_BN( pStr, strLen, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00256.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00256.c deleted file mode 100644 index b08b283c7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00256.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, l9_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, k1_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGetOctString_BN( pStr, strLen, pBN ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGetOctString_BN( pStr, strLen, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGetOctString_BN( pStr, strLen, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) -IPPAPI(IppStatus, h9_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) - -IPPFUN(IppStatus,sgx_disp_ippsGetOctString_BN,(Ipp8u* pStr, int strLen, const IppsBigNumState* pBN)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGetOctString_BN( pStr, strLen, pBN ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGetOctString_BN( pStr, strLen, pBN ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00257.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00257.c deleted file mode 100644 index a32e11495..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00257.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) -IPPAPI(IppStatus, l9_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) -IPPAPI(IppStatus, k1_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMontGetSize( method, length, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMontGetSize( method, length, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMontGetSize( method, length, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) -IPPAPI(IppStatus, h9_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsMontGetSize,(IppsExpMethod method, int length, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMontGetSize( method, length, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMontGetSize( method, length, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00258.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00258.c deleted file mode 100644 index 90227e3eb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00258.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) -IPPAPI(IppStatus, l9_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) -IPPAPI(IppStatus, k1_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMontInit( method, length, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMontInit( method, length, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMontInit( method, length, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) -IPPAPI(IppStatus, h9_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsMontInit,(IppsExpMethod method, int length, IppsMontState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMontInit( method, length, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMontInit( method, length, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00259.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00259.c deleted file mode 100644 index 6f8ba97bd..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00259.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) -IPPAPI(IppStatus, l9_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) -IPPAPI(IppStatus, k1_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMontSet( pModulo, size, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMontSet( pModulo, size, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMontSet( pModulo, size, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) -IPPAPI(IppStatus, h9_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsMontSet,(const Ipp32u* pModulo, int size, IppsMontState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMontSet( pModulo, size, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMontSet( pModulo, size, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00260.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00260.c deleted file mode 100644 index 03eee0737..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00260.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) -IPPAPI(IppStatus, l9_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) -IPPAPI(IppStatus, k1_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMontGet( pModulo, pSize, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMontGet( pModulo, pSize, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMontGet( pModulo, pSize, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) -IPPAPI(IppStatus, h9_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsMontGet,(Ipp32u* pModulo, int* pSize, const IppsMontState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMontGet( pModulo, pSize, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMontGet( pModulo, pSize, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00261.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00261.c deleted file mode 100644 index 09eea04d0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00261.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMontForm( pA, pCtx, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMontForm( pA, pCtx, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMontForm( pA, pCtx, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMontForm,(const IppsBigNumState* pA, IppsMontState* pCtx, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMontForm( pA, pCtx, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMontForm( pA, pCtx, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00262.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00262.c deleted file mode 100644 index 553da8b43..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00262.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMontMul( pA, pB, m, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMontMul( pA, pB, m, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMontMul( pA, pB, m, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMontMul, (const IppsBigNumState* pA, const IppsBigNumState* pB, IppsMontState* m, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMontMul( pA, pB, m, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMontMul( pA, pB, m, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00263.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00263.c deleted file mode 100644 index 90aa90bb4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00263.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) -IPPAPI(IppStatus, l9_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) -IPPAPI(IppStatus, k1_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsMontExp( pA, pE, m, pR ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsMontExp( pA, pE, m, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsMontExp( pA, pE, m, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) -IPPAPI(IppStatus, h9_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) - -IPPFUN(IppStatus,sgx_disp_ippsMontExp, (const IppsBigNumState* pA, const IppsBigNumState* pE, IppsMontState* m, IppsBigNumState* pR)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsMontExp( pA, pE, m, pR ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsMontExp( pA, pE, m, pR ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00264.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00264.c deleted file mode 100644 index 1140ecaec..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00264.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGGetSize,(int* pSize)) -IPPAPI(IppStatus, l9_ippsPRNGGetSize,(int* pSize)) -IPPAPI(IppStatus, k1_ippsPRNGGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGGetSize( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGGetSize,(int* pSize)) -IPPAPI(IppStatus, h9_ippsPRNGGetSize,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGGetSize,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGGetSize( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGGetSize( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00265.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00265.c deleted file mode 100644 index aa5655ed7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00265.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGInit( seedBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGInit( seedBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGInit( seedBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGInit, (int seedBits, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGInit( seedBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGInit( seedBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00266.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00266.c deleted file mode 100644 index 4f12eb6be..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00266.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGSetModulus( pMod, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGSetModulus( pMod, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGSetModulus( pMod, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetModulus,(const IppsBigNumState* pMod, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGSetModulus( pMod, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGSetModulus( pMod, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00267.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00267.c deleted file mode 100644 index abced3471..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00267.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGSetH0( pH0, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGSetH0( pH0, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGSetH0( pH0, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetH0, (const IppsBigNumState* pH0, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGSetH0( pH0, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGSetH0( pH0, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00268.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00268.c deleted file mode 100644 index 71d164055..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00268.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGSetAugment( pAug, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGSetAugment( pAug, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGSetAugment( pAug, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetAugment,(const IppsBigNumState* pAug, IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGSetAugment( pAug, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGSetAugment( pAug, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00269.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00269.c deleted file mode 100644 index 7a43b5dec..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00269.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGSetSeed( pSeed, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGSetSeed( pSeed, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGSetSeed( pSeed, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGSetSeed, (const IppsBigNumState* pSeed,IppsPRNGState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGSetSeed( pSeed, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGSetSeed( pSeed, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00270.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00270.c deleted file mode 100644 index 8d4977886..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00270.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) -IPPAPI(IppStatus, l9_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) -IPPAPI(IppStatus, k1_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGGetSeed( pCtx, pSeed ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGGetSeed( pCtx, pSeed ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGGetSeed( pCtx, pSeed ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) -IPPAPI(IppStatus, h9_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGGetSeed, (const IppsPRNGState* pCtx,IppsBigNumState* pSeed)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGGetSeed( pCtx, pSeed ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGGetSeed( pCtx, pSeed ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00271.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00271.c deleted file mode 100644 index a85bfe213..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00271.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGen( pRand, nBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGen( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGen( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGen, (Ipp32u* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGen( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGen( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00272.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00272.c deleted file mode 100644 index bc58ec184..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00272.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGen_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGen_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGen_BN( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGen_BN, (IppsBigNumState* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGen_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGen_BN( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00273.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00273.c deleted file mode 100644 index df270e2a5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00273.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGenRDRAND( pRand, nBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGenRDRAND( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGenRDRAND( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGenRDRAND, (Ipp32u* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGenRDRAND( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGenRDRAND( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00274.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00274.c deleted file mode 100644 index 026213aa3..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00274.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, l9_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, k1_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, h9_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPRNGenRDRAND_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPRNGenRDRAND_BN( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00275.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00275.c deleted file mode 100644 index 71d178303..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00275.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, l9_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, k1_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTRNGenRDSEED( pRand, nBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTRNGenRDSEED( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTRNGenRDSEED( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, h9_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsTRNGenRDSEED, (Ipp32u* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTRNGenRDSEED( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTRNGenRDSEED( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00276.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00276.c deleted file mode 100644 index da7f6d792..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00276.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, l9_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, k1_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -IPPAPI(IppStatus, h9_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsTRNGenRDSEED_BN,(IppsBigNumState* pRand, int nBits, void* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsTRNGenRDSEED_BN( pRand, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00277.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00277.c deleted file mode 100644 index 1e4f43426..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00277.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeGetSize,(int nMaxBits, int* pSize)) -IPPAPI(IppStatus, l9_ippsPrimeGetSize,(int nMaxBits, int* pSize)) -IPPAPI(IppStatus, k1_ippsPrimeGetSize,(int nMaxBits, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGetSize,(int nMaxBits, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeGetSize( nMaxBits, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeGetSize( nMaxBits, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeGetSize( nMaxBits, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeGetSize,(int nMaxBits, int* pSize)) -IPPAPI(IppStatus, h9_ippsPrimeGetSize,(int nMaxBits, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGetSize,(int nMaxBits, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeGetSize( nMaxBits, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeGetSize( nMaxBits, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00278.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00278.c deleted file mode 100644 index 8f6103e9a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00278.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, l9_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, k1_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeInit( nMaxBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeInit( nMaxBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeInit( nMaxBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, h9_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeInit, (int nMaxBits, IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeInit( nMaxBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeInit( nMaxBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00279.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00279.c deleted file mode 100644 index fecdfb0d6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00279.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGen, (int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeGen( nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00280.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00280.c deleted file mode 100644 index d12adc0e9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00280.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeTest,(int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeTest( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00281.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00281.c deleted file mode 100644 index 9151e2e6d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00281.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGen_BN,(IppsBigNumState* pPrime, int nBits, int nTrials, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeGen_BN( pPrime, nBits, nTrials, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00282.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00282.c deleted file mode 100644 index 65770fe3b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00282.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeTest_BN,(const IppsBigNumState* pPrime, int nTrials, Ipp32u* pResult, IppsPrimeState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeTest_BN( pPrime, nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00283.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00283.c deleted file mode 100644 index 263f2e9df..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00283.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) -IPPAPI(IppStatus, l9_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) -IPPAPI(IppStatus, k1_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeGet( pPrime, pLen, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeGet( pPrime, pLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeGet( pPrime, pLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) -IPPAPI(IppStatus, h9_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGet, (Ipp32u* pPrime, int* pLen, const IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeGet( pPrime, pLen, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeGet( pPrime, pLen, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00284.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00284.c deleted file mode 100644 index 12fcdb41c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00284.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) -IPPAPI(IppStatus, l9_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) -IPPAPI(IppStatus, k1_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeGet_BN( pPrime, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeGet_BN( pPrime, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeGet_BN( pPrime, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) -IPPAPI(IppStatus, h9_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeGet_BN,(IppsBigNumState* pPrime, const IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeGet_BN( pPrime, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeGet_BN( pPrime, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00285.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00285.c deleted file mode 100644 index 7a0357e27..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00285.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, l9_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, k1_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeSet( pPrime, nBits, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeSet( pPrime, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeSet( pPrime, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, h9_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeSet, (const Ipp32u* pPrime, int nBits, IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeSet( pPrime, nBits, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeSet( pPrime, nBits, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00286.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00286.c deleted file mode 100644 index ef1f3e3d0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00286.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, l9_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, k1_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsPrimeSet_BN( pPrime, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsPrimeSet_BN( pPrime, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsPrimeSet_BN( pPrime, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) -IPPAPI(IppStatus, h9_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsPrimeSet_BN,(const IppsBigNumState* pPrime, IppsPrimeState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsPrimeSet_BN( pPrime, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsPrimeSet_BN( pPrime, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00287.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00287.c deleted file mode 100644 index 13870c71d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00287.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) -IPPAPI(IppStatus, l9_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) -IPPAPI(IppStatus, k1_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) -IPPAPI(IppStatus, h9_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetSizePublicKey,(int rsaModulusBitSize, int pubicExpBitSize, int* pKeySize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetSizePublicKey( rsaModulusBitSize, pubicExpBitSize, pKeySize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00288.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00288.c deleted file mode 100644 index d8929fa9c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00288.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, l9_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, k1_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, h9_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_InitPublicKey,(int rsaModulusBitSize, int publicExpBitSize, IppsRSAPublicKeyState* pKey, int keyCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_InitPublicKey( rsaModulusBitSize, publicExpBitSize, pKey, keyCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00289.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00289.c deleted file mode 100644 index 64684aa63..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00289.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_SetPublicKey,(const IppsBigNumState* pModulus, const IppsBigNumState* pPublicExp, IppsRSAPublicKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_SetPublicKey( pModulus, pPublicExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00290.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00290.c deleted file mode 100644 index 0662188a9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00290.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetPublicKey,(IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, const IppsRSAPublicKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetPublicKey( pModulus, pPublicExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00291.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00291.c deleted file mode 100644 index 859d99d5e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00291.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) -IPPAPI(IppStatus, l9_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) -IPPAPI(IppStatus, k1_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) -IPPAPI(IppStatus, h9_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetSizePrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, int* pKeySize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetSizePrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKeySize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00292.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00292.c deleted file mode 100644 index 0cb3e600e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00292.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, l9_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, k1_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, h9_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_InitPrivateKeyType1,(int rsaModulusBitSize, int privateExpBitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_InitPrivateKeyType1( rsaModulusBitSize, privateExpBitSize, pKey, keyCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00293.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00293.c deleted file mode 100644 index b1caf4b74..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00293.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_SetPrivateKeyType1,(const IppsBigNumState* pModulus, const IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_SetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00294.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00294.c deleted file mode 100644 index 3ff7b963e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00294.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetPrivateKeyType1,(IppsBigNumState* pModulus, IppsBigNumState* pPrivateExp, const IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetPrivateKeyType1( pModulus, pPrivateExp, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00295.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00295.c deleted file mode 100644 index 569e852df..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00295.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) -IPPAPI(IppStatus, l9_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) -IPPAPI(IppStatus, k1_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) -IPPAPI(IppStatus, h9_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetSizePrivateKeyType2,(int factorPbitSize, int factorQbitSize, int* pKeySize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetSizePrivateKeyType2( factorPbitSize, factorQbitSize, pKeySize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00296.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00296.c deleted file mode 100644 index 465859a09..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00296.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, l9_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, k1_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -IPPAPI(IppStatus, h9_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_InitPrivateKeyType2,(int factorPbitSize, int factorQbitSize, IppsRSAPrivateKeyState* pKey, int keyCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_InitPrivateKeyType2( factorPbitSize, factorQbitSize, pKey, keyCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00297.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00297.c deleted file mode 100644 index e837efcd2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00297.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_SetPrivateKeyType2,(const IppsBigNumState* pFactorP, const IppsBigNumState* pFactorQ, const IppsBigNumState* pCrtExpP, const IppsBigNumState* pCrtExpQ, const IppsBigNumState* pInverseQ, IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_SetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00298.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00298.c deleted file mode 100644 index 3d5f89a21..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00298.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetPrivateKeyType2,(IppsBigNumState* pFactorP, IppsBigNumState* pFactorQ, IppsBigNumState* pCrtExpP, IppsBigNumState* pCrtExpQ, IppsBigNumState* pInverseQ, const IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetPrivateKeyType2( pFactorP, pFactorQ, pCrtExpP, pCrtExpQ, pInverseQ, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00299.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00299.c deleted file mode 100644 index ac3f9c3d2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00299.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetBufferSizePublicKey,(int* pBufferSize, const IppsRSAPublicKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetBufferSizePublicKey( pBufferSize, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00300.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00300.c deleted file mode 100644 index c395387fd..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00300.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, l9_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, k1_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) -IPPAPI(IppStatus, h9_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GetBufferSizePrivateKey,(int* pBufferSize, const IppsRSAPrivateKeyState* pKey)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GetBufferSizePrivateKey( pBufferSize, pKey ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00301.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00301.c deleted file mode 100644 index 573e554b2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00301.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_Encrypt,(const IppsBigNumState* pPtxt, IppsBigNumState* pCtxt, const IppsRSAPublicKeyState* pKey, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_Encrypt( pPtxt, pCtxt, pKey, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00302.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00302.c deleted file mode 100644 index caac0a97c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00302.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_Decrypt,(const IppsBigNumState* pCtxt, IppsBigNumState* pPtxt, const IppsRSAPrivateKeyState* pKey, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_Decrypt( pCtxt, pPtxt, pKey, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00303.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00303.c deleted file mode 100644 index f3b39d4ea..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00303.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_GenerateKeys,(const IppsBigNumState* pSrcPublicExp, IppsBigNumState* pModulus, IppsBigNumState* pPublicExp, IppsBigNumState* pPrivateExp, IppsRSAPrivateKeyState* pPrivateKeyType2, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_GenerateKeys( pSrcPublicExp, pModulus, pPublicExp, pPrivateExp, pPrivateKeyType2, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00304.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00304.c deleted file mode 100644 index fca61cf62..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00304.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsRSA_ValidateKeys,(int* pResult, const IppsRSAPublicKeyState* pPublicKey, const IppsRSAPrivateKeyState* pPrivateKeyType2, const IppsRSAPrivateKeyState* pPrivateKeyType1, Ipp8u* pScratchBuffer, int nTrials, IppsPrimeState* pPrimeGen, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSA_ValidateKeys( pResult, pPublicKey, pPrivateKeyType2, pPrivateKeyType1, pScratchBuffer, nTrials, pPrimeGen, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00305.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00305.c deleted file mode 100644 index 026621731..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00305.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAEncrypt_OAEP,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSAEncrypt_OAEP( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00306.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00306.c deleted file mode 100644 index 26f6e0336..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00306.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSADecrypt_OAEP,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSADecrypt_OAEP( pSrc, pLab, labLen, pDst, pDstLen, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00307.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00307.c deleted file mode 100644 index 689b19a17..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00307.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAEncrypt_OAEP_rmf,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pLabel, int labLen, const Ipp8u* pSeed, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSAEncrypt_OAEP_rmf( pSrc, srcLen, pLabel, labLen, pSeed, pDst, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00308.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00308.c deleted file mode 100644 index 96f0a8c8b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00308.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSADecrypt_OAEP_rmf,(const Ipp8u* pSrc, const Ipp8u* pLab, int labLen, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSADecrypt_OAEP_rmf( pSrc, pLab, labLen, pDst, pDstLen, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00309.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00309.c deleted file mode 100644 index c397fa50a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00309.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAEncrypt_PKCSv15,(const Ipp8u* pSrc, int srcLen, const Ipp8u* pRndPS, Ipp8u* pDst, const IppsRSAPublicKeyState* pKey, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSAEncrypt_PKCSv15( pSrc, srcLen, pRndPS, pDst, pKey, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00310.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00310.c deleted file mode 100644 index 196e93060..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00310.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSADecrypt_PKCSv15,(const Ipp8u* pSrc, Ipp8u* pDst, int* pDstLen, const IppsRSAPrivateKeyState* pKey, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSADecrypt_PKCSv15( pSrc, pDst, pDstLen, pKey, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00311.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00311.c deleted file mode 100644 index 4824e1ce4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00311.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSASign_PSS( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00312.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00312.c deleted file mode 100644 index bcb69ceaa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00312.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PSS,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSAVerify_PSS( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00313.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00313.c deleted file mode 100644 index 0e1e009cf..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00313.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSalt, int saltLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSASign_PSS_rmf( pMsg, msgLen, pSalt, saltLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00314.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00314.c deleted file mode 100644 index e0df2c779..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00314.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PSS_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSAVerify_PSS_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00315.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00315.c deleted file mode 100644 index ca38ff789..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00315.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PKCS1v15,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSASign_PKCS1v15( pMsg, msgLen, pSign, pPrvKey, pPubKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00316.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00316.c deleted file mode 100644 index cad90c3a6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00316.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PKCS1v15,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, IppHashAlgId hashAlg, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSAVerify_PKCS1v15( pMsg, msgLen, pSign, pIsValid, pKey, hashAlg, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00317.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00317.c deleted file mode 100644 index d71e41533..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00317.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSASign_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, Ipp8u* pSign, const IppsRSAPrivateKeyState* pPrvKey, const IppsRSAPublicKeyState* pPubKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSASign_PKCS1v15_rmf( pMsg, msgLen, pSign, pPrvKey, pPubKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00318.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00318.c deleted file mode 100644 index 33405ba8e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00318.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsRSAVerify_PKCS1v15_rmf,(const Ipp8u* pMsg, int msgLen, const Ipp8u* pSign, int* pIsValid, const IppsRSAPublicKeyState* pKey, const IppsHashMethod* pMethod, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsRSAVerify_PKCS1v15_rmf( pMsg, msgLen, pSign, pIsValid, pKey, pMethod, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00319.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00319.c deleted file mode 100644 index da081db12..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00319.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const char*, y8_ippsDLGetResultString, (IppDLResult code)) -IPPAPI( const char*, l9_ippsDLGetResultString, (IppDLResult code)) -IPPAPI( const char*, k1_ippsDLGetResultString, (IppDLResult code)) - -IPPFUN( const char*,sgx_disp_ippsDLGetResultString, (IppDLResult code)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLGetResultString( code ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLGetResultString( code ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLGetResultString( code ); - } else - return NULL; -} -#else - - -IPPAPI( const char*, p8_ippsDLGetResultString, (IppDLResult code)) -IPPAPI( const char*, h9_ippsDLGetResultString, (IppDLResult code)) - -IPPFUN( const char*,sgx_disp_ippsDLGetResultString, (IppDLResult code)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLGetResultString( code ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLGetResultString( code ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00320.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00320.c deleted file mode 100644 index 8ba6b2592..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00320.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) -IPPAPI(IppStatus, l9_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) -IPPAPI(IppStatus, k1_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) -IPPAPI(IppStatus, h9_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGetSize,(int bitSizeP, int bitSizeR, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPGetSize( bitSizeP, bitSizeR, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00321.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00321.c deleted file mode 100644 index 5681c8643..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00321.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPInit, (int bitSizeP, int bitSizeR, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPInit( bitSizeP, bitSizeR, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00322.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00322.c deleted file mode 100644 index 29a849be9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00322.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, l9_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, k1_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPPack( pCtx, pBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPPack( pCtx, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPPack( pCtx, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) -IPPAPI(IppStatus, h9_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPPack,(const IppsDLPState* pCtx, Ipp8u* pBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPPack( pCtx, pBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPPack( pCtx, pBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00323.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00323.c deleted file mode 100644 index 8bb6a8c97..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00323.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPUnpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPUnpack,(const Ipp8u* pBuffer, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPUnpack( pBuffer, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPUnpack( pBuffer, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00324.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00324.c deleted file mode 100644 index 169c892b5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00324.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPSet( pP, pR, pG, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPSet( pP, pR, pG, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPSet( pP, pR, pG, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSet,(const IppsBigNumState* pP, const IppsBigNumState* pR, const IppsBigNumState* pG, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPSet( pP, pR, pG, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPSet( pP, pR, pG, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00325.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00325.c deleted file mode 100644 index b0da9c899..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00325.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPGet( pP, pR, pG, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPGet( pP, pR, pG, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPGet( pP, pR, pG, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGet,(IppsBigNumState* pP, IppsBigNumState* pR, IppsBigNumState* pG, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPGet( pP, pR, pG, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPGet( pP, pR, pG, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00326.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00326.c deleted file mode 100644 index 1b4b7a540..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00326.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPSetDP( pDP, tag, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPSetDP( pDP, tag, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPSetDP( pDP, tag, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSetDP,(const IppsBigNumState* pDP, IppDLPKeyTag tag, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPSetDP( pDP, tag, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPSetDP( pDP, tag, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00327.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00327.c deleted file mode 100644 index ce3b9d6b2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00327.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPGetDP( pDP, tag, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPGetDP( pDP, tag, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPGetDP( pDP, tag, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGetDP,(IppsBigNumState* pDP, IppDLPKeyTag tag, const IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPGetDP( pDP, tag, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPGetDP( pDP, tag, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00328.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00328.c deleted file mode 100644 index 05d22d3fc..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00328.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGenKeyPair,(IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPGenKeyPair( pPrvKey, pPubKey, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00329.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00329.c deleted file mode 100644 index c54b51830..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00329.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPPublicKey, (const IppsBigNumState* pPrvKey, IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPPublicKey( pPrvKey, pPubKey, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00330.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00330.c deleted file mode 100644 index bb0d4547c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00330.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPValidateKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppDLResult* pResult, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPValidateKeyPair( pPrvKey, pPubKey, pResult, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00331.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00331.c deleted file mode 100644 index 092906f6c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00331.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSetKeyPair,(const IppsBigNumState* pPrvKey, const IppsBigNumState* pPubKey, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPSetKeyPair( pPrvKey, pPubKey, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00332.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00332.c deleted file mode 100644 index d31b80875..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00332.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSignDSA, (const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrvKey, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPSignDSA( pMsgDigest, pPrvKey, pSignR, pSignS, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00333.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00333.c deleted file mode 100644 index 8df0f483d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00333.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppDLResult* pResult, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPVerifyDSA( pMsgDigest, pSignR, pSignS, pResult, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00334.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00334.c deleted file mode 100644 index fd2d42abf..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00334.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) -IPPAPI(IppStatus, l9_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) -IPPAPI(IppStatus, k1_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) -IPPAPI(IppStatus, h9_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPSharedSecretDH,(const IppsBigNumState* pPrvKeyA, const IppsBigNumState* pPubKeyB, IppsBigNumState* pShare, IppsDLPState* pCtx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPSharedSecretDH( pPrvKeyA, pPubKeyB, pShare, pCtx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00335.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00335.c deleted file mode 100644 index f92ab6891..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00335.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGenerateDSA,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPGenerateDSA( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00336.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00336.c deleted file mode 100644 index c9914ac42..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00336.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPValidateDSA,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPValidateDSA( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00337.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00337.c deleted file mode 100644 index 800d7b9ca..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00337.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPGenerateDH,(const IppsBigNumState* pSeedIn, int nTrials, IppsDLPState* pCtx, IppsBigNumState* pSeedOut, int* pCounter, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPGenerateDH( pSeedIn, nTrials, pCtx, pSeedOut, pCounter, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00338.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00338.c deleted file mode 100644 index 3b58c4313..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00338.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsDLPValidateDH,(int nTrials, IppDLResult* pResult, IppsDLPState* pCtx, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsDLPValidateDH( nTrials, pResult, pCtx, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00339.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00339.c deleted file mode 100644 index 0c3fa4464..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00339.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const char*, y8_ippsECCGetResultString, (IppECResult code)) -IPPAPI( const char*, l9_ippsECCGetResultString, (IppECResult code)) -IPPAPI( const char*, k1_ippsECCGetResultString, (IppECResult code)) - -IPPFUN( const char*,sgx_disp_ippsECCGetResultString, (IppECResult code)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCGetResultString( code ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCGetResultString( code ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCGetResultString( code ); - } else - return NULL; -} -#else - - -IPPAPI( const char*, p8_ippsECCGetResultString, (IppECResult code)) -IPPAPI( const char*, h9_ippsECCGetResultString, (IppECResult code)) - -IPPFUN( const char*,sgx_disp_ippsECCGetResultString, (IppECResult code)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCGetResultString( code ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCGetResultString( code ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00340.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00340.c deleted file mode 100644 index 4fb028285..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00340.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSize,(int feBitSize, int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSize,(int feBitSize, int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSize,(int feBitSize, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSize,(int feBitSize, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSize( feBitSize, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSize( feBitSize, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSize( feBitSize, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSize,(int feBitSize, int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSize,(int feBitSize, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSize,(int feBitSize, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSize( feBitSize, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSize( feBitSize, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00341.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00341.c deleted file mode 100644 index 727a0c104..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00341.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStd128r1,(int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStd128r1,(int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStd128r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd128r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStd128r1( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStd128r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStd128r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStd128r1,(int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStd128r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd128r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStd128r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStd128r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00342.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00342.c deleted file mode 100644 index 49eecd6b5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00342.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStd128r2,(int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStd128r2,(int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStd128r2,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd128r2,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStd128r2( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStd128r2( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStd128r2( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStd128r2,(int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStd128r2,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd128r2,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStd128r2( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStd128r2( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00343.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00343.c deleted file mode 100644 index 84df48b7f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00343.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStd192r1,(int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStd192r1,(int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStd192r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd192r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStd192r1( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStd192r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStd192r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStd192r1,(int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStd192r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd192r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStd192r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStd192r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00344.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00344.c deleted file mode 100644 index 0190ceb38..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00344.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStd224r1,(int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStd224r1,(int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStd224r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd224r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStd224r1( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStd224r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStd224r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStd224r1,(int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStd224r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd224r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStd224r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStd224r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00345.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00345.c deleted file mode 100644 index 3a2a1dd4d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00345.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStd256r1,(int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStd256r1,(int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStd256r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd256r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStd256r1( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStd256r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStd256r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStd256r1,(int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStd256r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd256r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStd256r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStd256r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00346.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00346.c deleted file mode 100644 index 6517501f8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00346.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStd384r1,(int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStd384r1,(int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStd384r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd384r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStd384r1( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStd384r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStd384r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStd384r1,(int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStd384r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd384r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStd384r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStd384r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00347.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00347.c deleted file mode 100644 index 9898b1764..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00347.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStd521r1,(int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStd521r1,(int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStd521r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd521r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStd521r1( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStd521r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStd521r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStd521r1,(int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStd521r1,(int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStd521r1,(int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStd521r1( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStd521r1( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00348.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00348.c deleted file mode 100644 index a296affa1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00348.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetSizeStdSM2, (int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPGetSizeStdSM2, (int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPGetSizeStdSM2, (int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStdSM2, (int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetSizeStdSM2( pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetSizeStdSM2( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetSizeStdSM2( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetSizeStdSM2, (int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPGetSizeStdSM2, (int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetSizeStdSM2, (int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetSizeStdSM2( pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetSizeStdSM2( pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00349.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00349.c deleted file mode 100644 index 548bdde79..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00349.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInit( feBitSize, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInit( feBitSize, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInit( feBitSize, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInit,(int feBitSize, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInit( feBitSize, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInit( feBitSize, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00350.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00350.c deleted file mode 100644 index 7cb83651b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00350.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStd128r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStd128r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStd128r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd128r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStd128r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStd128r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStd128r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStd128r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStd128r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd128r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStd128r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStd128r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00351.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00351.c deleted file mode 100644 index 22ce5dc9c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00351.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStd128r2,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStd128r2,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStd128r2,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd128r2,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStd128r2( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStd128r2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStd128r2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStd128r2,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStd128r2,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd128r2,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStd128r2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStd128r2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00352.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00352.c deleted file mode 100644 index a5f36efab..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00352.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStd192r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd192r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStd192r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStd192r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd192r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00353.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00353.c deleted file mode 100644 index ed9bbfb32..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00353.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStd224r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd224r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStd224r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStd224r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd224r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00354.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00354.c deleted file mode 100644 index b1fc30857..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00354.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStd256r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd256r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStd256r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStd256r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd256r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00355.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00355.c deleted file mode 100644 index 98838c17e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00355.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStd384r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd384r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStd384r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStd384r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd384r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00356.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00356.c deleted file mode 100644 index de0ed78ab..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00356.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStd521r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd521r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStd521r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStd521r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStd521r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00357.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00357.c deleted file mode 100644 index 56d7d5452..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00357.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPInitStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPInitStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPInitStdSM2, (IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStdSM2, (IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPInitStdSM2( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPInitStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPInitStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPInitStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPInitStdSM2, (IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPInitStdSM2, (IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPInitStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPInitStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00358.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00358.c deleted file mode 100644 index 7bd05a531..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00358.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSet,(const IppsBigNumState* pPrime, const IppsBigNumState* pA, const IppsBigNumState* pB, const IppsBigNumState* pGX,const IppsBigNumState* pGY,const IppsBigNumState* pOrder, int cofactor, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00359.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00359.c deleted file mode 100644 index 8df6e279c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00359.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd( flag, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd( flag, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd( flag, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd,(IppECCType flag, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd( flag, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd( flag, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00360.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00360.c deleted file mode 100644 index 1fe36fe41..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00360.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd128r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd128r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd128r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd128r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd128r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd128r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd128r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd128r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd128r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd128r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd128r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd128r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00361.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00361.c deleted file mode 100644 index 30337bc3d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00361.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd128r2,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd128r2,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd128r2,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd128r2,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd128r2( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd128r2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd128r2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd128r2,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd128r2,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd128r2,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd128r2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd128r2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00362.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00362.c deleted file mode 100644 index 012d8479f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00362.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd192r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd192r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd192r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd192r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd192r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00363.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00363.c deleted file mode 100644 index a218a820a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00363.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd224r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd224r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd224r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd224r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd224r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00364.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00364.c deleted file mode 100644 index d52c657c8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00364.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd256r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd256r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd256r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd256r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd256r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00365.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00365.c deleted file mode 100644 index ab650c853..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00365.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd384r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd384r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd384r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd384r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd384r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00366.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00366.c deleted file mode 100644 index 27336eb20..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00366.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStd521r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd521r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStd521r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStd521r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStd521r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00367.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00367.c deleted file mode 100644 index 0a55b7714..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00367.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetStdSM2, (IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStdSM2, (IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetStdSM2( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetStdSM2, (IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetStdSM2, (IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00368.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00368.c deleted file mode 100644 index 9eed10d44..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00368.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPBindGxyTblStd192r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPBindGxyTblStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPBindGxyTblStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd192r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPBindGxyTblStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPBindGxyTblStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00369.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00369.c deleted file mode 100644 index 59a348ee2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00369.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPBindGxyTblStd224r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPBindGxyTblStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPBindGxyTblStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd224r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPBindGxyTblStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPBindGxyTblStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00370.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00370.c deleted file mode 100644 index fc37553ac..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00370.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPBindGxyTblStd256r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPBindGxyTblStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPBindGxyTblStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd256r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPBindGxyTblStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPBindGxyTblStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00371.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00371.c deleted file mode 100644 index 0dd7d0ff4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00371.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPBindGxyTblStd384r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPBindGxyTblStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPBindGxyTblStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd384r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPBindGxyTblStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPBindGxyTblStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00372.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00372.c deleted file mode 100644 index bfbf0c7ad..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00372.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPBindGxyTblStd521r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPBindGxyTblStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPBindGxyTblStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStd521r1,(IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPBindGxyTblStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPBindGxyTblStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00373.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00373.c deleted file mode 100644 index 19afabf8a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00373.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPBindGxyTblStdSM2( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPBindGxyTblStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPBindGxyTblStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPBindGxyTblStdSM2, (IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPBindGxyTblStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPBindGxyTblStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00374.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00374.c deleted file mode 100644 index 257b83fc4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00374.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGet,(IppsBigNumState* pPrime, IppsBigNumState* pA, IppsBigNumState* pB, IppsBigNumState* pGX,IppsBigNumState* pGY,IppsBigNumState* pOrder, int* cofactor, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGet( pPrime, pA, pB, pGX, pGY, pOrder, cofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00375.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00375.c deleted file mode 100644 index 935e46cdb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00375.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetOrderBitSize( pBitSize, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetOrderBitSize( pBitSize, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetOrderBitSize( pBitSize, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetOrderBitSize,(int* pBitSize, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetOrderBitSize( pBitSize, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetOrderBitSize( pBitSize, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00376.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00376.c deleted file mode 100644 index bd5701f73..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00376.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPValidate,(int nTrials, IppECResult* pResult, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPValidate( nTrials, pResult, pEC, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00377.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00377.c deleted file mode 100644 index f98591adb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00377.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPPointGetSize,(int feBitSize, int* pSize)) -IPPAPI(IppStatus, l9_ippsECCPPointGetSize,(int feBitSize, int* pSize)) -IPPAPI(IppStatus, k1_ippsECCPPointGetSize,(int feBitSize, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPPointGetSize,(int feBitSize, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPPointGetSize( feBitSize, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPPointGetSize( feBitSize, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPPointGetSize( feBitSize, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPPointGetSize,(int feBitSize, int* pSize)) -IPPAPI(IppStatus, h9_ippsECCPPointGetSize,(int feBitSize, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPPointGetSize,(int feBitSize, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPPointGetSize( feBitSize, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPPointGetSize( feBitSize, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00378.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00378.c deleted file mode 100644 index 32c907176..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00378.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) -IPPAPI(IppStatus, l9_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) -IPPAPI(IppStatus, k1_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPPointInit( feBitSize, pPoint ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPPointInit( feBitSize, pPoint ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPPointInit( feBitSize, pPoint ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) -IPPAPI(IppStatus, h9_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPPointInit,(int feBitSize, IppsECCPPointState* pPoint)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPPointInit( feBitSize, pPoint ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPPointInit( feBitSize, pPoint ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00379.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00379.c deleted file mode 100644 index 227530c96..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00379.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetPoint( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetPoint,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsECCPPointState* pPoint, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetPoint( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00380.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00380.c deleted file mode 100644 index 3e19a5083..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00380.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetPointAtInfinity( pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetPointAtInfinity( pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetPointAtInfinity( pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetPointAtInfinity,(IppsECCPPointState* pPoint, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetPointAtInfinity( pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetPointAtInfinity( pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00381.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00381.c deleted file mode 100644 index a871f361a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00381.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGetPoint( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGetPoint,(IppsBigNumState* pX, IppsBigNumState* pY, const IppsECCPPointState* pPoint, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGetPoint( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00382.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00382.c deleted file mode 100644 index 648ba3c4a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00382.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPCheckPoint( pP, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPCheckPoint( pP, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPCheckPoint( pP, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPCheckPoint,(const IppsECCPPointState* pP, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPCheckPoint( pP, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPCheckPoint( pP, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00383.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00383.c deleted file mode 100644 index d6b63c4b7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00383.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPComparePoint( pP, pQ, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPComparePoint( pP, pQ, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPComparePoint( pP, pQ, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPComparePoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPComparePoint( pP, pQ, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPComparePoint( pP, pQ, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00384.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00384.c deleted file mode 100644 index 25cb0c1a4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00384.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPNegativePoint( pP, pR, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPNegativePoint( pP, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPNegativePoint( pP, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPNegativePoint,(const IppsECCPPointState* pP, IppsECCPPointState* pR, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPNegativePoint( pP, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPNegativePoint( pP, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00385.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00385.c deleted file mode 100644 index 88bac81ed..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00385.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPAddPoint( pP, pQ, pR, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPAddPoint( pP, pQ, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPAddPoint( pP, pQ, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPAddPoint,(const IppsECCPPointState* pP, const IppsECCPPointState* pQ, IppsECCPPointState* pR, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPAddPoint( pP, pQ, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPAddPoint( pP, pQ, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00386.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00386.c deleted file mode 100644 index 3f35060d0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00386.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPMulPointScalar( pP, pK, pR, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPMulPointScalar( pP, pK, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPMulPointScalar( pP, pK, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPMulPointScalar,(const IppsECCPPointState* pP, const IppsBigNumState* pK, IppsECCPPointState* pR, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPMulPointScalar( pP, pK, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPMulPointScalar( pP, pK, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00387.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00387.c deleted file mode 100644 index e5ee2a631..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00387.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPGenKeyPair,(IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPGenKeyPair( pPrivate, pPublic, pEC, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00388.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00388.c deleted file mode 100644 index d7c98ff3f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00388.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPPublicKey( pPrivate, pPublic, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPPublicKey( pPrivate, pPublic, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPPublicKey( pPrivate, pPublic, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPPublicKey,(const IppsBigNumState* pPrivate, IppsECCPPointState* pPublic, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPPublicKey( pPrivate, pPublic, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPPublicKey( pPrivate, pPublic, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00389.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00389.c deleted file mode 100644 index 25d963a95..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00389.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPValidateKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPValidateKeyPair( pPrivate, pPublic, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00390.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00390.c deleted file mode 100644 index abed86072..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00390.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSetKeyPair,(const IppsBigNumState* pPrivate, const IppsECCPPointState* pPublic, IppBool regular, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSetKeyPair( pPrivate, pPublic, regular, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00391.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00391.c deleted file mode 100644 index 67f79b632..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00391.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSharedSecretDH( pPrivateA, pPublicB, pShare, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00392.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00392.c deleted file mode 100644 index a449e0e17..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00392.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsECCPPointState* pPublicB, IppsBigNumState* pShare, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00393.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00393.c deleted file mode 100644 index 6d535ba46..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00393.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSignDSA( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00394.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00394.c deleted file mode 100644 index ad62521fb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00394.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPVerifyDSA( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00395.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00395.c deleted file mode 100644 index 22d49da7c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00395.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pPrivate, IppsBigNumState* pSignX, IppsBigNumState* pSignY, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSignNR( pMsgDigest, pPrivate, pSignX, pSignY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00396.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00396.c deleted file mode 100644 index d3ac7f44d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00396.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pSignX, const IppsBigNumState* pSignY, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPVerifyNR( pMsgDigest, pSignX, pSignY, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00397.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00397.c deleted file mode 100644 index e3359b307..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00397.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00398.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00398.c deleted file mode 100644 index 456054c4c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00398.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, l9_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, k1_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) -IPPAPI(IppStatus, h9_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsECCPVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsECCPPointState* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsECCPState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsECCPVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00399.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00399.c deleted file mode 100644 index c06b06223..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00399.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpGetSize, (int feBitSize, int* pSize)) -IPPAPI(IppStatus, l9_ippsGFpGetSize, (int feBitSize, int* pSize)) -IPPAPI(IppStatus, k1_ippsGFpGetSize, (int feBitSize, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetSize, (int feBitSize, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpGetSize( feBitSize, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpGetSize( feBitSize, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpGetSize( feBitSize, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpGetSize, (int feBitSize, int* pSize)) -IPPAPI(IppStatus, h9_ippsGFpGetSize, (int feBitSize, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetSize, (int feBitSize, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpGetSize( feBitSize, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpGetSize( feBitSize, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00400.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00400.c deleted file mode 100644 index 1a6e33a3f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00400.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInitArbitrary,(const IppsBigNumState* pPrime, int primeBitSize, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpInitArbitrary( pPrime, primeBitSize, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00401.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00401.c deleted file mode 100644 index 1a775bc54..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00401.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInitFixed,(int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpInitFixed( primeBitSize, pGFpMethod, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00402.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00402.c deleted file mode 100644 index 129e0292a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00402.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInit, (const IppsBigNumState* pPrime, int primeBitSize, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpInit( pPrime, primeBitSize, pGFpMethod, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00403.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00403.c deleted file mode 100644 index 93b0a8d1d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00403.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p192r1, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p192r1, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p192r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p192r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p192r1( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p192r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p192r1( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p192r1, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p192r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p192r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p192r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p192r1( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00404.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00404.c deleted file mode 100644 index 97ecfc9aa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00404.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p224r1, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p224r1, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p224r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p224r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p224r1( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p224r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p224r1( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p224r1, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p224r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p224r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p224r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p224r1( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00405.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00405.c deleted file mode 100644 index dbb53b434..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00405.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256r1, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256r1, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p256r1( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p256r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p256r1( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p256r1, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p256r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p256r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p256r1( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00406.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00406.c deleted file mode 100644 index 3171bfe48..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00406.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p384r1, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p384r1, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p384r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p384r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p384r1( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p384r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p384r1( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p384r1, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p384r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p384r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p384r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p384r1( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00407.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00407.c deleted file mode 100644 index 4faccbf07..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00407.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p521r1, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p521r1, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p521r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p521r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p521r1( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p521r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p521r1( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p521r1, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p521r1, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p521r1, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p521r1( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p521r1( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00408.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00408.c deleted file mode 100644 index fa4567e31..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00408.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256sm2,(void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256sm2,(void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256sm2,(void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256sm2,(void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p256sm2( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p256sm2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p256sm2( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p256sm2,(void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p256sm2,(void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256sm2,(void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p256sm2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p256sm2( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00409.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00409.c deleted file mode 100644 index 259e5ed06..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00409.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256bn, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256bn, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256bn, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256bn, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p256bn( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p256bn( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p256bn( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p256bn, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p256bn, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256bn, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p256bn( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p256bn( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00410.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00410.c deleted file mode 100644 index 5ce757540..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00410.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_p256, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_p256, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_p256, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_p256( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_p256( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_p256( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_p256, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_p256, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_p256, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_p256( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_p256( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00411.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00411.c deleted file mode 100644 index 0ef1a1b6c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00411.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpMethod_pArb, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpMethod_pArb, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpMethod_pArb, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_pArb, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMethod_pArb( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMethod_pArb( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMethod_pArb( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpMethod_pArb, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpMethod_pArb, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpMethod_pArb, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMethod_pArb( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMethod_pArb( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00412.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00412.c deleted file mode 100644 index e3f53292f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00412.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) -IPPAPI(IppStatus, l9_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) -IPPAPI(IppStatus, k1_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxGetSize( pGroundGF, degree, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxGetSize( pGroundGF, degree, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxGetSize( pGroundGF, degree, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) -IPPAPI(IppStatus, h9_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpxGetSize,(const IppsGFpState* pGroundGF, int degree, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxGetSize( pGroundGF, degree, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxGetSize( pGroundGF, degree, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00413.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00413.c deleted file mode 100644 index 08315ec24..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00413.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -IPPAPI(IppStatus, l9_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -IPPAPI(IppStatus, k1_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -IPPAPI(IppStatus, h9_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpxInit, (const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* const ppGroundElm[], int nElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxInit( pGroundGF, extDeg, ppGroundElm, nElm, pGFpMethod, pGFpx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00414.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00414.c deleted file mode 100644 index cc5b4ec4a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00414.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -IPPAPI(IppStatus, l9_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -IPPAPI(IppStatus, k1_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -IPPAPI(IppStatus, h9_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpxInitBinomial,(const IppsGFpState* pGroundGF, int extDeg, const IppsGFpElement* pGroundElm, const IppsGFpMethod* pGFpMethod, IppsGFpState* pGFpx)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxInitBinomial( pGroundGF, extDeg, pGroundElm, pGFpMethod, pGFpx ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00415.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00415.c deleted file mode 100644 index 96cb69028..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00415.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom2_epid2,(void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom2_epid2,(void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom2_epid2,(void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom2_epid2,(void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxMethod_binom2_epid2( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxMethod_binom2_epid2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxMethod_binom2_epid2( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpxMethod_binom2_epid2,(void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpxMethod_binom2_epid2,(void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom2_epid2,(void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxMethod_binom2_epid2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxMethod_binom2_epid2( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00416.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00416.c deleted file mode 100644 index c4782e75a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00416.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom3_epid2,(void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom3_epid2,(void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom3_epid2,(void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom3_epid2,(void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxMethod_binom3_epid2( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxMethod_binom3_epid2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxMethod_binom3_epid2( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpxMethod_binom3_epid2,(void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpxMethod_binom3_epid2,(void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom3_epid2,(void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxMethod_binom3_epid2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxMethod_binom3_epid2( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00417.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00417.c deleted file mode 100644 index d1bba7724..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00417.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom2, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom2, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom2, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom2, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxMethod_binom2( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxMethod_binom2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxMethod_binom2( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpxMethod_binom2, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpxMethod_binom2, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom2, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxMethod_binom2( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxMethod_binom2( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00418.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00418.c deleted file mode 100644 index 3ce759c8e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00418.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom3, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom3, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom3, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom3, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxMethod_binom3( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxMethod_binom3( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxMethod_binom3( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpxMethod_binom3, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpxMethod_binom3, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom3, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxMethod_binom3( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxMethod_binom3( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00419.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00419.c deleted file mode 100644 index d5ea80e1d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00419.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_binom, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_binom, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_binom, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxMethod_binom( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxMethod_binom( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxMethod_binom( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpxMethod_binom, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpxMethod_binom, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_binom, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxMethod_binom( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxMethod_binom( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00420.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00420.c deleted file mode 100644 index a450768b6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00420.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI( const IppsGFpMethod*, y8_ippsGFpxMethod_com, (void) ) -IPPAPI( const IppsGFpMethod*, l9_ippsGFpxMethod_com, (void) ) -IPPAPI( const IppsGFpMethod*, k1_ippsGFpxMethod_com, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_com, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpxMethod_com( ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpxMethod_com( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpxMethod_com( ); - } else - return NULL; -} -#else - - -IPPAPI( const IppsGFpMethod*, p8_ippsGFpxMethod_com, (void) ) -IPPAPI( const IppsGFpMethod*, h9_ippsGFpxMethod_com, (void) ) - -IPPFUN( const IppsGFpMethod*,sgx_disp_ippsGFpxMethod_com, (void) ) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpxMethod_com( ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpxMethod_com( ); - } else - return NULL; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00421.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00421.c deleted file mode 100644 index f399a3a55..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00421.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) -IPPAPI(IppStatus, l9_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) -IPPAPI(IppStatus, k1_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) -IPPAPI(IppStatus, h9_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpScratchBufferSize,(int nExponents, int ExpBitSize, const IppsGFpState* pGFp, int* pBufferSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpScratchBufferSize( nExponents, ExpBitSize, pGFp, pBufferSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00422.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00422.c deleted file mode 100644 index ab9e50d17..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00422.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) -IPPAPI(IppStatus, l9_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) -IPPAPI(IppStatus, k1_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpElementGetSize( pGFp, pElementSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpElementGetSize( pGFp, pElementSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpElementGetSize( pGFp, pElementSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) -IPPAPI(IppStatus, h9_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpElementGetSize,(const IppsGFpState* pGFp, int* pElementSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpElementGetSize( pGFp, pElementSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpElementGetSize( pGFp, pElementSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00423.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00423.c deleted file mode 100644 index ff948a1e4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00423.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpElementInit( pA, lenA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpElementInit( pA, lenA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpElementInit( pA, lenA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpElementInit, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpElementInit( pA, lenA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpElementInit( pA, lenA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00424.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00424.c deleted file mode 100644 index 2964fafe4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00424.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSetElement( pA, lenA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSetElement( pA, lenA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSetElement( pA, lenA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElement, (const Ipp32u* pA, int lenA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSetElement( pA, lenA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSetElement( pA, lenA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00425.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00425.c deleted file mode 100644 index 1deff464f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00425.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSetElementRegular( pBN, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSetElementRegular( pBN, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSetElementRegular( pBN, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementRegular,(const IppsBigNumState* pBN, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSetElementRegular( pBN, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSetElementRegular( pBN, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00426.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00426.c deleted file mode 100644 index 58b75786b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00426.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementOctString,(const Ipp8u* pStr, int strSize, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSetElementOctString( pStr, strSize, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00427.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00427.c deleted file mode 100644 index ab24f3abe..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00427.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementRandom,(IppsGFpElement* pR, IppsGFpState* pGFp, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSetElementRandom( pR, pGFp, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00428.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00428.c deleted file mode 100644 index e6ee8a16f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00428.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) -IPPAPI(IppStatus, l9_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) -IPPAPI(IppStatus, k1_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) -IPPAPI(IppStatus, h9_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementHash,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, IppHashAlgId hashID)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSetElementHash( pMsg, msgLen, pElm, pGFp, hashID ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00429.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00429.c deleted file mode 100644 index b35f07435..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00429.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, l9_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, k1_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) -IPPAPI(IppStatus, h9_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSetElementHash_rmf,(const Ipp8u* pMsg, int msgLen, IppsGFpElement* pElm, IppsGFpState* pGFp, const IppsHashMethod* pMethod)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSetElementHash_rmf( pMsg, msgLen, pElm, pGFp, pMethod ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00430.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00430.c deleted file mode 100644 index eded3fb53..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00430.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpCpyElement( pA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpCpyElement( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpCpyElement( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpCpyElement,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpCpyElement( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpCpyElement( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00431.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00431.c deleted file mode 100644 index 78cbf94c8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00431.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetElement,(const IppsGFpElement* pA, Ipp32u* pDataA, int lenA, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpGetElement( pA, pDataA, lenA, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00432.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00432.c deleted file mode 100644 index 9f2b1a17d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00432.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetElementOctString,(const IppsGFpElement* pA, Ipp8u* pStr, int strSize, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpGetElementOctString( pA, pStr, strSize, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00433.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00433.c deleted file mode 100644 index 00a6c7e40..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00433.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpCmpElement( pA, pB, pResult, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpCmpElement( pA, pB, pResult, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpCmpElement( pA, pB, pResult, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpCmpElement,(const IppsGFpElement* pA, const IppsGFpElement* pB, int* pResult, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpCmpElement( pA, pB, pResult, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpCmpElement( pA, pB, pResult, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00434.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00434.c deleted file mode 100644 index b242896af..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00434.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpIsZeroElement( pA, pResult, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpIsZeroElement( pA, pResult, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpIsZeroElement( pA, pResult, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpIsZeroElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpIsZeroElement( pA, pResult, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpIsZeroElement( pA, pResult, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00435.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00435.c deleted file mode 100644 index 6c83019b9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00435.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpIsUnityElement( pA, pResult, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpIsUnityElement( pA, pResult, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpIsUnityElement( pA, pResult, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpIsUnityElement,(const IppsGFpElement* pA, int* pResult, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpIsUnityElement( pA, pResult, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpIsUnityElement( pA, pResult, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00436.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00436.c deleted file mode 100644 index af340af93..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00436.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpConj( pA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpConj( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpConj( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpConj,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpConj( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpConj( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00437.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00437.c deleted file mode 100644 index fb75555b0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00437.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpNeg( pA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpNeg( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpNeg( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpNeg, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpNeg( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpNeg( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00438.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00438.c deleted file mode 100644 index e94d60521..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00438.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpInv( pA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpInv( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpInv( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpInv, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpInv( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpInv( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00439.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00439.c deleted file mode 100644 index 812dfecdb..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00439.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSqrt( pA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSqrt( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSqrt( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSqrt,(const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSqrt( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSqrt( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00440.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00440.c deleted file mode 100644 index 1c596b1b4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00440.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSqr( pA, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSqr( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSqr( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSqr, (const IppsGFpElement* pA, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSqr( pA, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSqr( pA, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00441.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00441.c deleted file mode 100644 index 76a8a76d3..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00441.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpAdd( pA, pB, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpAdd( pA, pB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpAdd( pA, pB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpAdd, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpAdd( pA, pB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpAdd( pA, pB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00442.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00442.c deleted file mode 100644 index 95eb94c35..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00442.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSub( pA, pB, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSub( pA, pB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSub( pA, pB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSub, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSub( pA, pB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSub( pA, pB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00443.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00443.c deleted file mode 100644 index 809d22557..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00443.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMul( pA, pB, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMul( pA, pB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMul( pA, pB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpMul, (const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMul( pA, pB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMul( pA, pB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00444.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00444.c deleted file mode 100644 index 17c412837..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00444.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpExp, (const IppsGFpElement* pA, const IppsBigNumState* pE, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpExp( pA, pE, pR, pGFp, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00445.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00445.c deleted file mode 100644 index c57c0964b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00445.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpMultiExp,(const IppsGFpElement* const ppElmA[], const IppsBigNumState* const ppE[], int nItems, IppsGFpElement* pR, IppsGFpState* pGFp, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMultiExp( ppElmA, ppE, nItems, pR, pGFp, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00446.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00446.c deleted file mode 100644 index 62df5a1c4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00446.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpAdd_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpAdd_PE( pA, pParentB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00447.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00447.c deleted file mode 100644 index 4d53d862f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00447.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpSub_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpSub_PE( pA, pParentB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00448.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00448.c deleted file mode 100644 index 09023668c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00448.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpMul_PE,(const IppsGFpElement* pA, const IppsGFpElement* pParentB, IppsGFpElement* pR, IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpMul_PE( pA, pParentB, pR, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00449.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00449.c deleted file mode 100644 index 559e7855b..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00449.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, l9_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, k1_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpGetInfo( pInfo, pGFp ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpGetInfo( pInfo, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpGetInfo( pInfo, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) -IPPAPI(IppStatus, h9_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpGetInfo, (IppsGFpInfo* pInfo, const IppsGFpState* pGFp)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpGetInfo( pInfo, pGFp ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpGetInfo( pInfo, pGFp ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00450.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00450.c deleted file mode 100644 index 9852c43f4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00450.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) -IPPAPI(IppStatus, l9_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) -IPPAPI(IppStatus, k1_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECGetSize( pGFp, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECGetSize( pGFp, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECGetSize( pGFp, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) -IPPAPI(IppStatus, h9_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetSize,(const IppsGFpState* pGFp, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECGetSize( pGFp, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECGetSize( pGFp, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00451.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00451.c deleted file mode 100644 index 003465970..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00451.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInit( pGFp, pA, pB, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInit( pGFp, pA, pB, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInit( pGFp, pA, pB, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInit, (const IppsGFpState* pGFp, const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInit( pGFp, pA, pB, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInit( pGFp, pA, pB, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00452.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00452.c deleted file mode 100644 index 3be6b5a14..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00452.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSet( pA, pB, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSet( pA, pB, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSet( pA, pB, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSet,(const IppsGFpElement* pA, const IppsGFpElement* pB, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSet( pA, pB, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSet( pA, pB, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00453.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00453.c deleted file mode 100644 index 770cac9b9..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00453.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetSubgroup,(const IppsGFpElement* pX, const IppsGFpElement* pY, const IppsBigNumState* pOrder, const IppsBigNumState* pCofactor, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetSubgroup( pX, pY, pOrder, pCofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00454.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00454.c deleted file mode 100644 index 7cf228e3f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00454.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStd128r1( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStd128r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStd128r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd128r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStd128r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStd128r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00455.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00455.c deleted file mode 100644 index dbac72f62..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00455.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStd128r2( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStd128r2( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStd128r2( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd128r2,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStd128r2( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStd128r2( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00456.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00456.c deleted file mode 100644 index 0c2c01d70..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00456.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStd192r1( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStd192r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStd192r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd192r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStd192r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStd192r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00457.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00457.c deleted file mode 100644 index e08a9a2f3..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00457.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStd224r1( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStd224r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStd224r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd224r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStd224r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStd224r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00458.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00458.c deleted file mode 100644 index 9ba571045..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00458.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStd256r1( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStd256r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStd256r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd256r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStd256r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStd256r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00459.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00459.c deleted file mode 100644 index ad0f2f89f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00459.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStd384r1( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStd384r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStd384r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd384r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStd384r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStd384r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00460.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00460.c deleted file mode 100644 index 98da42912..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00460.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStd521r1( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStd521r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStd521r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStd521r1,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStd521r1( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStd521r1( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00461.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00461.c deleted file mode 100644 index 0bf42c534..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00461.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStdSM2( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStdSM2( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStdSM2( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStdSM2, (const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStdSM2( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStdSM2( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00462.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00462.c deleted file mode 100644 index 0960b220e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00462.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECInitStdBN256( pGFp, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECInitStdBN256( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECInitStdBN256( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECInitStdBN256,(const IppsGFpState* pGFp, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECInitStdBN256( pGFp, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECInitStdBN256( pGFp, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00463.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00463.c deleted file mode 100644 index 622dfb6ca..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00463.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECBindGxyTblStd192r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECBindGxyTblStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECBindGxyTblStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd192r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECBindGxyTblStd192r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECBindGxyTblStd192r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00464.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00464.c deleted file mode 100644 index 73a08ad9e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00464.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECBindGxyTblStd224r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECBindGxyTblStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECBindGxyTblStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd224r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECBindGxyTblStd224r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECBindGxyTblStd224r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00465.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00465.c deleted file mode 100644 index 69f0d30c7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00465.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECBindGxyTblStd256r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECBindGxyTblStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECBindGxyTblStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd256r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECBindGxyTblStd256r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECBindGxyTblStd256r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00466.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00466.c deleted file mode 100644 index ee3f98c8f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00466.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECBindGxyTblStd384r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECBindGxyTblStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECBindGxyTblStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd384r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECBindGxyTblStd384r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECBindGxyTblStd384r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00467.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00467.c deleted file mode 100644 index 9a4cf9089..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00467.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECBindGxyTblStd521r1( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECBindGxyTblStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECBindGxyTblStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStd521r1,(IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECBindGxyTblStd521r1( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECBindGxyTblStd521r1( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00468.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00468.c deleted file mode 100644 index adeb6404f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00468.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECBindGxyTblStdSM2( pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECBindGxyTblStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECBindGxyTblStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECBindGxyTblStdSM2, (IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECBindGxyTblStdSM2( pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECBindGxyTblStdSM2( pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00469.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00469.c deleted file mode 100644 index e506a1d47..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00469.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECGet( ppGFp, pA, pB, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECGet( ppGFp, pA, pB, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECGet( ppGFp, pA, pB, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGet,(IppsGFpState** const ppGFp, IppsGFpElement* pA, IppsGFpElement* pB, const IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECGet( ppGFp, pA, pB, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECGet( ppGFp, pA, pB, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00470.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00470.c deleted file mode 100644 index 595895ea8..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00470.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetSubgroup,(IppsGFpState** const ppGFp, IppsGFpElement* pX, IppsGFpElement* pY, IppsBigNumState* pOrder,IppsBigNumState* pCofactor, const IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECGetSubgroup( ppGFp, pX, pY, pOrder, pCofactor, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00471.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00471.c deleted file mode 100644 index af64a48f5..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00471.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) -IPPAPI(IppStatus, l9_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) -IPPAPI(IppStatus, k1_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) -IPPAPI(IppStatus, h9_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECScratchBufferSize,(int nScalars, const IppsGFpECState* pEC, int* pBufferSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECScratchBufferSize( nScalars, pEC, pBufferSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00472.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00472.c deleted file mode 100644 index c441f18bf..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00472.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerify,(IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECVerify( pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00473.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00473.c deleted file mode 100644 index 56e5c0eba..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00473.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) -IPPAPI(IppStatus, l9_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) -IPPAPI(IppStatus, k1_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECPointGetSize( pEC, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECPointGetSize( pEC, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECPointGetSize( pEC, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) -IPPAPI(IppStatus, h9_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPointGetSize,(const IppsGFpECState* pEC, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECPointGetSize( pEC, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECPointGetSize( pEC, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00474.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00474.c deleted file mode 100644 index 53d7b0f53..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00474.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECPointInit( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECPointInit( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECPointInit( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPointInit, (const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECPointInit( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECPointInit( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00475.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00475.c deleted file mode 100644 index 4f46f4926..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00475.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointAtInfinity( pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointAtInfinity( pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointAtInfinity( pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointAtInfinity,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointAtInfinity( pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointAtInfinity( pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00476.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00476.c deleted file mode 100644 index 5afda40bc..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00476.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPoint,(const IppsGFpElement* pX, const IppsGFpElement* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPoint( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00477.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00477.c deleted file mode 100644 index 7d55b17f7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00477.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointRegular,(const IppsBigNumState* pX, const IppsBigNumState* pY, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointRegular( pX, pY, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00478.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00478.c deleted file mode 100644 index 6bcdb99bf..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00478.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointRandom,(IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointRandom( pPoint, pEC, rndFunc, pRndParam, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00479.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00479.c deleted file mode 100644 index 89ead03d7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00479.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECMakePoint( pX, pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECMakePoint( pX, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECMakePoint( pX, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECMakePoint,(const IppsGFpElement* pX, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECMakePoint( pX, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECMakePoint( pX, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00480.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00480.c deleted file mode 100644 index 97e6a93c6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00480.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHash,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointHash( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00481.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00481.c deleted file mode 100644 index 8041e2564..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00481.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHashBackCompatible,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, IppHashAlgId hashID, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointHashBackCompatible( hdr, pMsg, msgLen, pPoint, pEC, hashID, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00482.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00482.c deleted file mode 100644 index 596f91203..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00482.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHash_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointHash_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00483.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00483.c deleted file mode 100644 index ea1c754e4..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00483.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointHashBackCompatible_rmf,(Ipp32u hdr, const Ipp8u* pMsg, int msgLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC, const IppsHashMethod* pMethod, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointHashBackCompatible_rmf( hdr, pMsg, msgLen, pPoint, pEC, pMethod, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00484.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00484.c deleted file mode 100644 index 5e8ce3cee..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00484.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetPoint,(const IppsGFpECPoint* pPoint, IppsGFpElement* pX, IppsGFpElement* pY, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECGetPoint( pPoint, pX, pY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00485.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00485.c deleted file mode 100644 index fe88faea6..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00485.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetPointRegular,(const IppsGFpECPoint* pPoint, IppsBigNumState* pX, IppsBigNumState* pY, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECGetPointRegular( pPoint, pX, pY, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00486.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00486.c deleted file mode 100644 index 264f5f537..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00486.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSetPointOctString,(const Ipp8u* pStr, int strLen, IppsGFpECPoint* pPoint, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSetPointOctString( pStr, strLen, pPoint, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00487.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00487.c deleted file mode 100644 index 9c4b010aa..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00487.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetPointOctString,(const IppsGFpECPoint* pPoint, Ipp8u* pStr, int strLen, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECGetPointOctString( pPoint, pStr, strLen, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00488.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00488.c deleted file mode 100644 index 524a4f02e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00488.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECTstPoint( pP, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECTstPoint( pP, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECTstPoint( pP, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECTstPoint,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECTstPoint( pP, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECTstPoint( pP, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00489.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00489.c deleted file mode 100644 index 95dd530de..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00489.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECTstPointInSubgroup,(const IppsGFpECPoint* pP, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECTstPointInSubgroup( pP, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00490.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00490.c deleted file mode 100644 index 8def8247d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00490.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECCpyPoint( pA, pR, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECCpyPoint( pA, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECCpyPoint( pA, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECCpyPoint,(const IppsGFpECPoint* pA, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECCpyPoint( pA, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECCpyPoint( pA, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00491.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00491.c deleted file mode 100644 index 13da6cb02..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00491.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECCmpPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppECResult* pResult, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECCmpPoint( pP, pQ, pResult, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00492.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00492.c deleted file mode 100644 index dcd972e53..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00492.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECNegPoint( pP, pR, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECNegPoint( pP, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECNegPoint( pP, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECNegPoint,(const IppsGFpECPoint* pP, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECNegPoint( pP, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECNegPoint( pP, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00493.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00493.c deleted file mode 100644 index 570c5113e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00493.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECAddPoint( pP, pQ, pR, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECAddPoint( pP, pQ, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECAddPoint( pP, pQ, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECAddPoint,(const IppsGFpECPoint* pP, const IppsGFpECPoint* pQ, IppsGFpECPoint* pR, IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECAddPoint( pP, pQ, pR, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECAddPoint( pP, pQ, pR, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00494.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00494.c deleted file mode 100644 index aaf601c8f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00494.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECMulPoint,(const IppsGFpECPoint* pP, const IppsBigNumState* pN, IppsGFpECPoint* pR, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECMulPoint( pP, pN, pR, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00495.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00495.c deleted file mode 100644 index e94f9c75a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00495.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, l9_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, k1_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -IPPAPI(IppStatus, h9_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPrivateKey,(IppsBigNumState* pPrivate, IppsGFpECState* pEC, IppBitSupplier rndFunc, void* pRndParam)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECPrivateKey( pPrivate, pEC, rndFunc, pRndParam ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00496.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00496.c deleted file mode 100644 index 92a59fc24..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00496.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECPublicKey,(const IppsBigNumState* pPrivate, IppsGFpECPoint* pPublic, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECPublicKey( pPrivate, pPublic, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00497.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00497.c deleted file mode 100644 index 8b671aa1e..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00497.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECTstKeyPair,(const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECTstKeyPair( pPrivate, pPublic, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00498.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00498.c deleted file mode 100644 index f1f184c2d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00498.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSharedSecretDH,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSharedSecretDH( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00499.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00499.c deleted file mode 100644 index e33ee2597..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00499.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSharedSecretDHC,(const IppsBigNumState* pPrivateA, const IppsGFpECPoint* pPublicB, IppsBigNumState* pShare, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSharedSecretDHC( pPrivateA, pPublicB, pShare, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00500.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00500.c deleted file mode 100644 index 55c44f562..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00500.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSignDSA,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSignDSA( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00501.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00501.c deleted file mode 100644 index 04deb9d3a..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00501.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerifyDSA,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECVerifyDSA( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00502.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00502.c deleted file mode 100644 index 4e2d6bfa0..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00502.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSignNR,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSignNR( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00503.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00503.c deleted file mode 100644 index baa383f20..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00503.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerifyNR,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECVerifyNR( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00504.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00504.c deleted file mode 100644 index dd215f6d2..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00504.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECSignSM2,(const IppsBigNumState* pMsgDigest, const IppsBigNumState* pRegPrivate, IppsBigNumState* pEphPrivate, IppsBigNumState* pSignR, IppsBigNumState* pSignS, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECSignSM2( pMsgDigest, pRegPrivate, pEphPrivate, pSignR, pSignS, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00505.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00505.c deleted file mode 100644 index 36d08f915..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00505.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECVerifySM2,(const IppsBigNumState* pMsgDigest, const IppsGFpECPoint* pRegPublic, const IppsBigNumState* pSignR, const IppsBigNumState* pSignS, IppECResult* pResult, IppsGFpECState* pEC, Ipp8u* pScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECVerifySM2( pMsgDigest, pRegPublic, pSignR, pSignS, pResult, pEC, pScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00506.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00506.c deleted file mode 100644 index 64fd3414d..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00506.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, l9_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, k1_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECGetInfo_GF( pInfo, pEC ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECGetInfo_GF( pInfo, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECGetInfo_GF( pInfo, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) -IPPAPI(IppStatus, h9_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECGetInfo_GF,(IppsGFpInfo* pInfo, const IppsGFpECState* pEC)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECGetInfo_GF( pInfo, pEC ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECGetInfo_GF( pInfo, pEC ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00507.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00507.c deleted file mode 100644 index 1b9922ced..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00507.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) -IPPAPI(IppStatus, l9_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) -IPPAPI(IppStatus, k1_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESGetSize_SM2( pEC, pSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESGetSize_SM2( pEC, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESGetSize_SM2( pEC, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) -IPPAPI(IppStatus, h9_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESGetSize_SM2, (const IppsGFpECState* pEC, int* pSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESGetSize_SM2( pEC, pSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESGetSize_SM2( pEC, pSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00508.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00508.c deleted file mode 100644 index 8ea7b4636..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00508.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) -IPPAPI(IppStatus, l9_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) -IPPAPI(IppStatus, k1_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) -IPPAPI(IppStatus, h9_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESInit_SM2, (IppsGFpECState* pEC, IppsECESState_SM2* pState, int avaliableCtxSize)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESInit_SM2( pEC, pState, avaliableCtxSize ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00509.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00509.c deleted file mode 100644 index de901594c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00509.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) -IPPAPI(IppStatus, l9_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) -IPPAPI(IppStatus, k1_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) -IPPAPI(IppStatus, h9_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESSetKey_SM2, (const IppsBigNumState* pPrivate, const IppsGFpECPoint* pPublic, IppsECESState_SM2* pState, IppsGFpECState* pEC, Ipp8u* pEcScratchBuffer)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESSetKey_SM2( pPrivate, pPublic, pState, pEC, pEcScratchBuffer ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00510.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00510.c deleted file mode 100644 index 502dd6a9c..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00510.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) -IPPAPI(IppStatus, l9_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) -IPPAPI(IppStatus, k1_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESStart_SM2( pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESStart_SM2( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESStart_SM2( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) -IPPAPI(IppStatus, h9_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESStart_SM2, (IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESStart_SM2( pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESStart_SM2( pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00511.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00511.c deleted file mode 100644 index 675e2b0c7..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00511.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, l9_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, k1_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, h9_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESEncrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESEncrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00512.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00512.c deleted file mode 100644 index c2f020f6f..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00512.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, l9_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, k1_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, h9_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESDecrypt_SM2, (const Ipp8u* pInput, Ipp8u* pOutput, int dataLen, IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESDecrypt_SM2( pInput, pOutput, dataLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00513.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00513.c deleted file mode 100644 index afa1f8581..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00513.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, l9_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, k1_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) -IPPAPI(IppStatus, h9_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESFinal_SM2, (Ipp8u* pTag, int tagLen, IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESFinal_SM2( pTag, tagLen, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00514.c b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00514.c deleted file mode 100644 index fd43139f1..000000000 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/ipp_disp/ippcpsgx_disp00514.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2011-2021 Intel Corporation. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include "ippcp.h" - -#define IPPFUN(type,name,arg) extern type IPP_STDCALL name arg - -#ifndef NULL -#ifdef __cplusplus -#define NULL 0 -#else -#define NULL ((void *)0) -#endif -#endif - -#if defined (_M_AMD64) || defined (__x86_64__) - - -#define AVX3I_FEATURES ( ippCPUID_SHA|ippCPUID_AVX512VBMI|ippCPUID_AVX512VBMI2|ippCPUID_AVX512IFMA|ippCPUID_AVX512GFNI|ippCPUID_AVX512VAES|ippCPUID_AVX512VCLMUL ) -#define AVX3X_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512VL|ippCPUID_AVX512BW|ippCPUID_AVX512DQ ) -#define AVX3M_FEATURES ( ippCPUID_AVX512F|ippCPUID_AVX512CD|ippCPUID_AVX512PF|ippCPUID_AVX512ER ) - - -IPPAPI(IppStatus, y8_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) -IPPAPI(IppStatus, l9_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) -IPPAPI(IppStatus, k1_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( AVX3I_FEATURES == ( features & AVX3I_FEATURES )) { - return k1_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); - } else - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return l9_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return y8_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#else - - -IPPAPI(IppStatus, p8_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) -IPPAPI(IppStatus, h9_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) - -IPPFUN(IppStatus,sgx_disp_ippsGFpECESGetBuffersSize_SM2, (int* pPublicKeySize, int* pMaximumTagSize, const IppsECESState_SM2* pState)) -{ - Ipp64u features; - ippcpGetCpuFeatures( &features ); - - if( ippCPUID_AVX2 == ( features & ippCPUID_AVX2 )) { - return h9_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); - } else - if( ippCPUID_SSE42 == ( features & ippCPUID_SSE42 )) { - return p8_ippsGFpECESGetBuffersSize_SM2( pPublicKeySize, pMaximumTagSize, pState ); - } else - return ippStsCpuNotSupportedErr; -} -#endif diff --git a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/sgx_sm2.cpp b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/sgx_sm2.cpp index 8c2b83fc6..ea197da55 100644 --- a/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/sgx_sm2.cpp +++ b/sgx_crypto/sgx_crypto_sys/tcrypto/ipp/sgx_sm2.cpp @@ -524,8 +524,8 @@ sgx_status_t sgx_calculate_sm2_priv_key(const unsigned char* hash_drg, int hash_ const unsigned char* sgx_sm2_order, int sgx_sm2_order_len, unsigned char* out_key, int out_key_len) { - if (out_key == NULL || hash_drg_len <= 0 || sgx_sm2_order <= 0 || - out_key_len <= 0 || hash_drg == NULL || sgx_sm2_order_len == NULL) { + if (out_key == NULL || hash_drg_len <= 0 || sgx_sm2_order == NULL || + out_key_len <= 0 || hash_drg == NULL || sgx_sm2_order_len <= 0) { return SGX_ERROR_INVALID_PARAMETER; } diff --git a/sgx_edl/edl/sgx_sdk_additional_include/netdb.h b/sgx_edl/edl/sgx_sdk_additional_include/netdb.h new file mode 100644 index 000000000..adefbbea6 --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/netdb.h @@ -0,0 +1,68 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license.s +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _NETDB_H +#define _NETDB_H + +#include +#include +#include + +#ifndef HACK_ADDRINFO_REDEF +struct addrinfo { + int ai_flags; + int ai_family; + int ai_socktype; + int ai_protocol; + socklen_t ai_addrlen; + struct sockaddr *ai_addr; + char *ai_canonname; + struct addrinfo *ai_next; +}; +#endif + +__BEGIN_DECLS + +// ocall +int getaddrinfo (const char *__restrict, const char *__restrict, const struct addrinfo *__restrict, struct addrinfo **__restrict); +void freeaddrinfo (struct addrinfo *); +/* Description of data base entry for a single host. */ + +struct hostent +{ + char *h_name; /* Official name of host. */ + char **h_aliases; /* Alias list. */ + int h_addrtype; /* Host address type. */ + int h_length; /* Length of address. */ + char **h_addr_list; /* List of addresses from name server. */ +#ifdef __USE_MISC +# define h_addr h_addr_list[0] /* Address, for backward compatibility.*/ +#endif +}; + +__END_DECLS + +#endif diff --git a/sgx_edl/edl/sgx_sdk_additional_include/netinet/in.h b/sgx_edl/edl/sgx_sdk_additional_include/netinet/in.h new file mode 100644 index 000000000..242c8100f --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/netinet/in.h @@ -0,0 +1,85 @@ +/* Copyright (C) 1991-2022 Free Software Foundation, Inc. + This file is part of the GNU C Library. + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#pragma once + +#include +#include +#include +#include + +__BEGIN_DECLS + +/* Internet address. */ +typedef uint32_t in_addr_t; +struct in_addr + { + in_addr_t s_addr; + }; + +/* Type to represent a port. */ +typedef uint16_t in_port_t; + + +/* IPv6 address */ +struct in6_addr + { + union + { + uint8_t __u6_addr8[16]; + uint16_t __u6_addr16[8]; + uint32_t __u6_addr32[4]; + } __in6_u; +#define s6_addr __in6_u.__u6_addr8 +#ifdef __USE_MISC +# define s6_addr16 __in6_u.__u6_addr16 +# define s6_addr32 __in6_u.__u6_addr32 +#endif + }; + +extern const struct in6_addr in6addr_any; /* :: */ +extern const struct in6_addr in6addr_loopback; /* ::1 */ +#define IN6ADDR_ANY_INIT { { { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } } } +#define IN6ADDR_LOOPBACK_INIT { { { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 } } } + +#define INET_ADDRSTRLEN 16 +#define INET6_ADDRSTRLEN 46 + +typedef unsigned short int sa_family_t; + +/* Structure describing an Internet socket address. */ +struct sockaddr_in + { + sa_family_t sin_family; + in_port_t sin_port; /* Port number. */ + struct in_addr sin_addr; /* Internet address. */ + + /* Pad to size of `struct sockaddr'. */ + unsigned char sin_zero[sizeof (struct sockaddr) + - sizeof (unsigned short int) + - sizeof (in_port_t) + - sizeof (struct in_addr)]; + }; + +/* Ditto, for IPv6. */ +struct sockaddr_in6 + { + sa_family_t sin6_family; + in_port_t sin6_port; /* Transport layer port # */ + uint32_t sin6_flowinfo; /* IPv6 flow information */ + struct in6_addr sin6_addr; /* IPv6 address */ + uint32_t sin6_scope_id; /* IPv6 scope-id */ + }; + +__END_DECLS \ No newline at end of file diff --git a/sgx_edl/edl/sgx_sdk_additional_include/poll.h b/sgx_edl/edl/sgx_sdk_additional_include/poll.h new file mode 100644 index 000000000..68a6c1a50 --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/poll.h @@ -0,0 +1,47 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license. +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _POLL_H_ +#define _POLL_H_ + +#include + +typedef unsigned long nfds_t; + +struct pollfd { + int fd; + short int events; + short int revents; +}; + +__BEGIN_DECLS + +// ocall +int poll(struct pollfd *, nfds_t, int); + +__END_DECLS + +#endif diff --git a/sgx_edl/edl/sgx_sdk_additional_include/sched.h b/sgx_edl/edl/sgx_sdk_additional_include/sched.h new file mode 100644 index 000000000..159956978 --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/sched.h @@ -0,0 +1,73 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license.s +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _SCHED_H_ +#define _SCHED_H_ + +#include +#include + +typedef struct { + unsigned long __bits[128/sizeof(long)]; +} cpu_set_t; + +#define __CPU_op_S(i, size, set, op) ( (i)/8U >= (size) ? 0 : \ + (((unsigned long *)(set))[(i)/8/sizeof(long)] op (1UL<<((i)%(8*sizeof(long))))) ) + +#define CPU_SET_S(i, size, set) __CPU_op_S(i, size, set, |=) +#define CPU_CLR_S(i, size, set) __CPU_op_S(i, size, set, &=~) +#define CPU_ISSET_S(i, size, set) __CPU_op_S(i, size, set, &) + +#define __CPU_op_func_S(func, op) \ +static __inline void __CPU_##func##_S(size_t __size, cpu_set_t *__dest, \ + const cpu_set_t *__src1, const cpu_set_t *__src2) \ +{ \ + size_t __i; \ + for (__i=0; __i<__size/sizeof(long); __i++) \ + ((unsigned long *)__dest)[__i] = ((unsigned long *)__src1)[__i] \ + op ((unsigned long *)__src2)[__i] ; \ +} + +__CPU_op_func_S(AND, &) +__CPU_op_func_S(OR, |) +__CPU_op_func_S(XOR, ^) + +#define CPU_AND_S(a,b,c,d) __CPU_AND_S(a,b,c,d) +#define CPU_OR_S(a,b,c,d) __CPU_OR_S(a,b,c,d) +#define CPU_XOR_S(a,b,c,d) __CPU_XOR_S(a,b,c,d) + +__BEGIN_DECLS + +typedef int pid_t; + +// ocall +int sched_yield(void); +int sched_getaffinity(pid_t, size_t, cpu_set_t *); +int sched_setaffinity(pid_t, size_t, const cpu_set_t *); + +__END_DECLS + +#endif /* _SCHED_H_ */ diff --git a/sgx_edl/edl/sgx_sdk_additional_include/sys/epoll.h b/sgx_edl/edl/sgx_sdk_additional_include/sys/epoll.h new file mode 100644 index 000000000..386e569c1 --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/sys/epoll.h @@ -0,0 +1,50 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license. +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _SYS_EPOLL_H_ +#define _SYS_EPOLL_H_ + +#include + +typedef union epoll_data { + void *ptr; + int fd; + uint32_t u32; + uint64_t u64; +} epoll_data_t; + +struct epoll_event { + uint32_t events; + epoll_data_t data; +} __attribute__ ((__packed__)); + +// ocall +int epoll_create1(int); +int epoll_create(int); +int epoll_ctl(int, int, int, struct epoll_event *); +int epoll_wait(int, struct epoll_event *, int, int); + +#endif /* _SYS_EPOLL_H_ */ diff --git a/sgx_edl/edl/sgx_sdk_additional_include/sys/sockaddr.h b/sgx_edl/edl/sgx_sdk_additional_include/sys/sockaddr.h new file mode 100644 index 000000000..1a7938a9e --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/sys/sockaddr.h @@ -0,0 +1,32 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license. +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _SYS_SOCKADDR_H_ +#define _SYS_SOCKADDR_H_ + +typedef unsigned short int sa_family_t; + +#endif /* _SYS_SOCKADDR_H_ */ diff --git a/sgx_edl/edl/sgx_sdk_additional_include/sys/socket.h b/sgx_edl/edl/sgx_sdk_additional_include/sys/socket.h new file mode 100644 index 000000000..5c548f804 --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/sys/socket.h @@ -0,0 +1,90 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license. +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _SYS_SOCKET_H_ +#define _SYS_SOCKET_H_ + +#include +#include +#include + +typedef unsigned int socklen_t; + +#ifndef HACK_SOCKADDR_REDEF +struct sockaddr { + sa_family_t sa_family; + char sa_data[14]; +}; +#endif + +struct sockaddr_storage { + sa_family_t ss_family; + char __ss_padding[128-sizeof(long)-sizeof(sa_family_t)]; + unsigned long __ss_align; +}; + +struct msghdr { + void *msg_name; + socklen_t msg_namelen; + + struct iovec *msg_iov; + size_t msg_iovlen; + + void *msg_control; + size_t msg_controllen; + + int msg_flags; +}; + +__BEGIN_DECLS + +// ocall +int socket(int, int, int); +int socketpair(int, int, int, int [2]); + +int shutdown (int, int); + +int bind(int, const struct sockaddr *, socklen_t); +int connect(int, const struct sockaddr *, socklen_t); +int listen(int, int); +int accept4(int, struct sockaddr *__restrict, socklen_t *__restrict, int); + +int getsockname (int, struct sockaddr *__restrict, socklen_t *__restrict); +int getpeername (int, struct sockaddr *__restrict, socklen_t *__restrict); + +ssize_t send (int, const void *, size_t, int); +ssize_t recv (int, void *, size_t, int); +ssize_t sendto (int, const void *, size_t, int, const struct sockaddr *, socklen_t); +ssize_t recvfrom (int, void *__restrict, size_t, int, struct sockaddr *__restrict, socklen_t *__restrict); +ssize_t sendmsg (int, const struct msghdr *, int); +ssize_t recvmsg (int, struct msghdr *, int); + +int getsockopt (int, int, int, void *__restrict, socklen_t *__restrict); +int setsockopt (int, int, int, const void *, socklen_t); + +__END_DECLS + +#endif /* _SYS_SOCKET_H_ */ diff --git a/sgx_edl/edl/sgx_sdk_additional_include/sys/struct_timespec.h b/sgx_edl/edl/sgx_sdk_additional_include/sys/struct_timespec.h new file mode 100644 index 000000000..ba86e3839 --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/sys/struct_timespec.h @@ -0,0 +1,41 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license. +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _SYS_TIMESPEC_H_ +#define _SYS_TIMESPEC_H_ + +#ifdef _IN_ENCLAVE + +#include + +struct timespec { + __time_t tv_sec; + long tv_nsec; +}; + +#endif /* _IN_ENCLAVE*/ + +#endif /* _SYS_TIMESPEC_H_ */ diff --git a/sgx_edl/edl/sgx_sdk_additional_include/sys/uio.h b/sgx_edl/edl/sgx_sdk_additional_include/sys/uio.h new file mode 100644 index 000000000..7eeac89b3 --- /dev/null +++ b/sgx_edl/edl/sgx_sdk_additional_include/sys/uio.h @@ -0,0 +1,49 @@ +// +// Copyright © 2005-2020 Rich Felker, et al. +// Licensed under the MIT license. +// + +/* Copyright © 2005-2020 Rich Felker, et al. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice shall be +included in all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY +CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef _SYS_UIO_H_ +#define _SYS_UIO_H_ + +#include +#include + +struct iovec { + void *iov_base; + size_t iov_len; +}; + +__BEGIN_DECLS + +// ocall +ssize_t readv(int, const struct iovec *, int); +ssize_t writev(int, const struct iovec *, int); + +ssize_t preadv64(int, const struct iovec *, int, uint64_t); +ssize_t pwritev64(int, const struct iovec *, int, uint64_t); + +__END_DECLS + +#endif /* _SYS_UIO_H_ */ diff --git a/sgx_key_exchange/message/Cargo.toml b/sgx_key_exchange/message/Cargo.toml deleted file mode 100644 index 0ef0bc0ce..000000000 --- a/sgx_key_exchange/message/Cargo.toml +++ /dev/null @@ -1,47 +0,0 @@ -# Licensed to the Apache Software Foundation (ASF) under one -# or more contributor license agreements. See the NOTICE file -# distributed with this work for additional information -# regarding copyright ownership. The ASF licenses this file -# to you under the Apache License, Version 2.0 (the -# "License"); you may not use this file except in compliance -# with the License. You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, -# software distributed under the License is distributed on an -# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -# KIND, either express or implied. See the License for the -# specific language governing permissions and limitations -# under the License. - -[package] -name = "sgx_ra_msg" -version = "2.0.0" -authors = ["The Teaclave Authors"] -repository = "https://github.com/apache/teaclave-sgx-sdk" -license-file = "LICENSE" -documentation = "https://teaclave.apache.org/sgx-sdk-docs/" -description = "Rust SGX SDK provides the ability to write Intel SGX applications in Rust Programming Language." -edition = "2021" - -[lib] -name = "sgx_ra_msg" -crate-type = ["rlib"] - -[features] -default = ["tmsg"] -tmsg = ["sgx_trts", "sgx_tcrypto"] -umsg = ["sgx_ucrypto"] -tserialize = ["tmsg", "sgx_tserialize", "sgx_tcrypto/tserialize"] -userialize = ["umsg", "sgx_userialize", "sgx_ucrypto/userialize"] - -[target.'cfg(not(target_vendor = "teaclave"))'.dependencies] -sgx_types = { path = "../../sgx_types" } -sgx_trts = { path = "../../sgx_trts", optional = true } - -[dependencies] -sgx_tcrypto = { path = "../../sgx_crypto", default-features = false, features = ["tcrypto"], package = 'sgx_crypto', optional = true } -sgx_ucrypto = { path = "../../sgx_crypto", default-features = false, features = ["ucrypto"], package = 'sgx_crypto', optional = true } -sgx_tserialize = { path = "../../sgx_serialize", default-features = false, features = ["tserialize", "derive"], package = 'sgx_serialize', optional = true } -sgx_userialize = { path = "../../sgx_serialize", default-features = false, features = ["userialize", "derive"], package = 'sgx_serialize', optional = true } diff --git a/sgx_key_exchange/message/src/lib.rs b/sgx_key_exchange/message/src/lib.rs deleted file mode 100644 index d61a73c16..000000000 --- a/sgx_key_exchange/message/src/lib.rs +++ /dev/null @@ -1,47 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -#![no_std] -#![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] -#![feature(allocator_api)] - -#[cfg(all(feature = "tmsg", feature = "umsg"))] -compile_error!("feature \"tmsg\" and feature \"umsg\" cannot be enabled at the same time"); - -#[cfg(not(any(feature = "tmsg", feature = "umsg")))] -compile_error!("need to enable feature \"tmsg\" or feature \"umsg\""); - -#[macro_use] -extern crate alloc; - -#[macro_use] -extern crate sgx_types; - -#[cfg(feature = "tmsg")] -extern crate sgx_tcrypto as sgx_crypto; -#[cfg(feature = "tmsg")] -extern crate sgx_trts; -#[cfg(feature = "umsg")] -extern crate sgx_ucrypto as sgx_crypto; - -#[cfg(feature = "tserialize")] -extern crate sgx_tserialize as sgx_serialize; -#[cfg(feature = "userialize")] -extern crate sgx_userialize as sgx_serialize; - -mod message; -pub use message::*; diff --git a/sgx_key_exchange/message/src/message.rs b/sgx_key_exchange/message/src/message.rs deleted file mode 100644 index 8adb091b2..000000000 --- a/sgx_key_exchange/message/src/message.rs +++ /dev/null @@ -1,513 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -use alloc::alloc::Global; -use alloc::boxed::Box; -use alloc::vec::{self, Vec}; -use core::alloc::Allocator; -use core::mem; -#[cfg(feature = "tmsg")] -use core::ptr; -use core::slice; -use sgx_crypto::ecc::{EcPrivateKey, EcPublicKey, EcSignature}; -use sgx_crypto::mac::AesCMac; -#[cfg(feature = "tmsg")] -use sgx_trts::trts::{is_within_enclave, is_within_host, EnclaveRange}; -use sgx_types::error::{SgxResult, SgxStatus}; -use sgx_types::memeq::ConstTimeEq; -use sgx_types::types::{ - AlignKey128bit, CRaMsg1, CRaMsg2, CRaMsg3, Ec256PublicKey, EpidGroupId, Mac, PsSecPropDesc, - Quote, QuoteSignType, Spid, -}; - -#[cfg(any(feature = "tserialize", feature = "userialize"))] -use sgx_serialize::{Deserialize, Serialize}; - -#[derive(Clone, Copy, Debug, Default)] -#[cfg_attr( - any(feature = "tserialize", feature = "userialize"), - derive(Deserialize, Serialize) -)] -pub struct RaMsg1 { - pub pub_key_a: EcPublicKey, - pub gid: EpidGroupId, -} - -impl_struct_ContiguousMemory! { - RaMsg1; -} -impl_asref_array! { - RaMsg1; -} - -#[derive(Clone, Debug, Default)] -#[cfg_attr( - any(feature = "tserialize", feature = "userialize"), - derive(Deserialize, Serialize) -)] -pub struct RaMsg2 { - pub pub_key_b: EcPublicKey, - pub spid: Spid, - pub quote_type: QuoteSignType, - pub kdf_id: u16, - pub sign_gb_ga: EcSignature, - pub mac: Mac, - pub sig_rl: Option>, -} - -#[derive(Clone, Debug, Default)] -#[cfg_attr( - any(feature = "tserialize", feature = "userialize"), - derive(Deserialize, Serialize) -)] -pub struct RaMsg3 { - pub mac: Mac, - pub pub_key_a: EcPublicKey, - pub ps_sec_prop: PsSecPropDesc, - pub quote: Box<[u8]>, -} - -impl RaMsg1 { - #[inline] - pub fn into_bytes(self) -> SgxResult> { - self.to_bytes() - } - - #[inline] - pub fn to_bytes(&self) -> SgxResult> { - self.to_bytes_in(Global) - } - - #[inline] - pub fn into_bytes_in(self, alloc: A) -> SgxResult> { - self.to_bytes_in(alloc) - } - - pub fn to_bytes_in(&self, alloc: A) -> SgxResult> { - let raw_msg: CRaMsg1 = self.into(); - Ok(raw_msg.as_ref().to_vec_in(alloc)) - } - - pub fn copy_to_slice(&self, bytes: &mut [u8]) -> SgxResult { - ensure!( - bytes.len() == mem::size_of::(), - SgxStatus::InvalidParameter - ); - - let raw_msg = unsafe { &mut *(bytes.as_mut_ptr() as *mut CRaMsg1) }; - raw_msg.g_a = self.pub_key_a.into(); - raw_msg.gid = self.gid; - Ok(()) - } - - #[inline] - pub fn from_bytes(bytes: Vec) -> SgxResult { - Self::from_slice(bytes.as_slice()) - } - - pub fn from_slice(bytes: &[u8]) -> SgxResult { - let raw_msg = unsafe { &*(bytes.as_ptr() as *const CRaMsg1) }; - Ok(raw_msg.into()) - } -} - -impl RaMsg2 { - pub fn gen_sign_and_cmac( - &mut self, - pub_key_a: &EcPublicKey, - sign_priv_key: &EcPrivateKey, - cmac_key: &AlignKey128bit, - ) -> SgxResult { - let keys: [Ec256PublicKey; 2] = [self.pub_key_b.into(), pub_key_a.into()]; - let sign_gb_ga = sign_priv_key.sign(&keys)?; - - let mut cmac = AesCMac::new(&cmac_key.key)?; - cmac.update(&self.pub_key_b)?; - cmac.update(&self.spid)?; - cmac.update(&(self.quote_type as u16))?; - cmac.update(&self.kdf_id)?; - cmac.update(&sign_gb_ga)?; - let mac = cmac.finalize()?; - - self.sign_gb_ga = sign_gb_ga; - self.mac = mac; - - Ok(()) - } - - pub fn verify_sign_and_cmac( - &self, - pub_key_a: &EcPublicKey, - verify_pub_key: &EcPublicKey, - cmac_key: &AlignKey128bit, - ) -> SgxResult { - let keys: [Ec256PublicKey; 2] = [self.pub_key_b.into(), pub_key_a.into()]; - let is_valid = verify_pub_key.verify(&keys, &self.sign_gb_ga)?; - ensure!(is_valid, SgxStatus::InvalidSignature); - - let mut cmac = AesCMac::new(&cmac_key.key)?; - cmac.update(&self.pub_key_b)?; - cmac.update(&self.spid)?; - cmac.update(&(self.quote_type as u16))?; - cmac.update(&self.kdf_id)?; - cmac.update(&self.sign_gb_ga)?; - let mac = cmac.finalize()?; - - ensure!(mac.ct_eq(&self.mac), SgxStatus::MacMismatch); - Ok(()) - } - - #[inline] - pub fn into_bytes(self) -> SgxResult> { - self.to_bytes() - } - - #[inline] - pub fn to_bytes(&self) -> SgxResult> { - self.to_bytes_in(Global) - } - - #[inline] - pub fn into_bytes_in(self, alloc: A) -> SgxResult> { - self.to_bytes_in(alloc) - } - - pub fn to_bytes_in(&self, alloc: A) -> SgxResult> { - let raw_len = self.get_raw_ize().ok_or(SgxStatus::InvalidParameter)?; - - let mut bytes = vec::from_elem_in(0_u8, raw_len as usize, alloc); - let header_len = mem::size_of::() as u32; - - let raw_msg = unsafe { &mut *(bytes.as_mut_ptr() as *mut CRaMsg2) }; - raw_msg.g_b = self.pub_key_b.into(); - raw_msg.spid = self.spid; - raw_msg.quote_type = self.quote_type as u16; - raw_msg.kdf_id = self.kdf_id; - raw_msg.sign_gb_ga = self.sign_gb_ga.into(); - raw_msg.mac = self.mac; - raw_msg.sig_rl_size = raw_len - header_len; - if let Some(sig_rl) = self.sig_rl.as_ref() { - bytes[header_len as usize..].copy_from_slice(sig_rl); - } - Ok(bytes) - } - - pub fn copy_to_slice(&self, bytes: &mut [u8]) -> SgxResult { - let raw_len = self.get_raw_ize().ok_or(SgxStatus::InvalidParameter)?; - ensure!(bytes.len() == raw_len as usize, SgxStatus::InvalidParameter); - - let header_len = mem::size_of::() as u32; - let raw_msg = unsafe { &mut *(bytes.as_mut_ptr() as *mut CRaMsg2) }; - - raw_msg.g_b = self.pub_key_b.into(); - raw_msg.spid = self.spid; - raw_msg.quote_type = self.quote_type as u16; - raw_msg.kdf_id = self.kdf_id; - raw_msg.sign_gb_ga = self.sign_gb_ga.into(); - raw_msg.mac = self.mac; - raw_msg.sig_rl_size = raw_len - header_len; - if let Some(sig_rl) = self.sig_rl.as_ref() { - bytes[header_len as usize..].copy_from_slice(sig_rl); - } - Ok(()) - } - - #[inline] - pub fn from_bytes(bytes: Vec) -> SgxResult { - Self::from_slice(bytes.as_slice()) - } - - pub fn from_slice(bytes: &[u8]) -> SgxResult { - ensure!( - bytes.len() >= mem::size_of::(), - SgxStatus::InvalidParameter - ); - - let header_len = mem::size_of::() as u32; - let raw_msg = unsafe { &*(bytes.as_ptr() as *const CRaMsg2) }; - - ensure!( - (raw_msg.sig_rl_size <= u32::MAX - header_len) - && (bytes.len() == (header_len + raw_msg.sig_rl_size) as usize), - SgxStatus::InvalidParameter - ); - - let sig_rl_len = raw_msg.sig_rl_size as usize; - let sig_rl = if sig_rl_len > 0 { - let mut sig_rl = vec![0_u8; sig_rl_len]; - sig_rl.as_mut_slice().copy_from_slice(unsafe { - slice::from_raw_parts(&raw_msg.sig_rl as *const _ as *const u8, sig_rl_len) - }); - Some(sig_rl.into_boxed_slice()) - } else { - None - }; - - let quote_type = if raw_msg.quote_type == 0 { - QuoteSignType::Unlinkable - } else { - QuoteSignType::Linkable - }; - - Ok(RaMsg2 { - pub_key_b: raw_msg.g_b.into(), - spid: raw_msg.spid, - quote_type, - kdf_id: raw_msg.kdf_id, - sign_gb_ga: raw_msg.sign_gb_ga.into(), - mac: raw_msg.mac, - sig_rl, - }) - } - - pub fn get_raw_ize(&self) -> Option { - let sig_rl_len = self.sig_rl.as_ref().map_or(0, |sig_rl| sig_rl.len()); - - if Self::check_sig_rl_len(sig_rl_len) { - Some((mem::size_of::() + sig_rl_len) as u32) - } else { - None - } - } - - #[inline] - pub fn check_sig_rl_len(sig_rl_len: usize) -> bool { - sig_rl_len <= (u32::MAX as usize) - mem::size_of::() - } -} - -impl RaMsg3 { - pub fn gen_cmac(&mut self, cmac_key: &AlignKey128bit) -> SgxResult { - let mut cmac = AesCMac::new(&cmac_key.key)?; - cmac.update(&self.pub_key_a)?; - cmac.update(&self.ps_sec_prop)?; - cmac.update(&self.quote[..])?; - self.mac = cmac.finalize()?; - - Ok(()) - } - - pub fn verify_cmac(&self, cmac_key: &AlignKey128bit) -> SgxResult { - let mut cmac = AesCMac::new(&cmac_key.key)?; - cmac.update(&self.pub_key_a)?; - cmac.update(&self.ps_sec_prop)?; - cmac.update(&self.quote[..])?; - let mac = cmac.finalize()?; - - ensure!(mac.ct_eq(&self.mac), SgxStatus::MacMismatch); - Ok(()) - } - - #[inline] - pub fn into_bytes(self) -> SgxResult> { - self.to_bytes() - } - - #[inline] - pub fn to_bytes(&self) -> SgxResult> { - self.to_bytes_in(Global) - } - - #[inline] - pub fn into_bytes_in(self, alloc: A) -> SgxResult> { - self.to_bytes_in(alloc) - } - - pub fn to_bytes_in(&self, alloc: A) -> SgxResult> { - ensure!(!self.quote.is_empty(), SgxStatus::InvalidParameter); - let raw_len = self.get_raw_ize().ok_or(SgxStatus::InvalidParameter)?; - - let mut bytes = vec::from_elem_in(0_u8, raw_len as usize, alloc); - let header_len = mem::size_of::(); - - let raw_msg = unsafe { &mut *(bytes.as_mut_ptr() as *mut CRaMsg3) }; - raw_msg.mac = self.mac; - raw_msg.g_a = self.pub_key_a.into(); - raw_msg.ps_sec_prop = self.ps_sec_prop; - bytes[header_len..].copy_from_slice(&self.quote); - - Ok(bytes) - } - - pub fn copy_to_slice(&self, bytes: &mut [u8]) -> SgxResult { - ensure!(!self.quote.is_empty(), SgxStatus::InvalidParameter); - let raw_len = self.get_raw_ize().ok_or(SgxStatus::InvalidParameter)?; - ensure!(bytes.len() == raw_len as usize, SgxStatus::InvalidParameter); - - let header_len = mem::size_of::(); - let raw_msg = unsafe { &mut *(bytes.as_mut_ptr() as *mut CRaMsg3) }; - - raw_msg.mac = self.mac; - raw_msg.g_a = self.pub_key_a.into(); - raw_msg.ps_sec_prop = self.ps_sec_prop; - bytes[header_len..].copy_from_slice(&self.quote); - - Ok(()) - } - - #[inline] - pub fn from_bytes(bytes: Vec) -> SgxResult { - Self::from_slice(bytes.as_slice()) - } - - pub fn from_slice(bytes: &[u8]) -> SgxResult { - let raw_msg_len = bytes.len(); - ensure!( - raw_msg_len > mem::size_of::(), - SgxStatus::InvalidParameter - ); - - let header_len = mem::size_of::(); - let raw_msg = unsafe { &*(bytes.as_ptr() as *const CRaMsg3) }; - - let quote_len = raw_msg_len - header_len; - ensure!( - Self::check_quote_len(quote_len), - SgxStatus::InvalidParameter - ); - - let mut quote = vec![0_u8; quote_len]; - quote.as_mut_slice().copy_from_slice(unsafe { - slice::from_raw_parts(&raw_msg.quote as *const _ as *const u8, quote_len) - }); - - Ok(RaMsg3 { - mac: raw_msg.mac, - pub_key_a: raw_msg.g_a.into(), - ps_sec_prop: raw_msg.ps_sec_prop, - quote: quote.into_boxed_slice(), - }) - } - - pub fn get_raw_ize(&self) -> Option { - let quote_len = self.quote.len(); - - if Self::check_quote_len(quote_len) { - Some((mem::size_of::() + quote_len) as u32) - } else { - None - } - } - - #[inline] - pub fn check_quote_len(quote_len: usize) -> bool { - quote_len <= (u32::MAX as usize) - mem::size_of::() - && quote_len > mem::size_of::() - } -} - -impl From for CRaMsg1 { - fn from(msg: RaMsg1) -> CRaMsg1 { - CRaMsg1 { - g_a: msg.pub_key_a.into(), - gid: msg.gid, - } - } -} - -impl From<&RaMsg1> for CRaMsg1 { - fn from(msg: &RaMsg1) -> CRaMsg1 { - CRaMsg1 { - g_a: msg.pub_key_a.into(), - gid: msg.gid, - } - } -} - -impl From for RaMsg1 { - fn from(msg: CRaMsg1) -> RaMsg1 { - RaMsg1 { - pub_key_a: msg.g_a.into(), - gid: msg.gid, - } - } -} - -impl From<&CRaMsg1> for RaMsg1 { - fn from(msg: &CRaMsg1) -> RaMsg1 { - RaMsg1 { - pub_key_a: msg.g_a.into(), - gid: msg.gid, - } - } -} - -#[cfg(feature = "tmsg")] -impl EnclaveRange for RaMsg2 { - fn is_enclave_range(&self) -> bool { - if !is_within_enclave(self as *const _ as *const u8, mem::size_of::()) { - return false; - } - - let sig_rl = self.sig_rl.as_ref(); - let (ptr, len) = sig_rl.map_or((ptr::null(), 0), |sig_rl| { - if !sig_rl.is_empty() { - (sig_rl.as_ptr(), sig_rl.len()) - } else { - (ptr::null(), 0) - } - }); - if len > 0 && !is_within_enclave(ptr, len) { - return false; - } - - true - } - - fn is_host_range(&self) -> bool { - if !is_within_host(self as *const _ as *const u8, mem::size_of::()) { - return false; - } - - let sig_rl = self.sig_rl.as_ref(); - let (ptr, len) = sig_rl.map_or((ptr::null(), 0), |sig_rl| { - if !sig_rl.is_empty() { - (sig_rl.as_ptr(), sig_rl.len()) - } else { - (ptr::null(), 0) - } - }); - if len > 0 && !is_within_host(ptr, len) { - return false; - } - - true - } -} - -#[cfg(feature = "tmsg")] -impl EnclaveRange for RaMsg3 { - fn is_enclave_range(&self) -> bool { - if !is_within_enclave(self as *const _ as *const u8, mem::size_of::()) { - return false; - } - if self.quote.len() > 0 && !is_within_enclave(self.quote.as_ptr(), self.quote.len()) { - return false; - } - true - } - - fn is_host_range(&self) -> bool { - if !is_within_host(self as *const _ as *const u8, mem::size_of::()) { - return false; - } - if self.quote.len() > 0 && !is_within_host(self.quote.as_ptr(), self.quote.len()) { - return false; - } - true - } -} diff --git a/sgx_key_exchange/tkey_exchange/Cargo.toml b/sgx_key_exchange/tkey_exchange/Cargo.toml deleted file mode 100644 index 1290ab1e2..000000000 --- a/sgx_key_exchange/tkey_exchange/Cargo.toml +++ /dev/null @@ -1,44 +0,0 @@ -# Licensed to the Apache Software Foundation (ASF) under one -# or more contributor license agreements. See the NOTICE file -# distributed with this work for additional information -# regarding copyright ownership. The ASF licenses this file -# to you under the Apache License, Version 2.0 (the -# "License"); you may not use this file except in compliance -# with the License. You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, -# software distributed under the License is distributed on an -# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -# KIND, either express or implied. See the License for the -# specific language governing permissions and limitations -# under the License. - -[package] -name = "sgx_tkey_exchange" -version = "2.0.0" -authors = ["The Teaclave Authors"] -repository = "https://github.com/apache/teaclave-sgx-sdk" -license-file = "LICENSE" -documentation = "https://teaclave.apache.org/sgx-sdk-docs/" -description = "Rust SGX SDK provides the ability to write Intel SGX applications in Rust Programming Language." -edition = "2021" - -[lib] -name = "sgx_tkey_exchange" -crate-type = ["rlib"] - -[features] -default = [] -capi = [] - -[target.'cfg(not(target_vendor = "teaclave"))'.dependencies] -sgx_trts = { path = "../../sgx_trts" } -sgx_types = { path = "../../sgx_types" } -sgx_sync = { path = "../../sgx_sync" } - -[dependencies] -sgx_crypto = { path = "../../sgx_crypto" } -sgx_tse = { path = "../../sgx_tse" } -sgx_ra_msg = { path = "../message" } diff --git a/sgx_key_exchange/tkey_exchange/src/capi.rs b/sgx_key_exchange/tkey_exchange/src/capi.rs deleted file mode 100644 index 479294048..000000000 --- a/sgx_key_exchange/tkey_exchange/src/capi.rs +++ /dev/null @@ -1,151 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -use crate::session::Initiator; -use core::mem::{self, ManuallyDrop}; -use sgx_trts::trts::is_within_enclave; -use sgx_types::error::{SgxResult, SgxStatus}; -use sgx_types::types::{ - AlignKey128bit, Ec256PublicKey, Key128bit, RaContext, RaDriveSecretKeyFn, RaKeyType, -}; - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_init( - sp_pub_key: *const Ec256PublicKey, - _pse: i32, - context: *mut RaContext, -) -> SgxStatus { - if sp_pub_key.is_null() || context.is_null() { - return SgxStatus::InvalidParameter; - } - - if !is_within_enclave(sp_pub_key as *const u8, mem::size_of::()) { - return SgxStatus::InvalidParameter; - } - - let pub_key = &*sp_pub_key; - let initiator = match Initiator::new(&pub_key.into()) { - Ok(initiator) => initiator, - Err(e) => return e, - }; - - *context = initiator.into_raw(); - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_init_ex( - sp_pub_key: *const Ec256PublicKey, - _pse: i32, - derive_key_cb: RaDriveSecretKeyFn, - context: *mut RaContext, -) -> SgxStatus { - if sp_pub_key.is_null() || context.is_null() { - return SgxStatus::InvalidParameter; - } - - if !is_within_enclave(sp_pub_key as *const u8, mem::size_of::()) { - return SgxStatus::InvalidParameter; - } - if !is_within_enclave(derive_key_cb as *const u8, 0) { - return SgxStatus::InvalidParameter; - } - - let pub_key = &*sp_pub_key; - let initiator = match Initiator::new_with_derive_key( - &pub_key.into(), - move |share_key, - kdf_id| - -> SgxResult<( - AlignKey128bit, - AlignKey128bit, - AlignKey128bit, - AlignKey128bit, - )> { - let mut smk_key = Key128bit::default(); - let mut sk_key = Key128bit::default(); - let mut mk_key = Key128bit::default(); - let mut vk_key = Key128bit::default(); - - let status = derive_key_cb( - share_key, - kdf_id, - &mut smk_key, - &mut sk_key, - &mut mk_key, - &mut vk_key, - ); - let result = if status.is_success() { - let smk = smk_key.into(); - let sk = sk_key.into(); - let mk = mk_key.into(); - let vk = vk_key.into(); - - Ok((smk, sk, mk, vk)) - } else { - Err(status) - }; - - smk_key.fill(0); - sk_key.fill(0); - mk_key.fill(0); - vk_key.fill(0); - result - }, - ) { - Ok(initiator) => initiator, - Err(e) => return e, - }; - - *context = initiator.into_raw(); - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_get_keys( - context: RaContext, - key_type: RaKeyType, - key: *mut Key128bit, -) -> SgxStatus { - if key.is_null() { - return SgxStatus::InvalidParameter; - } - - if !is_within_enclave(key as *const u8, mem::size_of::()) { - return SgxStatus::InvalidParameter; - } - - let initiator = ManuallyDrop::new(Initiator::from_raw(context)); - let ra_key = match initiator.get_keys(key_type) { - Ok(key) => key.key, - Err(e) => return e, - }; - - *key = ra_key; - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_close(context: RaContext) -> SgxStatus { - let initiator = Initiator::from_raw(context); - drop(initiator); - SgxStatus::Success -} diff --git a/sgx_key_exchange/tkey_exchange/src/lib.rs b/sgx_key_exchange/tkey_exchange/src/lib.rs deleted file mode 100644 index 1a408b860..000000000 --- a/sgx_key_exchange/tkey_exchange/src/lib.rs +++ /dev/null @@ -1,37 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -#![no_std] -#![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] -#![feature(extract_if)] -#![allow(clippy::missing_safety_doc)] - -extern crate alloc; - -extern crate sgx_crypto; -extern crate sgx_ra_msg; -extern crate sgx_sync; -extern crate sgx_trts; -extern crate sgx_tse; -#[macro_use] -extern crate sgx_types; - -mod session; -pub use session::*; - -#[cfg(feature = "capi")] -pub mod capi; diff --git a/sgx_key_exchange/tkey_exchange/src/session/ecall.rs b/sgx_key_exchange/tkey_exchange/src/session/ecall.rs deleted file mode 100644 index a66c688a5..000000000 --- a/sgx_key_exchange/tkey_exchange/src/session/ecall.rs +++ /dev/null @@ -1,131 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -use super::Initiator; -use core::mem::{self, ManuallyDrop}; -use core::slice; -use sgx_ra_msg::RaMsg2; -use sgx_trts::fence; -use sgx_trts::trts::is_within_host; -use sgx_types::error::SgxStatus; -use sgx_types::types::{ - CRaMsg2, CRaMsg3, Ec256PublicKey, QuoteNonce, QuoteSignType, RaContext, Report, TargetInfo, -}; - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_get_ga( - context: RaContext, - pub_key_a: *mut Ec256PublicKey, -) -> SgxStatus { - if pub_key_a.is_null() { - return SgxStatus::InvalidParameter; - } - - let initiator = ManuallyDrop::new(Initiator::from_raw(context)); - let key = match initiator.get_ga() { - Ok(key) => key, - Err(e) => return e, - }; - - *pub_key_a = key.into(); - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_proc_msg2_trusted( - context: RaContext, - msg2: *const CRaMsg2, - qe_target: *const TargetInfo, - report: *mut Report, - nonce: *mut QuoteNonce, -) -> SgxStatus { - if msg2.is_null() || qe_target.is_null() || report.is_null() || nonce.is_null() { - return SgxStatus::InvalidParameter; - } - - let qe_target = &*qe_target; - let c_msg2 = &*msg2; - let quote_type = if c_msg2.quote_type == 0 { - QuoteSignType::Unlinkable - } else { - QuoteSignType::Linkable - }; - - let msg2 = RaMsg2 { - pub_key_b: c_msg2.g_b.into(), - spid: c_msg2.spid, - quote_type, - kdf_id: c_msg2.kdf_id, - sign_gb_ga: c_msg2.sign_gb_ga.into(), - mac: c_msg2.mac, - sig_rl: None, - }; - - let initiator = ManuallyDrop::new(Initiator::from_raw(context)); - let (rpt, rand) = match initiator.process_msg2(&msg2, qe_target) { - Ok(r) => r, - Err(e) => return e, - }; - - *report = rpt; - *nonce = rand; - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_get_msg3_trusted( - context: RaContext, - quote_size: u32, - qe_report: *const Report, - msg3: *mut CRaMsg3, - msg3_size: u32, -) -> SgxStatus { - if qe_report.is_null() || msg3.is_null() { - return SgxStatus::InvalidParameter; - } - - if usize::MAX - (msg3 as usize) < msg3_size as usize - || u32::MAX - quote_size < mem::size_of::() as u32 - || mem::size_of::() as u32 + quote_size != msg3_size - { - return SgxStatus::InvalidParameter; - } - - if !is_within_host(msg3 as *const u8, msg3_size as usize) { - return SgxStatus::InvalidParameter; - } - - fence::lfence(); - - let qe_report = &*qe_report; - let c_msg3 = &mut *msg3; - let quote = slice::from_raw_parts(&c_msg3.quote as *const _ as *const u8, quote_size as usize); - - let initiator = ManuallyDrop::new(Initiator::from_raw(context)); - let msg3 = match initiator.generate_msg3(qe_report, quote) { - Ok(msg) => msg, - Err(e) => return e, - }; - - c_msg3.mac = msg3.mac; - c_msg3.g_a = msg3.pub_key_a.into(); - c_msg3.ps_sec_prop = msg3.ps_sec_prop; - SgxStatus::Success -} diff --git a/sgx_key_exchange/tkey_exchange/src/session/initiator.rs b/sgx_key_exchange/tkey_exchange/src/session/initiator.rs deleted file mode 100644 index 84e4ba531..000000000 --- a/sgx_key_exchange/tkey_exchange/src/session/initiator.rs +++ /dev/null @@ -1,276 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -use super::manager::SESSION_MAGAGER; -use super::manager::{Context, Session, State}; -use super::manager::{DropKey, DropPrivateKey, DropShareKey}; -use alloc::boxed::Box; -use core::mem; -use sgx_crypto::ecc::{EcKeyPair, EcPublicKey}; -use sgx_crypto::sha::Sha256; -use sgx_ra_msg::{RaMsg2, RaMsg3}; -use sgx_trts::fence; -use sgx_trts::rand::Rng; -use sgx_trts::trts::EnclaveRange; -use sgx_tse::EnclaveReport; -use sgx_types::error::{SgxResult, SgxStatus}; -use sgx_types::types::SHA256_HASH_SIZE; -use sgx_types::types::{ - AlignKey128bit, Ec256SharedKey, QuoteNonce, RaContext, RaKeyType, Report, ReportData, - TargetInfo, -}; - -#[derive(Debug)] -pub struct Initiator { - rctx: RaContext, -} - -impl Initiator { - pub fn new(sp_pub_key: &EcPublicKey) -> SgxResult { - ensure!(sp_pub_key.is_enclave_range(), SgxStatus::InvalidParameter); - - let is_valid = sp_pub_key.check_point()?; - ensure!(is_valid, SgxStatus::InvalidParameter); - - let mut context = Context::new(); - context.sp_pub_key = *sp_pub_key; - let session = Session::new_with_context(context).set_derive_key(None); - - let rctx = SESSION_MAGAGER.write().push(session); - Ok(Self { rctx }) - } - - pub fn new_with_derive_key(sp_pub_key: &EcPublicKey, derive_key: F) -> SgxResult - where - F: Fn( - &Ec256SharedKey, - u16, - ) -> SgxResult<( - AlignKey128bit, - AlignKey128bit, - AlignKey128bit, - AlignKey128bit, - )> + Sync - + Send - + 'static, - { - ensure!(sp_pub_key.is_enclave_range(), SgxStatus::InvalidParameter); - - let is_valid = sp_pub_key.check_point()?; - ensure!(is_valid, SgxStatus::InvalidParameter); - - let mut context = Context::new(); - context.sp_pub_key = *sp_pub_key; - let session = Session::new_with_context(context).set_derive_key(Some(Box::new(derive_key))); - - let rctx = SESSION_MAGAGER.write().push(session); - Ok(Self { rctx }) - } - - pub fn get_ga(&self) -> SgxResult { - let session = SESSION_MAGAGER - .read() - .find(self.rctx) - .ok_or(SgxStatus::InvalidParameter)?; - - let mut key_pair = EcKeyPair::create()?; - let (mut priv_key, pub_key) = key_pair.into(); - - let mut context = session.context.lock(); - context.priv_key = priv_key; - context.pub_key_a = pub_key; - context.state = State::GaGened; - drop(context); - - key_pair.clear(); - priv_key.clear(); - - Ok(pub_key) - } - - pub fn process_msg2( - &self, - msg2: &RaMsg2, - qe_target: &TargetInfo, - ) -> SgxResult<(Report, QuoteNonce)> { - ensure!(msg2.is_enclave_range(), SgxStatus::InvalidParameter); - ensure!(qe_target.is_enclave_range(), SgxStatus::InvalidParameter); - - let session = SESSION_MAGAGER - .read() - .find(self.rctx) - .ok_or(SgxStatus::InvalidParameter)?; - - fence::lfence(); - - let context = session.context.lock(); - ensure!(context.state == State::GaGened, SgxStatus::InvalidState); - let mut priv_key = context.priv_key; - let pub_key_a = context.pub_key_a; - let sp_pub_key = context.sp_pub_key; - drop(context); - - let priv_key = DropPrivateKey::new(&mut priv_key); - - let mut dh_key = priv_key.shared_key(&msg2.pub_key_b)?; - let dh_key = DropShareKey::new(&mut dh_key); - - let (ref mut smk_key, ref mut sk_key, ref mut mk_key, ref mut vk_key) = - if let Some(driver_key) = &session.derive_key { - driver_key(&(&*dh_key).into(), msg2.kdf_id)? - } else { - ensure!(msg2.kdf_id == 0x0001, SgxStatus::KdfMismatch); - let smk_key = dh_key.derive_key("SMK".as_bytes())?; - let sk_key = dh_key.derive_key("SK".as_bytes())?; - let mk_key = dh_key.derive_key("MK".as_bytes())?; - let vk_key = dh_key.derive_key("VK".as_bytes())?; - (smk_key, sk_key, mk_key, vk_key) - }; - - let smk_key = DropKey::new(smk_key); - let sk_key = DropKey::new(sk_key); - let mk_key = DropKey::new(mk_key); - let vk_key = DropKey::new(vk_key); - - msg2.verify_sign_and_cmac(&pub_key_a, &sp_pub_key, &smk_key)?; - - let mut nonce = QuoteNonce::default(); - Rng::new().fill_bytes(&mut nonce.rand); - - let mut report_data = ReportData::default(); - let mut sha = Sha256::new()?; - sha.update(&pub_key_a)?; - sha.update(&msg2.pub_key_b)?; - sha.update(&*vk_key)?; - let hash = sha.finalize()?; - report_data.d[..SHA256_HASH_SIZE].copy_from_slice(&hash); - let report = Report::for_target(qe_target, &report_data)?; - - let mut context = session.context.lock(); - ensure!(context.state == State::GaGened, SgxStatus::InvalidState); - context.pub_key_b = msg2.pub_key_b; - context.smk_key = *smk_key; - context.sk_key = *sk_key; - context.mk_key = *mk_key; - context.vk_key = *vk_key; - context.qe_target = *qe_target; - context.quote_nonce = nonce; - context.state = State::Msg2Proced; - drop(context); - - Ok((report, nonce)) - } - - pub fn generate_msg3(&self, qe_report: &Report, quote: &[u8]) -> SgxResult { - ensure!(qe_report.is_enclave_range(), SgxStatus::InvalidParameter); - ensure!(!quote.is_empty(), SgxStatus::InvalidParameter); - ensure!( - quote.is_enclave_range() || quote.is_host_range(), - SgxStatus::InvalidParameter - ); - ensure!( - RaMsg3::check_quote_len(quote.len()), - SgxStatus::InvalidParameter - ); - - let session = SESSION_MAGAGER - .read() - .find(self.rctx) - .ok_or(SgxStatus::InvalidParameter)?; - - fence::lfence(); - - qe_report.verify()?; - - let context = session.context.lock(); - ensure!(context.state == State::Msg2Proced, SgxStatus::InvalidState); - let attributes = context.qe_target.attributes; - let mr_enclave = context.qe_target.mr_enclave; - let pub_key_a = context.pub_key_a; - let ps_sec_prop = context.ps_sec_prop; - let mut smk_key = context.smk_key; - let nonce = context.quote_nonce; - drop(context); - - let smk_key = DropKey::new(&mut smk_key); - - ensure!( - attributes.eq(&qe_report.body.attributes), - SgxStatus::InvalidParameter - ); - ensure!( - mr_enclave.eq(&qe_report.body.mr_enclave), - SgxStatus::InvalidParameter - ); - - let mut sha = Sha256::new()?; - sha.update(&nonce)?; - sha.update(quote)?; - let hash = sha.finalize()?; - ensure!( - hash.eq(&qe_report.body.report_data.d[..SHA256_HASH_SIZE]), - SgxStatus::Unexpected - ); - - let mut msg3 = RaMsg3 { - mac: Default::default(), - pub_key_a, - ps_sec_prop, - quote: quote.into(), - }; - msg3.gen_cmac(&smk_key)?; - - Ok(msg3) - } - - pub fn get_keys(&self, key_type: RaKeyType) -> SgxResult { - let session = SESSION_MAGAGER - .read() - .find(self.rctx) - .ok_or(SgxStatus::InvalidParameter)?; - - let context = session.context.lock(); - ensure!(context.state == State::Msg2Proced, SgxStatus::InvalidState); - - let key = match key_type { - RaKeyType::SK => context.sk_key, - RaKeyType::MK => context.mk_key, - }; - - Ok(key) - } - - #[inline] - pub fn into_raw(self) -> RaContext { - let rctx = self.rctx; - mem::forget(self); - rctx - } - - #[inline] - pub unsafe fn from_raw(rctx: RaContext) -> Initiator { - Self { rctx } - } -} - -impl Drop for Initiator { - fn drop(&mut self) { - if let Some(session) = SESSION_MAGAGER.write().remove(self.rctx) { - drop(session) - } - } -} diff --git a/sgx_key_exchange/tkey_exchange/src/session/manager.rs b/sgx_key_exchange/tkey_exchange/src/session/manager.rs deleted file mode 100644 index d5f55c5f2..000000000 --- a/sgx_key_exchange/tkey_exchange/src/session/manager.rs +++ /dev/null @@ -1,247 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -use alloc::boxed::Box; -use alloc::collections::LinkedList; -use alloc::sync::Arc; -use core::mem; -use core::ops::Deref; -use core::ptr; -use core::sync::atomic::{AtomicU32, Ordering}; -use sgx_crypto::ecc::{EcPrivateKey, EcPublicKey, EcShareKey}; -use sgx_sync::{LazyLock, SpinMutex, SpinRwLock}; -use sgx_types::error::SgxResult; -use sgx_types::types::{AlignKey128bit, Ec256SharedKey, PsSecPropDesc, QuoteNonce, TargetInfo}; - -#[derive(Clone, Copy, Debug, Eq, PartialEq)] -#[repr(u32)] -pub enum State { - Inited, - GaGened, - Msg2Proced, -} - -impl Default for State { - #[inline] - fn default() -> State { - State::Inited - } -} - -type DeriveKeyFn = dyn Fn( - &Ec256SharedKey, - u16, - ) -> SgxResult<( - AlignKey128bit, - AlignKey128bit, - AlignKey128bit, - AlignKey128bit, - )> + Sync - + Send - + 'static; - -#[derive(Default)] -pub struct Context { - pub sp_pub_key: EcPublicKey, - pub pub_key_a: EcPublicKey, - pub pub_key_b: EcPublicKey, - pub priv_key: EcPrivateKey, - pub ps_sec_prop: PsSecPropDesc, - pub smk_key: AlignKey128bit, - pub sk_key: AlignKey128bit, - pub mk_key: AlignKey128bit, - pub vk_key: AlignKey128bit, - pub quote_nonce: QuoteNonce, - pub qe_target: TargetInfo, - pub state: State, -} - -impl Context { - pub fn new() -> Context { - Self::default() - } - - #[inline] - fn clear(&mut self) { - unsafe { ptr::write_bytes(self as *mut _ as *mut u8, 0, mem::size_of::()) } - } -} - -impl Drop for Context { - fn drop(&mut self) { - self.clear() - } -} - -pub struct Session { - pub context: SpinMutex, - pub derive_key: Option>, -} - -impl Default for Session { - fn default() -> Session { - Self::new() - } -} - -impl Session { - pub fn new() -> Session { - Session { - context: SpinMutex::new(Context::new()), - derive_key: None, - } - } - - pub fn new_with_context(context: Context) -> Session { - Session { - context: SpinMutex::new(context), - derive_key: None, - } - } - - pub fn set_derive_key(mut self, derive_key: Option>) -> Session { - self.derive_key = derive_key; - self - } -} - -pub static SESSION_MAGAGER: LazyLock> = - LazyLock::new(|| SpinRwLock::new(SessionManager::new())); - -struct Node { - sid: u32, - session: Arc, -} - -pub struct SessionManager { - seed: AtomicU32, - list: LinkedList, -} - -impl Default for SessionManager { - fn default() -> SessionManager { - SessionManager::new() - } -} - -impl SessionManager { - pub const fn new() -> SessionManager { - SessionManager { - seed: AtomicU32::new(1), - list: LinkedList::new(), - } - } - - pub fn find(&self, sid: u32) -> Option> { - self.list - .iter() - .find(|&node| node.sid == sid) - .map(|node| node.session.clone()) - } - - pub fn push(&mut self, session: Session) -> u32 { - let sid = self.seed.fetch_add(1, Ordering::SeqCst); - let session = Arc::new(session); - self.list.push_back(Node { sid, session }); - sid - } - - pub fn remove(&mut self, sid: u32) -> Option> { - self.list - .extract_if(|node| node.sid == sid) - .next() - .map(|node| node.session) - } -} - -pub(crate) struct DropKey<'a> { - key: &'a mut AlignKey128bit, -} - -impl<'a> DropKey<'a> { - #[inline] - pub(crate) fn new(key: &'a mut AlignKey128bit) -> Self { - DropKey { key } - } -} - -impl Drop for DropKey<'_> { - #[inline] - fn drop(&mut self) { - self.key.key.fill(0); - } -} - -impl Deref for DropKey<'_> { - type Target = AlignKey128bit; - - fn deref(&self) -> &Self::Target { - self.key - } -} - -pub(crate) struct DropShareKey<'a> { - key: &'a mut EcShareKey, -} - -impl<'a> DropShareKey<'a> { - #[inline] - pub(crate) fn new(key: &'a mut EcShareKey) -> Self { - DropShareKey { key } - } -} - -impl Drop for DropShareKey<'_> { - #[inline] - fn drop(&mut self) { - self.key.clear(); - } -} - -impl Deref for DropShareKey<'_> { - type Target = EcShareKey; - - fn deref(&self) -> &Self::Target { - self.key - } -} - -pub(crate) struct DropPrivateKey<'a> { - key: &'a mut EcPrivateKey, -} - -impl<'a> DropPrivateKey<'a> { - #[inline] - pub(crate) fn new(key: &'a mut EcPrivateKey) -> Self { - DropPrivateKey { key } - } -} - -impl Drop for DropPrivateKey<'_> { - #[inline] - fn drop(&mut self) { - self.key.clear(); - } -} - -impl Deref for DropPrivateKey<'_> { - type Target = EcPrivateKey; - - fn deref(&self) -> &Self::Target { - self.key - } -} diff --git a/sgx_key_exchange/tkey_exchange/src/session/mod.rs b/sgx_key_exchange/tkey_exchange/src/session/mod.rs deleted file mode 100644 index c9d5d261b..000000000 --- a/sgx_key_exchange/tkey_exchange/src/session/mod.rs +++ /dev/null @@ -1,23 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -mod ecall; -mod initiator; -mod manager; - -pub use ecall::*; -pub use initiator::*; diff --git a/sgx_key_exchange/ukey_exchange/Cargo.toml b/sgx_key_exchange/ukey_exchange/Cargo.toml deleted file mode 100644 index 0fb986336..000000000 --- a/sgx_key_exchange/ukey_exchange/Cargo.toml +++ /dev/null @@ -1,41 +0,0 @@ -# Licensed to the Apache Software Foundation (ASF) under one -# or more contributor license agreements. See the NOTICE file -# distributed with this work for additional information -# regarding copyright ownership. The ASF licenses this file -# to you under the Apache License, Version 2.0 (the -# "License"); you may not use this file except in compliance -# with the License. You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, -# software distributed under the License is distributed on an -# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -# KIND, either express or implied. See the License for the -# specific language governing permissions and limitations -# under the License. - -[package] -name = "sgx_ukey_exchange" -version = "2.0.0" -authors = ["The Teaclave Authors"] -repository = "https://github.com/apache/teaclave-sgx-sdk" -license-file = "LICENSE" -documentation = "https://teaclave.apache.org/sgx-sdk-docs/" -description = "Rust SGX SDK provides the ability to write Intel SGX applications in Rust Programming Language." -edition = "2021" - -[lib] -name = "sgx_ukey_exchange" -crate-type = ["rlib"] - -[features] -default = [] -sim = ["sgx_types/sim"] -hyper = ["sgx_types/hyper", "sgx_urts/hyper"] -capi = [] - -[dependencies] -sgx_types = { path = "../../sgx_types" } -sgx_ra_msg = { path = "../message", default-features = false, features = ["umsg"] } -sgx_urts = { path = "../../sgx_urts", optional = true } diff --git a/sgx_key_exchange/ukey_exchange/build.rs b/sgx_key_exchange/ukey_exchange/build.rs deleted file mode 100644 index f32117995..000000000 --- a/sgx_key_exchange/ukey_exchange/build.rs +++ /dev/null @@ -1,36 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -use std::env; - -fn main() -> Result<(), &'static str> { - println!("cargo:rerun-if-env-changed=SGX_MODE"); - println!("cargo:rerun-if-changed=build.rs"); - - if cfg!(all(feature = "sim", feature = "hyper")) { - println!("cargo:warning=feature \"sim\" and feature \"hyper\", only one or neither of them can be enabled."); - return Err("Defined feature is illegal."); - } - - let mode = env::var("SGX_MODE").unwrap_or_else(|_| "HW".to_string()); - match mode.as_ref() { - "SIM" | "SW" => println!("cargo:rustc-cfg=feature=\"sim\""), - "HYPER" => println!("cargo:rustc-cfg=feature=\"hyper\""), - _ => (), - } - Ok(()) -} diff --git a/sgx_key_exchange/ukey_exchange/src/capi.rs b/sgx_key_exchange/ukey_exchange/src/capi.rs deleted file mode 100644 index 0bf9fe747..000000000 --- a/sgx_key_exchange/ukey_exchange/src/capi.rs +++ /dev/null @@ -1,199 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -use crate::Initiator; -use sgx_ra_msg::RaMsg2; -use sgx_types::error::SgxStatus; -use sgx_types::types::{ - AttKeyId, CRaMsg1, CRaMsg2, CRaMsg3, ECallGetGaFn, ECallGetMsg3Fn, ECallProcessMsg2Fn, - EnclaveId, RaContext, -}; -use std::mem::ManuallyDrop; -use std::slice; -use std::sync::LazyLock; -use std::sync::Mutex; - -static INITIATOR: LazyLock> = LazyLock::new(|| Mutex::new(Initiator::new(0, 0))); - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_get_msg1( - rctx: RaContext, - eid: EnclaveId, - get_ga_fn: ECallGetGaFn, - msg1: *mut CRaMsg1, -) -> SgxStatus { - if msg1.is_null() { - return SgxStatus::InvalidParameter; - } - - let mut initiator = Initiator::new(eid, rctx); - let ra_msg1 = match initiator.generate_msg1(None, get_ga_fn) { - Ok(msg) => msg, - Err(e) => return e, - }; - - let mut guard = INITIATOR.lock().unwrap(); - guard.set_attkey_id(None); - guard.set_qe_target(initiator.get_qe_target()); - drop(guard); - - *msg1 = ra_msg1.into(); - - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_proc_msg2( - rctx: RaContext, - eid: EnclaveId, - process_msg2_fn: ECallProcessMsg2Fn, - get_msg3_fn: ECallGetMsg3Fn, - msg2: *const CRaMsg2, - msg2_size: u32, - msg3: *mut *mut CRaMsg3, - msg3_size: *mut u32, -) -> SgxStatus { - if msg2.is_null() || msg3.is_null() || msg3_size.is_null() { - return SgxStatus::InvalidParameter; - } - - let guard = INITIATOR.lock().unwrap(); - if guard.get_attkey_id().is_some() { - return SgxStatus::InvalidState; - } - let qe_target = guard.get_qe_target(); - drop(guard); - - let mut initiator = Initiator::new(eid, rctx); - initiator.set_attkey_id(None); - initiator.set_qe_target(qe_target); - - let msg2_slice = slice::from_raw_parts(msg2 as *const u8, msg2_size as usize); - let ra_msg2 = match RaMsg2::from_slice(msg2_slice) { - Ok(msg) => msg, - Err(e) => return e, - }; - - let ra_msg3 = match initiator.process_msg2(&ra_msg2, process_msg2_fn, get_msg3_fn) { - Ok(msg) => msg, - Err(e) => return e, - }; - - let raw_msg3_size = match ra_msg3.get_raw_ize() { - Some(size) => size, - None => return SgxStatus::Unexpected, - }; - - let mut raw_msg3 = ManuallyDrop::new(vec![0_u8; raw_msg3_size as usize]); - match ra_msg3.copy_to_slice(raw_msg3.as_mut_slice()) { - Ok(_) => (), - Err(e) => return e, - }; - - *msg3 = raw_msg3.as_mut_ptr() as *mut CRaMsg3; - *msg3_size = raw_msg3_size; - - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_get_msg1_ex( - att_key_id: *const AttKeyId, - rctx: RaContext, - eid: EnclaveId, - get_ga_fn: ECallGetGaFn, - msg1: *mut CRaMsg1, -) -> SgxStatus { - if att_key_id.is_null() || msg1.is_null() { - return SgxStatus::InvalidParameter; - } - - let mut initiator = Initiator::new(eid, rctx); - let ra_msg1 = match initiator.generate_msg1(Some(*att_key_id), get_ga_fn) { - Ok(msg) => msg, - Err(e) => return e, - }; - - let mut guard = INITIATOR.lock().unwrap(); - guard.set_attkey_id(initiator.get_attkey_id()); - guard.set_qe_target(initiator.get_qe_target()); - drop(guard); - - *msg1 = ra_msg1.into(); - - SgxStatus::Success -} - -/// # Safety -#[no_mangle] -pub unsafe extern "C" fn sgx_ra_proc_msg2_ex( - att_key_id: *const AttKeyId, - rctx: RaContext, - eid: EnclaveId, - process_msg2_fn: ECallProcessMsg2Fn, - get_msg3_fn: ECallGetMsg3Fn, - msg2: *const CRaMsg2, - msg2_size: u32, - msg3: *mut *mut CRaMsg3, - msg3_size: *mut u32, -) -> SgxStatus { - if att_key_id.is_null() || msg2.is_null() || msg3.is_null() || msg3_size.is_null() { - return SgxStatus::InvalidParameter; - } - - let att_key_id = Some(*att_key_id); - let guard = INITIATOR.lock().unwrap(); - if guard.get_attkey_id() != att_key_id { - return SgxStatus::InvalidState; - } - let qe_target = guard.get_qe_target(); - drop(guard); - - let mut initiator = Initiator::new(eid, rctx); - initiator.set_attkey_id(att_key_id); - initiator.set_qe_target(qe_target); - - let msg2_slice = slice::from_raw_parts(msg2 as *const u8, msg2_size as usize); - let ra_msg2 = match RaMsg2::from_slice(msg2_slice) { - Ok(msg) => msg, - Err(e) => return e, - }; - - let ra_msg3 = match initiator.process_msg2(&ra_msg2, process_msg2_fn, get_msg3_fn) { - Ok(msg) => msg, - Err(e) => return e, - }; - - let raw_msg3_size = match ra_msg3.get_raw_ize() { - Some(size) => size, - None => return SgxStatus::Unexpected, - }; - - let mut raw_msg3 = ManuallyDrop::new(vec![0_u8; raw_msg3_size as usize]); - match ra_msg3.copy_to_slice(raw_msg3.as_mut_slice()) { - Ok(_) => (), - Err(e) => return e, - }; - - *msg3 = raw_msg3.as_mut_ptr() as *mut CRaMsg3; - *msg3_size = raw_msg3_size; - - SgxStatus::Success -} diff --git a/sgx_key_exchange/ukey_exchange/src/lib.rs b/sgx_key_exchange/ukey_exchange/src/lib.rs deleted file mode 100644 index f0248add1..000000000 --- a/sgx_key_exchange/ukey_exchange/src/lib.rs +++ /dev/null @@ -1,34 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -#![feature(allocator_api)] -#![feature(lazy_cell)] - -#[cfg(all(feature = "sim", feature = "hyper"))] -compile_error!("feature \"sim\" and feature \"hyper\" cannot be enabled at the same time"); - -#[macro_use] -extern crate sgx_types; -extern crate sgx_ra_msg; -#[cfg(feature = "hyper")] -extern crate sgx_urts; - -mod session; -pub use session::*; - -#[cfg(feature = "capi")] -pub mod capi; diff --git a/sgx_key_exchange/ukey_exchange/src/session.rs b/sgx_key_exchange/ukey_exchange/src/session.rs deleted file mode 100644 index a0917b475..000000000 --- a/sgx_key_exchange/ukey_exchange/src/session.rs +++ /dev/null @@ -1,254 +0,0 @@ -// Licensed to the Apache Software Foundation (ASF) under one -// or more contributor license agreements. See the NOTICE file -// distributed with this work for additional information -// regarding copyright ownership. The ASF licenses this file -// to you under the Apache License, Version 2.0 (the -// "License"); you may not use this file except in compliance -// with the License. You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, -// software distributed under the License is distributed on an -// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -// KIND, either express or implied. See the License for the -// specific language governing permissions and limitations -// under the License. - -#![allow(dead_code)] - -use sgx_ra_msg::{RaMsg1, RaMsg2, RaMsg3}; -use sgx_types::error::{SgxResult, SgxStatus}; -use sgx_types::function::{ - sgx_calc_quote_size, sgx_get_quote, sgx_get_quote_ex, sgx_get_quote_size_ex, sgx_init_quote, - sgx_init_quote_ex, -}; -use sgx_types::types::{ - AttKeyId, CRaMsg3, Ec256PublicKey, EnclaveId, EpidGroupId, QeReportInfo, QuoteNonce, RaContext, - Report, TargetInfo, -}; -use sgx_types::types::{ECallGetGaFn, ECallGetMsg3Fn, ECallProcessMsg2Fn}; -use std::mem; -use std::ptr; -use std::vec; - -#[derive(Debug)] -pub struct Initiator { - rctx: RaContext, - eid: EnclaveId, - att_key_id: Option, - qe_target: TargetInfo, -} - -impl Initiator { - #[inline] - pub fn new(eid: EnclaveId, rctx: RaContext) -> Initiator { - Initiator { - rctx, - eid, - att_key_id: None, - qe_target: TargetInfo::default(), - } - } - - pub fn generate_msg1( - &mut self, - att_key_id: Option, - get_ga_fn: ECallGetGaFn, - ) -> SgxResult { - let mut gid = EpidGroupId::default(); - let mut qe_target = TargetInfo::default(); - - let status = unsafe { - if let Some(ref att_key_id) = att_key_id { - let mut pub_key_id_size = 0_usize; - let status = sgx_init_quote_ex( - att_key_id as *const _, - &mut qe_target as *mut _, - &mut pub_key_id_size as *mut _, - ptr::null_mut(), - ); - ensure!(status.is_success(), status); - - let mut pub_key_id = vec![0_u8; pub_key_id_size]; - sgx_init_quote_ex( - att_key_id as *const _, - &mut qe_target as *mut _, - &mut pub_key_id_size as *mut _, - pub_key_id.as_mut_ptr(), - ) - } else { - sgx_init_quote(&mut qe_target as *mut _, &mut gid as *mut _) - } - }; - ensure!(status.is_success(), status); - - self.att_key_id = att_key_id; - self.qe_target = qe_target; - - let mut retval = SgxStatus::Success; - let mut pub_key_a = Ec256PublicKey::default(); - let status = unsafe { - get_ga_fn( - self.eid, - &mut retval as *mut _, - self.rctx, - &mut pub_key_a as *mut _, - ) - }; - ensure!(status.is_success(), status); - ensure!(retval.is_success(), retval); - - Ok(RaMsg1 { - pub_key_a: pub_key_a.into(), - gid, - }) - } - - pub fn process_msg2( - &self, - msg2: &RaMsg2, - process_msg2_fn: ECallProcessMsg2Fn, - get_msg3_fn: ECallGetMsg3Fn, - ) -> SgxResult { - let raw_msg2 = msg2.to_bytes()?; - - let (sig_rl, sig_rl_len) = msg2 - .sig_rl - .as_ref() - .map(|sig_rl| { - if !sig_rl.is_empty() { - (sig_rl.as_ptr(), sig_rl.len() as u32) - } else { - (ptr::null(), 0) - } - }) - .unwrap_or((ptr::null(), 0)); - - if self.att_key_id.is_some() { - ensure!(sig_rl_len == 0, SgxStatus::InvalidParameter); - } - - let raw_msg3 = unsafe { - let mut report = Report::default(); - let mut nonce = QuoteNonce::default(); - - let mut retval = SgxStatus::Success; - let status = process_msg2_fn( - self.eid, - &mut retval as *mut _, - self.rctx, - raw_msg2.as_ptr().cast(), - &self.qe_target as *const _, - &mut report as *mut _, - &mut nonce as *mut _, - ); - ensure!(status.is_success(), status); - ensure!(retval.is_success(), retval); - - let mut quote_size = 0_u32; - let status = if let Some(ref att_key_id) = self.att_key_id { - sgx_get_quote_size_ex(att_key_id as *const _, &mut quote_size as *mut _) - } else { - sgx_calc_quote_size(sig_rl, sig_rl_len, &mut quote_size as *mut _) - }; - ensure!(status.is_success(), status); - - ensure!( - RaMsg3::check_quote_len(quote_size as usize), - SgxStatus::Unexpected - ); - - let raw_msg3_len = mem::size_of::() + quote_size as usize; - - cfg_if! { - if #[cfg(feature = "hyper")] { - use sgx_urts::msbuf::MsBufAlloc; - let alloc = MsBufAlloc::new(self.eid); - - let remain_size = alloc.remain_size(); - ensure!(raw_msg3_len < remain_size, SgxStatus::OutOfMemory); - } else { - use std::alloc::Global; - let alloc = Global; - } - } - - let mut raw_msg3 = vec::from_elem_in(0_u8, raw_msg3_len, alloc); - let c_msg3 = &mut *(raw_msg3.as_mut_ptr() as *mut CRaMsg3); - - let qe_report = &(if let Some(ref att_key_id) = self.att_key_id { - let mut qe_report_info = QeReportInfo { - nonce, - app_enclave_target_info: report.into(), - qe_report: Report::default(), - }; - let status = sgx_get_quote_ex( - &report as *const _, - att_key_id as *const _, - &mut qe_report_info as *mut _, - (c_msg3.quote).as_mut_ptr().cast(), - quote_size, - ); - ensure!(status.is_success(), status); - - qe_report_info.qe_report - } else { - let mut qe_report = Report::default(); - let status = sgx_get_quote( - &report as *const _, - msg2.quote_type, - &msg2.spid as *const _, - &nonce as *const _, - sig_rl, - sig_rl_len, - &mut qe_report as *mut _, - (c_msg3.quote).as_mut_ptr().cast(), - quote_size, - ); - ensure!(status.is_success(), status); - - qe_report - }); - - let mut retval = SgxStatus::Success; - let status = get_msg3_fn( - self.eid, - &mut retval as *mut _, - self.rctx, - quote_size, - qe_report as *const _, - c_msg3 as *mut _, - raw_msg3_len as u32, - ); - ensure!(status.is_success(), status); - ensure!(retval.is_success(), retval); - - raw_msg3 - }; - - RaMsg3::from_bytes(raw_msg3) - } -} - -impl Initiator { - #[inline] - pub(crate) fn set_attkey_id(&mut self, att_key_id: Option) { - self.att_key_id = att_key_id; - } - - #[inline] - pub(crate) fn set_qe_target(&mut self, qe_target: TargetInfo) { - self.qe_target = qe_target; - } - - #[inline] - pub(crate) fn get_attkey_id(&self) -> Option { - self.att_key_id - } - - #[inline] - pub(crate) fn get_qe_target(&self) -> TargetInfo { - self.qe_target - } -} diff --git a/sgx_libc/sgx_tlibc_sys/tlibc/gen/sbrk.c b/sgx_libc/sgx_tlibc_sys/tlibc/gen/sbrk.c index 0f4c28d0e..203714f09 100644 --- a/sgx_libc/sgx_tlibc_sys/tlibc/gen/sbrk.c +++ b/sgx_libc/sgx_tlibc_sys/tlibc/gen/sbrk.c @@ -41,10 +41,17 @@ SE_DECLSPEC_EXPORT size_t g_peak_heap_used = 0; /* Please be aware of: sbrk is not thread safe by default. */ #define RELRO_SECTION_NAME ".data.rel.ro" +#ifndef _TD_MIGRATION static void *heap_base __attribute__((section(RELRO_SECTION_NAME))) = NULL; static size_t heap_size __attribute__((section(RELRO_SECTION_NAME))) = 0; static int is_edmm_supported __attribute__((section(RELRO_SECTION_NAME))) = 0; static size_t heap_min_size __attribute__((section(RELRO_SECTION_NAME))) = 0; +#else +void *heap_base = NULL; +size_t heap_size = 0; +int is_edmm_supported = 0; +size_t heap_min_size = 0; +#endif unsigned int sgx_heap_init(void *_heap_base, size_t _heap_size, size_t _heap_min_size, int _is_edmm_supported) { @@ -78,6 +85,7 @@ void* sbrk(intptr_t n) size_t prev_heap_used = heap_used; void * start_addr; size_t size = 0; + assert((heap_used & (SE_PAGE_SIZE - 1)) == 0); if (!heap_base) return (void *)(~(size_t)0); @@ -113,6 +121,7 @@ void* sbrk(intptr_t n) start_addr = (void *)((size_t)(heap_base) + heap_min_size); size = prev_heap_used - heap_min_size; } + assert((size & (SE_PAGE_SIZE - 1)) == 0); int ret = sgx_trim_epc_pages(start_addr, size >> SE_PAGE_SHIFT); if (ret != 0) { @@ -131,6 +140,8 @@ void* sbrk(intptr_t n) there's no integer overflow here. */ heap_ptr = (void *)((size_t)heap_base + (size_t)heap_used); + if(n == 0) return heap_ptr; + heap_used += n; /* update g_peak_heap_used */ @@ -154,6 +165,7 @@ void* sbrk(intptr_t n) start_addr = (void *)((size_t)(heap_base) + heap_min_size); size = heap_used - heap_min_size; } + assert((size & (SE_PAGE_SIZE - 1)) == 0); int ret = sgx_apply_epc_pages(start_addr, size >> SE_PAGE_SHIFT); if (ret != 0) { diff --git a/sgx_libc/sgx_tlibc_sys/tlibc/gen/spinlock.c b/sgx_libc/sgx_tlibc_sys/tlibc/gen/spinlock.c index b0bc40847..c1f2d24c5 100644 --- a/sgx_libc/sgx_tlibc_sys/tlibc/gen/spinlock.c +++ b/sgx_libc/sgx_tlibc_sys/tlibc/gen/spinlock.c @@ -58,15 +58,23 @@ static inline int _InterlockedExchange(int volatile * dst, int val) } +#define MIN_BACKOFF 2 +#define MAX_BACKOFF 1024 uint32_t sgx_spin_lock(sgx_spinlock_t *lock) { - while(_InterlockedExchange((volatile int *)lock, 1) != 0) { - while (*lock) { - /* tell cpu we are spinning */ - _mm_pause(); - } + while(_InterlockedExchange((volatile int *)lock, 1) != 0) { + int b = MIN_BACKOFF; + do + { /* tell cpu we are spinning */ + for (int i=0; i < b; i++) { + _mm_pause(); + } + b <<= 1; + if (b > MAX_BACKOFF) { + b = MAX_BACKOFF; + } + } while (*lock); } - return (0); } @@ -76,4 +84,3 @@ uint32_t sgx_spin_unlock(sgx_spinlock_t *lock) return (0); } - diff --git a/sgx_libc/sgx_tlibc_sys/tlibc/stdlib/aligned_alloc.c b/sgx_libc/sgx_tlibc_sys/tlibc/stdlib/aligned_alloc.c new file mode 100644 index 000000000..f3dcc46c2 --- /dev/null +++ b/sgx_libc/sgx_tlibc_sys/tlibc/stdlib/aligned_alloc.c @@ -0,0 +1,6 @@ +#include + +void *aligned_alloc(size_t align, size_t len) +{ + return memalign(align, len); +} diff --git a/sgx_libc/sgx_tlibc_sys/tlibc/stdlib/malloc.c b/sgx_libc/sgx_tlibc_sys/tlibc/stdlib/malloc.c index 31ac4f714..29879572a 100644 --- a/sgx_libc/sgx_tlibc_sys/tlibc/stdlib/malloc.c +++ b/sgx_libc/sgx_tlibc_sys/tlibc/stdlib/malloc.c @@ -845,8 +845,8 @@ extern "C" { void* __attribute__((weak)) calloc(size_t n, size_t size) ALIAS(dlcalloc); void* __attribute__((weak)) memalign(size_t align, size_t s) ALIAS(dlmemalign); struct mallinfo __attribute__((weak)) mallinfo(void) ALIAS(dlmallinfo); + int __attribute__((weak)) posix_memalign(void** pp, size_t alignment, size_t n) ALIAS(dlposix_memalign); #ifdef USE_MALLOC_DEPRECATED -#define dlposix_memalign posix_memalign #define dlrealloc_in_place realloc_in_place #define dlvalloc valloc #define dlpvalloc pvalloc @@ -952,7 +952,6 @@ DLMALLOC_EXPORT void* dlrealloc_in_place(void*, size_t); */ DLMALLOC_EXPORT void* dlmemalign(size_t, size_t); -#ifdef USE_MALLOC_DEPRECATED /* int posix_memalign(void** pp, size_t alignment, size_t n); Allocates a chunk of n bytes, aligned in accord with the alignment @@ -963,6 +962,7 @@ DLMALLOC_EXPORT void* dlmemalign(size_t, size_t); */ DLMALLOC_EXPORT int dlposix_memalign(void**, size_t, size_t); +#ifdef USE_MALLOC_DEPRECATED /* valloc(size_t n); Equivalent to memalign(pagesize, n), where pagesize is the page @@ -5336,7 +5336,6 @@ void* dlmemalign(size_t alignment, size_t bytes) { return internal_memalign(gm, alignment, bytes); } -#ifdef USE_MALLOC_DEPRECATED int dlposix_memalign(void** pp, size_t alignment, size_t bytes) { void* mem = 0; if (alignment == MALLOC_ALIGNMENT) @@ -5360,6 +5359,7 @@ int dlposix_memalign(void** pp, size_t alignment, size_t bytes) { } } +#ifdef USE_MALLOC_DEPRECATED void* dlvalloc(size_t bytes) { size_t pagesz; ensure_initialization(); diff --git a/sgx_libc/sgx_tlibc_sys/tlibc/string/memcpy.c b/sgx_libc/sgx_tlibc_sys/tlibc/string/memcpy.c index a83c3744d..526b21495 100644 --- a/sgx_libc/sgx_tlibc_sys/tlibc/string/memcpy.c +++ b/sgx_libc/sgx_tlibc_sys/tlibc/string/memcpy.c @@ -110,12 +110,13 @@ void* memcpy_verw(void *dst0, const void *src0, size_t len) } while (len >= 8) { - if((unsigned long long)dst%8 == 0) { + if(((unsigned long long)dst%8 == 0) && ((unsigned long long)src%8 == 0)) { // 8-byte-aligned - don't need bracketing - __memcpy_8a(dst, src); - src += 8; - dst += 8; - len -= 8; + size_t len0 = len - len%8; + memcpy_nochecks(dst, src, len0); + src += len0; + dst += len0; + len -= len0; } else{ // not 8-byte-aligned - need bracketing @@ -127,9 +128,9 @@ void* memcpy_verw(void *dst0, const void *src0, size_t len) } // less than 8 bytes left - need bracketing for (unsigned i = 0; i < len; i++) { - __memcpy_verw(dst, src); - src++; - dst++; + __memcpy_verw(dst, src); + src++; + dst++; } return dst0; } @@ -152,27 +153,35 @@ memcpy_nochecks(void *dst0, const void *src0, size_t length) static void copy_external_memory(void* dst, const void* src, size_t count, bool is_dst_external) { - unsigned char tmp_buf[16]={0}; + char tmp_buf[16]={0}; unsigned int off_src = (unsigned long long)src%8; + char* src_buf = NULL; if(count == 0) { return; } - - //if src is 8-byte-aligned, copy 8 bytes from outside the enclave to the buffer - //if src is not 8-byte-aligned and off_src + count > 8, copy 16 bytes from outside the enclave to the buffer - __memcpy_8a(tmp_buf, src - off_src); - if(off_src != 0 && off_src + count > 8) + //if external src is not 8-byte-aligned or count != 8 + if(off_src != 0 || count != 8) { - __memcpy_8a(tmp_buf + 8, src - off_src + 8); + //if external src is not 8-byte-aligned, need to copy from src-off_src to a tmp_buf inside the enclave + __memcpy_8a(tmp_buf, src - off_src); + if(off_src != 0 && off_src + count > 8) + { + __memcpy_8a(tmp_buf + 8, src - off_src + 8); + } + src_buf = tmp_buf + off_src; + } + else + { + src_buf = (char*)src; } if(is_dst_external) { - memcpy_verw(dst, tmp_buf + off_src, count); + memcpy_verw(dst, src_buf, count); } else { - memcpy_nochecks(dst, tmp_buf + off_src, count); + memcpy_nochecks(dst, src_buf, count); } return; } @@ -202,16 +211,28 @@ memcpy(void *dst0, const void *src0, size_t length) } //src is outside the enclave - unsigned int len = 0; + size_t len = 0; char* dst = dst0; const char *src = (const char *)src0; while(length >= 8) { - len = 8 - (unsigned long long)dst%8; - copy_external_memory(dst, src, len, is_dst_external); - src += len; - dst += len; - length -= len; + //if dst and src are both 8-byte-aligned, direct call memcpy_nochecks + if(((unsigned long long)dst%8 == 0) && ((unsigned long long)src%8 == 0)) + { + len = length - length%8; + memcpy_nochecks(dst, src, len); + src += len; + dst += len; + length -= len; + } + else + { + len = 8 - (unsigned long long)dst%8; + copy_external_memory(dst, src, len, is_dst_external); + src += len; + dst += len; + length -= len; + } } //less than 8 bytes left copy_external_memory(dst, src, length, is_dst_external); diff --git a/sgx_oc/src/lib.rs b/sgx_oc/src/lib.rs index 0a4ac1448..355a64d84 100644 --- a/sgx_oc/src/lib.rs +++ b/sgx_oc/src/lib.rs @@ -17,9 +17,9 @@ #![no_std] #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] +#![allow(internal_features)] +#![allow(static_mut_refs)] #![feature(allocator_api)] -#![feature(error_in_core)] -#![feature(const_extern_fn)] #![feature(negative_impls)] #![feature(ptr_internals)] #![feature(slice_index_methods)] diff --git a/sgx_oc/src/linux/mod.rs b/sgx_oc/src/linux/mod.rs index 6a5c09c46..0c0e5a0b3 100644 --- a/sgx_oc/src/linux/mod.rs +++ b/sgx_oc/src/linux/mod.rs @@ -1,3 +1,5 @@ +#![allow(dangerous_implicit_autorefs)] +#![allow(dangerous_implicit_autorefs)] // Licensed to the Apache Software Foundation (ASF) under one // or more contributor license agreements. See the NOTICE file // distributed with this work for additional information diff --git a/sgx_oc/src/linux/x86_64/mod.rs b/sgx_oc/src/linux/x86_64/mod.rs index da39123f3..33237502e 100644 --- a/sgx_oc/src/linux/x86_64/mod.rs +++ b/sgx_oc/src/linux/x86_64/mod.rs @@ -315,11 +315,12 @@ s! { pub __val: [u64; 16], } + #[allow(unpredictable_function_pointer_comparisons)] pub struct sigaction { pub sa_sigaction: sighandler_t, pub sa_mask: sigset_t, pub sa_flags: c_int, - pub sa_restorer: Option, + pub sa_restorer: Option, } pub struct siginfo_t { pub si_signo: c_int, diff --git a/sgx_oc/src/macros.rs b/sgx_oc/src/macros.rs index 72e3fbdfc..4494d444f 100644 --- a/sgx_oc/src/macros.rs +++ b/sgx_oc/src/macros.rs @@ -132,7 +132,6 @@ macro_rules! f { $($body:stmt);* })*) => ($( #[no_mangle] - #[inline] pub $($constness)* unsafe extern "C" fn $i($($arg: $argty),*) -> $ret { $($body)* } @@ -147,7 +146,7 @@ macro_rules! safe_f { })*) => ($( #[inline] $(#[$attr])* - pub $($constness)* extern fn $i($($arg: $argty),* + pub $($constness)* extern "C" fn $i($($arg: $argty),* ) -> $ret { $($body);* } diff --git a/sgx_rsrvmm/Cargo.toml b/sgx_rsrvmm/Cargo.toml index 59ee89635..6efd68e15 100644 --- a/sgx_rsrvmm/Cargo.toml +++ b/sgx_rsrvmm/Cargo.toml @@ -32,6 +32,7 @@ crate-type = ["rlib"] [features] default = [] capi = [] +use_sgx_sdk = ["sgx_trts/use_sgx_sdk"] [dependencies] sgx_sync = { path = "../sgx_sync" } diff --git a/sgx_rsrvmm/build.rs b/sgx_rsrvmm/build.rs new file mode 100644 index 000000000..45e90b0f9 --- /dev/null +++ b/sgx_rsrvmm/build.rs @@ -0,0 +1,27 @@ +// Licensed to the Apache Software Foundation (ASF) under one +// or more contributor license agreements. See the NOTICE file +// distributed with this work for additional information +// regarding copyright ownership. The ASF licenses this file +// to you under the Apache License, Version 2.0 (the +// "License"); you may not use this file except in compliance +// with the License. You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, +// software distributed under the License is distributed on an +// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +// KIND, either express or implied. See the License for the +// specific language governing permissions and limitations +// under the License. + +use std::env; + +fn main() -> Result<(), &'static str> { + println!("cargo:rerun-if-changed=build.rs"); + let target = env::var("TARGET").unwrap(); + if target == "x86_64-sgx_sdk-linux-sgx" { + println!("cargo:rustc-cfg=feature=\"use_sgx_sdk\""); + } + Ok(()) +} \ No newline at end of file diff --git a/sgx_rsrvmm/src/lib.rs b/sgx_rsrvmm/src/lib.rs index b6253dbf3..9613cb1a4 100644 --- a/sgx_rsrvmm/src/lib.rs +++ b/sgx_rsrvmm/src/lib.rs @@ -18,6 +18,7 @@ #![no_std] #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] #![feature(slice_ptr_get)] +#![allow(static_mut_refs)] #![allow(clippy::missing_safety_doc)] #[macro_use] diff --git a/sgx_rsrvmm/src/rsrvmm/mod.rs b/sgx_rsrvmm/src/rsrvmm/mod.rs index a2fdcad2d..795488b5c 100644 --- a/sgx_rsrvmm/src/rsrvmm/mod.rs +++ b/sgx_rsrvmm/src/rsrvmm/mod.rs @@ -35,8 +35,13 @@ pub(crate) mod manager; static mut RSRV_MEM: Option = None; static RSRV_MEM_INIT: Once = Once::new(); +#[cfg(not(feature = "use_sgx_sdk"))] #[no_mangle] static mut g_peak_rsrv_mem_committed: usize = 0; +#[cfg(feature = "use_sgx_sdk")] +extern "C" { + pub static mut g_peak_rsrv_mem_committed: usize; +} macro_rules! round_to_page { ($num:expr) => { diff --git a/sgx_serialize/src/types.rs b/sgx_serialize/src/types.rs index e0aa084ac..f4be14d1e 100644 --- a/sgx_serialize/src/types.rs +++ b/sgx_serialize/src/types.rs @@ -23,9 +23,9 @@ use sgx_types::types::{ }; use sgx_types::types::{ Attributes, AttributesFlags, ConfigId, CpuSvn, KeyId, KeyName, KeyPolicy, KeyRequest, - Measurement, MiscAttribute, MiscSelect, Report, Report2, Report2Body, Report2Mac, ReportBody, - ReportData, TargetInfo, TeeAttributes, TeeCpuSvn, TeeInfo, TeeMeasurement, TeeReportData, - TeeReportType, TeeTcbInfo, TeeTcbSvn, + Measurement, MiscAttribute, MiscSelect, Report, Report2, Report2Body, Report2BodyV15, + Report2Mac, ReportBody, ReportData, TargetInfo, TeeAttributes, TeeCpuSvn, TeeInfo, TeeInfoV15, + TeeMeasurement, TeeReportData, TeeReportType, TeeTcbInfo, TeeTcbInfoV15, TeeTcbSvn, }; use sgx_types::types::{BaseName, PsSecPropDesc, QuoteNonce, Spid}; use sgx_types::types::{Ec256PrivateKey, Ec256PublicKey, Ec256SharedKey, Ec256Signature}; @@ -1608,14 +1608,6 @@ impl Decodable for TeeInfo { impl Encodable for TeeTcbInfo { fn encode(&self, e: &mut S) -> Result<(), S::Error> { - // let TeeTcbInfo { - // valid: ref _valid, - // tee_tcb_svn: ref _tee_tcb_svn, - // mr_seam: ref _mr_seam, - // mr_seam_signer: ref _mr_seam_signer, - // attributes: ref _attributes, - // reserved: ref _reserved, - // } = *self; let _valid = unsafe { &*core::ptr::addr_of!(self.valid) }; let _tee_tcb_svn = unsafe { &*core::ptr::addr_of!(self.tee_tcb_svn) }; let _mr_seam = unsafe { &*core::ptr::addr_of!(self.mr_seam) }; @@ -1661,20 +1653,6 @@ impl Decodable for TeeTcbInfo { impl Encodable for Report2Body { fn encode(&self, e: &mut S) -> Result<(), S::Error> { - // let Report2Body { - // tee_tcb_svn: ref _tee_tcb_svn, - // mr_seam: ref _mr_seam, - // mrsigner_seam: ref _mrsigner_seam, - // seam_attributes: ref _seam_attributes, - // td_attributes: ref _td_attributes, - // xfam: ref _xfam, - // mr_td: ref _mr_td, - // mr_config_id: ref _mr_config_id, - // mr_owner: ref _mr_owner, - // mr_owner_config: ref _mr_owner_config, - // rt_mr: ref _rt_mr, - // report_data: ref _report_data, - // } = *self; let _tee_tcb_svn = unsafe { &*core::ptr::addr_of!(self.tee_tcb_svn) }; let _mr_seam = unsafe { &*core::ptr::addr_of!(self.mr_seam) }; let _mrsigner_seam = unsafe { &*core::ptr::addr_of!(self.mrsigner_seam) }; @@ -1753,3 +1731,205 @@ impl Decodable for Report2Body { }) } } + +impl Encodable for TeeInfoV15 { + fn encode(&self, e: &mut S) -> Result<(), S::Error> { + let TeeInfoV15 { + attributes: ref _attributes, + xfam: ref _xfam, + mr_td: ref _mr_td, + mr_config_id: ref _mr_config_id, + mr_owner: ref _mr_owner, + mr_owner_config: ref _mr_owner_config, + rt_mr: ref _rt_mr, + mr_servicetd: ref _mr_servicetd, + reserved: ref _reserved, + } = *self; + e.emit_struct("TeeInfoV15", 8usize, |e| -> _ { + e.emit_struct_field("attributes", 0usize, |e| -> _ { + Encodable::encode(&*_attributes, e) + })?; + e.emit_struct_field("xfam", 1usize, |e| -> _ { Encodable::encode(&*_xfam, e) })?; + e.emit_struct_field("mr_td", 2usize, |e| -> _ { Encodable::encode(&*_mr_td, e) })?; + e.emit_struct_field("mr_config_id", 3usize, |e| -> _ { + Encodable::encode(&*_mr_config_id, e) + })?; + e.emit_struct_field("mr_owner", 4usize, |e| -> _ { + Encodable::encode(&*_mr_owner, e) + })?; + e.emit_struct_field("mr_owner_config", 5usize, |e| -> _ { + Encodable::encode(&*_mr_owner_config, e) + })?; + e.emit_struct_field("rt_mr", 6usize, |e| -> _ { Encodable::encode(&*_rt_mr, e) })?; + e.emit_struct_field("mr_servicetd", 7usize, |e| -> _ { + Encodable::encode(&*_mr_servicetd, e) + })?; + e.emit_struct_field("reserved", 8usize, |e| -> _ { + Encodable::encode(&*_reserved, e) + }) + }) + } +} + +impl Decodable for TeeInfoV15 { + fn decode(d: &mut D) -> Result { + d.read_struct("TeeInfoV15", 8usize, |d| -> _ { + Ok(TeeInfoV15 { + attributes: d.read_struct_field("attributes", 0usize, Decodable::decode)?, + xfam: d.read_struct_field("xfam", 1usize, Decodable::decode)?, + mr_td: d.read_struct_field("mr_td", 2usize, Decodable::decode)?, + mr_config_id: d.read_struct_field("mr_config_id", 3usize, Decodable::decode)?, + mr_owner: d.read_struct_field("mr_owner", 4usize, Decodable::decode)?, + mr_owner_config: d.read_struct_field( + "mr_owner_config", + 5usize, + Decodable::decode, + )?, + rt_mr: d.read_struct_field("rt_mr", 6usize, Decodable::decode)?, + mr_servicetd: d.read_struct_field("mr_servicetd", 7usize, Decodable::decode)?, + reserved: d.read_struct_field("reserved", 8usize, Decodable::decode)?, + }) + }) + } +} + +impl Encodable for TeeTcbInfoV15 { + fn encode(&self, e: &mut S) -> Result<(), S::Error> { + let _valid = unsafe { &*core::ptr::addr_of!(self.valid) }; + let _tee_tcb_svn = unsafe { &*core::ptr::addr_of!(self.tee_tcb_svn) }; + let _mr_seam = unsafe { &*core::ptr::addr_of!(self.mr_seam) }; + let _mr_seam_signer = unsafe { &*core::ptr::addr_of!(self.mr_seam_signer) }; + let _attributes = unsafe { &*core::ptr::addr_of!(self.attributes) }; + let _tee_tcb_svn2 = unsafe { &*core::ptr::addr_of!(self.tee_tcb_svn2) }; + let _reserved = unsafe { &*core::ptr::addr_of!(self.reserved) }; + + e.emit_struct("TeeTcbInfoV15", 6usize, |e| -> _ { + e.emit_struct_field("valid", 0usize, |e| -> _ { Encodable::encode(&*_valid, e) })?; + e.emit_struct_field("tee_tcb_svn", 1usize, |e| -> _ { + Encodable::encode(&*_tee_tcb_svn, e) + })?; + e.emit_struct_field("mr_seam", 2usize, |e| -> _ { + Encodable::encode(&*_mr_seam, e) + })?; + e.emit_struct_field("mr_seam_signer", 3usize, |e| -> _ { + Encodable::encode(&*_mr_seam_signer, e) + })?; + e.emit_struct_field("attributes", 4usize, |e| -> _ { + Encodable::encode(&*_attributes, e) + })?; + e.emit_struct_field("tee_tcb_svn2", 5usize, |e| -> _ { + Encodable::encode(&*_tee_tcb_svn2, e) + })?; + e.emit_struct_field("reserved", 6usize, |e| -> _ { + Encodable::encode(&*_reserved, e) + }) + }) + } +} + +impl Decodable for TeeTcbInfoV15 { + fn decode(d: &mut D) -> Result { + d.read_struct("TeeTcbInfoV15", 8usize, |d| -> _ { + Ok(TeeTcbInfoV15 { + valid: d.read_struct_field("valid", 0usize, Decodable::decode)?, + tee_tcb_svn: d.read_struct_field("tee_tcb_svn", 1usize, Decodable::decode)?, + mr_seam: d.read_struct_field("mr_seam", 2usize, Decodable::decode)?, + mr_seam_signer: d.read_struct_field("mr_seam_signer", 3usize, Decodable::decode)?, + attributes: d.read_struct_field("attributes", 4usize, Decodable::decode)?, + tee_tcb_svn2: d.read_struct_field("tee_tcb_svn2", 5usize, Decodable::decode)?, + reserved: d.read_struct_field("reserved", 6usize, Decodable::decode)?, + }) + }) + } +} + +impl Encodable for Report2BodyV15 { + fn encode(&self, e: &mut S) -> Result<(), S::Error> { + let _tee_tcb_svn = unsafe { &*core::ptr::addr_of!(self.tee_tcb_svn) }; + let _mr_seam = unsafe { &*core::ptr::addr_of!(self.mr_seam) }; + let _mrsigner_seam = unsafe { &*core::ptr::addr_of!(self.mrsigner_seam) }; + let _seam_attributes = unsafe { &*core::ptr::addr_of!(self.seam_attributes) }; + let _td_attributes = unsafe { &*core::ptr::addr_of!(self.td_attributes) }; + let _xfam = unsafe { &*core::ptr::addr_of!(self.xfam) }; + let _mr_td = unsafe { &*core::ptr::addr_of!(self.mr_td) }; + let _mr_config_id = unsafe { &*core::ptr::addr_of!(self.mr_config_id) }; + let _mr_owner = unsafe { &*core::ptr::addr_of!(self.mr_owner) }; + let _mr_owner_config = unsafe { &*core::ptr::addr_of!(self.mr_owner_config) }; + let _rt_mr = unsafe { &*core::ptr::addr_of!(self.rt_mr) }; + let _report_data = unsafe { &*core::ptr::addr_of!(self.report_data) }; + let _tee_tcb_svn2 = unsafe { &*core::ptr::addr_of!(self.tee_tcb_svn2) }; + let _mr_servicetd = unsafe { &*core::ptr::addr_of!(self.mr_servicetd) }; + + e.emit_struct("Report2BodyV15", 12usize, |e| -> _ { + e.emit_struct_field("tee_tcb_svn", 0usize, |e| -> _ { + Encodable::encode(&*_tee_tcb_svn, e) + })?; + e.emit_struct_field("mr_seam", 1usize, |e| -> _ { + Encodable::encode(&*_mr_seam, e) + })?; + e.emit_struct_field("mrsigner_seam", 2usize, |e| -> _ { + Encodable::encode(&*_mrsigner_seam, e) + })?; + e.emit_struct_field("seam_attributes", 3usize, |e| -> _ { + Encodable::encode(&*_seam_attributes, e) + })?; + e.emit_struct_field("td_attributes", 4usize, |e| -> _ { + Encodable::encode(&*_td_attributes, e) + })?; + e.emit_struct_field("xfam", 5usize, |e| -> _ { Encodable::encode(&*_xfam, e) })?; + e.emit_struct_field("mr_td", 6usize, |e| -> _ { Encodable::encode(&*_mr_td, e) })?; + e.emit_struct_field("mr_config_id", 7usize, |e| -> _ { + Encodable::encode(&*_mr_config_id, e) + })?; + e.emit_struct_field("mr_owner", 8usize, |e| -> _ { + Encodable::encode(&*_mr_owner, e) + })?; + e.emit_struct_field("mr_owner_config", 9usize, |e| -> _ { + Encodable::encode(&*_mr_owner_config, e) + })?; + e.emit_struct_field("rt_mr", 10usize, |e| -> _ { + Encodable::encode(&*_rt_mr, e) + })?; + e.emit_struct_field("report_data", 11usize, |e| -> _ { + Encodable::encode(&*_report_data, e) + })?; + e.emit_struct_field("tee_tcb_svn2", 12usize, |e| -> _ { + Encodable::encode(&*_tee_tcb_svn2, e) + })?; + e.emit_struct_field("mr_servicetd", 13usize, |e| -> _ { + Encodable::encode(&*_mr_servicetd, e) + }) + }) + } +} + +impl Decodable for Report2BodyV15 { + fn decode(d: &mut D) -> Result { + d.read_struct("Report2BodyV15", 8usize, |d| -> _ { + Ok(Report2BodyV15 { + tee_tcb_svn: d.read_struct_field("tee_tcb_svn", 0usize, Decodable::decode)?, + mr_seam: d.read_struct_field("mr_seam", 1usize, Decodable::decode)?, + mrsigner_seam: d.read_struct_field("mrsigner_seam", 2usize, Decodable::decode)?, + seam_attributes: d.read_struct_field( + "seam_attributes", + 3usize, + Decodable::decode, + )?, + td_attributes: d.read_struct_field("td_attributes", 4usize, Decodable::decode)?, + xfam: d.read_struct_field("xfam", 5usize, Decodable::decode)?, + mr_td: d.read_struct_field("mr_td", 6usize, Decodable::decode)?, + mr_config_id: d.read_struct_field("mr_config_id", 7usize, Decodable::decode)?, + mr_owner: d.read_struct_field("mr_owner", 8usize, Decodable::decode)?, + mr_owner_config: d.read_struct_field( + "mr_owner_config", + 9usize, + Decodable::decode, + )?, + rt_mr: d.read_struct_field("rt_mr", 10usize, Decodable::decode)?, + report_data: d.read_struct_field("report_data", 11usize, Decodable::decode)?, + tee_tcb_svn2: d.read_struct_field("tee_tcb_svn2", 12usize, Decodable::decode)?, + mr_servicetd: d.read_struct_field("mr_servicetd", 13usize, Decodable::decode)?, + }) + }) + } +} diff --git a/sgx_sync/src/lib.rs b/sgx_sync/src/lib.rs index 69b40f293..640ebe2ff 100644 --- a/sgx_sync/src/lib.rs +++ b/sgx_sync/src/lib.rs @@ -18,8 +18,8 @@ #![no_std] #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] #![deny(unused_features)] +#![allow(internal_features)] #![feature(const_trait_impl)] -#![feature(core_intrinsics)] #![feature(dropck_eyepatch)] #![feature(hashmap_internals)] #![feature(linked_list_remove)] diff --git a/sgx_sync/src/once_lock.rs b/sgx_sync/src/once_lock.rs index aec025537..f01c848ac 100644 --- a/sgx_sync/src/once_lock.rs +++ b/sgx_sync/src/once_lock.rs @@ -227,7 +227,7 @@ unsafe impl Send for OnceLock {} impl RefUnwindSafe for OnceLock {} impl UnwindSafe for OnceLock {} -impl const Default for OnceLock { +impl Default for OnceLock { /// Creates a new empty cell. /// fn default() -> OnceLock { diff --git a/sgx_sync/src/sys/futex.rs b/sgx_sync/src/sys/futex.rs index b06fbb335..a8aa7cd97 100644 --- a/sgx_sync/src/sys/futex.rs +++ b/sgx_sync/src/sys/futex.rs @@ -24,7 +24,6 @@ use alloc::collections::VecDeque; use alloc::sync::Arc; use alloc::vec::Vec; use core::hash::{Hash, Hasher, SipHasher13}; -use core::intrinsics; use core::sync::atomic::{AtomicBool, Ordering}; use core::time::Duration; use sgx_trts::sync::SpinMutex; @@ -179,7 +178,7 @@ impl Futex { } fn load_val(&self) -> u32 { - unsafe { intrinsics::atomic_load_seqcst(self.0 as *const u32) } + unsafe { { use core::sync::atomic::{AtomicU32, Ordering}; (*((self.0 as *const u32) as *const AtomicU32)).load(Ordering::SeqCst) } } } fn addr(&self) -> usize { diff --git a/sgx_trts/Cargo.toml b/sgx_trts/Cargo.toml index 82282e683..c168b5009 100644 --- a/sgx_trts/Cargo.toml +++ b/sgx_trts/Cargo.toml @@ -34,8 +34,14 @@ default = [] thread = [] sim = ["sgx_types/sim"] hyper = ["sgx_types/hyper"] +use_sgx_sdk = [] [dependencies] sgx_types = { path = "../sgx_types" } + +# cannot condition to feature, as the feature is set in build.rs, *after* the dependencies resolution +# the full target name is not usable either as we need a block to negate it, +# so we check for a custom target_abi, as defined in x86_64-sgx_sdk_linux_sgx.json +[target.'cfg(not(target_abi = "sgx_sdk"))'.dependencies] sgx_crypto_sys = { path = "../sgx_crypto/sgx_crypto_sys" } sgx_tlibc_sys = { path = "../sgx_libc/sgx_tlibc_sys" } diff --git a/sgx_trts/build.rs b/sgx_trts/build.rs index 124c93b2e..61a74f9fc 100644 --- a/sgx_trts/build.rs +++ b/sgx_trts/build.rs @@ -32,5 +32,10 @@ fn main() -> Result<(), &'static str> { "HYPER" => println!("cargo:rustc-cfg=feature=\"hyper\""), _ => (), } + + let target = env::var("TARGET").unwrap(); + if target == "x86_64-sgx_sdk-linux-sgx" { + println!("cargo:rustc-cfg=feature=\"use_sgx_sdk\""); + } Ok(()) } diff --git a/sgx_trts/src/aexnotify.rs b/sgx_trts/src/aexnotify.rs new file mode 100644 index 000000000..33a7b57f3 --- /dev/null +++ b/sgx_trts/src/aexnotify.rs @@ -0,0 +1,58 @@ +// Licensed to the Apache Software Foundation (ASF) under one +// or more contributor license agreements. See the NOTICE file +// distributed with this work for additional information +// regarding copyright ownership. The ASF licenses this file +// to you under the Apache License, Version 2.0 (the +// "License"); you may not use this file except in compliance +// with the License. You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, +// software distributed under the License is distributed on an +// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +// KIND, either express or implied. See the License for the +// specific language governing permissions and limitations +// under the License.. + +use crate::arch::SsaGpr; +use crate::se::AlignReport; +use crate::tcs; +use sgx_types::error::{SgxResult, SgxStatus}; +use sgx_types::types::AttributesFlags; + +pub struct AEXNotify; + +impl AEXNotify { + const SSA_AEXNOTIFY_MASK: u8 = 1; + + pub fn set(is_enable: bool) -> SgxResult { + let report = AlignReport::get_self(); + if !report + .0 + .body + .attributes + .flags + .intersects(AttributesFlags::AEXNOTIFY) + { + bail!(SgxStatus::Unexpected); + } + + let mut tc = tcs::current(); + let tds = tc.tds_mut(); + let ssa_gpr = tds.ssa_gpr_mut(); + + if is_enable { + ssa_gpr.aex_notify |= Self::SSA_AEXNOTIFY_MASK; + } else { + ssa_gpr.aex_notify &= !Self::SSA_AEXNOTIFY_MASK; + } + + Ok(()) + } + + #[inline] + pub(crate) fn is_enable(ssa_gpr: &SsaGpr) -> bool { + (ssa_gpr.aex_notify & Self::SSA_AEXNOTIFY_MASK) != 0 + } +} diff --git a/sgx_trts/src/arch.rs b/sgx_trts/src/arch.rs index 8f5bbf154..ab4773335 100644 --- a/sgx_trts/src/arch.rs +++ b/sgx_trts/src/arch.rs @@ -19,10 +19,13 @@ use crate::edmm::{self, PageType}; use crate::tcs::tc; +#[cfg(not(feature = "use_sgx_sdk"))] use crate::version::*; +use crate::xsave; use core::convert::From; use core::fmt; use core::mem; +use core::slice; use sgx_types::types::{Attributes, ConfigId, Measurement, MiscSelect}; pub const SE_PAGE_SHIFT: usize = 12; @@ -30,6 +33,7 @@ pub const SE_PAGE_SIZE: usize = 0x1000; pub const SE_GUARD_PAGE_SHIFT: usize = 16; pub const SE_GUARD_PAGE_SIZE: usize = 0x10000; pub const RED_ZONE_SIZE: usize = 128; +pub const RSVD_SIZE_OF_MITIGATION_STACK_AREA: usize = 15 * 8; macro_rules! is_page_aligned { ($num:expr) => { @@ -49,12 +53,17 @@ macro_rules! trim_to_page { }; } -#[link_section = ".niprod"] +#[cfg(not(feature = "use_sgx_sdk"))] +#[link_section = ".nipd"] #[no_mangle] pub static mut g_global_data: GlobalData = GlobalData { version: VERSION_UINT, data: [0_u8; GLOBAL_DATA_SIZE], }; +#[cfg(feature = "use_sgx_sdk")] +extern "C" { + pub static mut g_global_data: GlobalData; +} const GLOBAL_DATA_SIZE: usize = mem::size_of::() - mem::size_of::(); @@ -228,11 +237,20 @@ impl fmt::Debug for Secs { pub const TCS_RESERVED_BYTES: usize = 4024; +impl_bitflags! { + #[repr(C)] + #[derive(Clone, Copy, Debug, Eq, PartialEq)] + pub struct TcsFlags: u64 { + const DBGOPTIN = 0x0001; + const AEXNOTIFY = 0x0002; + } +} + impl_copy_clone! { #[repr(C, align(4096))] pub struct Tcs { pub reserved0: u64, - pub flags: u64, + pub flags: TcsFlags, pub ossa: u64, pub cssa: u32, pub nssa: u32, @@ -319,12 +337,17 @@ pub struct Tds { pub flags: usize, pub xsave_size: usize, pub last_error: usize, + pub aex_mitigation_list: usize, + pub aex_notify_flag: usize, + pub first_ssa_xsave: usize, pub m_next: usize, pub tls_addr: usize, pub tls_array: usize, pub exception_flag: isize, pub cxx_thread_info: [usize; 6], pub stack_commit: usize, + pub aex_notify_entropy_cache: u32, + pub aex_notify_entropy_remaining: i32, #[cfg(feature = "hyper")] pub index: usize, } @@ -358,15 +381,25 @@ impl Tds { } #[inline] - pub fn ssa_gpr(&mut self) -> &mut SsaGpr { + pub fn ssa_gpr_mut(&mut self) -> &mut SsaGpr { unsafe { &mut *(self.first_ssa_gpr as *mut SsaGpr) } } + + #[inline] + pub fn ssa_gpr(&self) -> &SsaGpr { + unsafe { &*(self.first_ssa_gpr as *const SsaGpr) } + } + + #[inline] + pub fn xsave_area(&self) -> &[u8] { + unsafe { slice::from_raw_parts(self.first_ssa_xsave as *const u8, xsave::xsave_size()) } + } } -pub const TCS_POLICY_BIND: usize = 0x0000_0000; /* If set, the TCS is bound to the application thread */ +pub const TCS_POLICY_BIND: usize = 0x0000_0000; //If set, the TCS is bound to the application thread pub const TCS_POLICY_UNBIND: usize = 0x0000_0001; -pub const LAYOUT_ENTRY_NUM: usize = 42; +pub const LAYOUT_ENTRY_NUM: usize = 43; pub const TCS_TEMPLATE_SIZE: usize = 72; #[repr(C)] @@ -389,6 +422,9 @@ pub struct Global { pub enclave_image_base: u64, pub elrange_start_base: u64, pub elrange_size: u64, + pub edmm_bk_overhead: usize, + pub fips_on: u32, + pub reserved2: u32, } #[repr(C, packed)] @@ -480,6 +516,7 @@ pub const LAYOUT_ID_THREAD_GROUP_DYN: u16 = group_id!(19); pub const LAYOUT_ID_RSRV_MIN: u16 = 20; pub const LAYOUT_ID_RSRV_INIT: u16 = 21; pub const LAYOUT_ID_RSRV_MAX: u16 = 22; +pub const LAYOUT_ID_USER_REGION: u16 = 23; // se_page_attr.h pub const PAGE_ATTR_EADD: u16 = 1 << 0; @@ -501,20 +538,20 @@ pub const PAGE_ATTR_MASK: u16 = !(PAGE_ATTR_EADD // arch.h pub const SI_FLAG_NONE: u64 = 0x0; -pub const SI_FLAG_R: u64 = 0x1; /* Read Access */ -pub const SI_FLAG_W: u64 = 0x2; /* Write Access */ -pub const SI_FLAG_X: u64 = 0x4; /* Execute Access */ -pub const SI_FLAG_PT_LOW_BIT: u64 = 0x8; /* PT low bit */ -pub const SI_FLAG_PT_MASK: u64 = 0xFF << SI_FLAG_PT_LOW_BIT; /* Page Type Mask [15:8] */ -pub const SI_FLAG_SECS: u64 = 0x00 << SI_FLAG_PT_LOW_BIT; /* SECS */ -pub const SI_FLAG_TCS: u64 = 0x01 << SI_FLAG_PT_LOW_BIT; /* TCS */ -pub const SI_FLAG_REG: u64 = 0x02 << SI_FLAG_PT_LOW_BIT; /* Regular Page */ -pub const SI_FLAG_TRIM: u64 = 0x04 << SI_FLAG_PT_LOW_BIT; /* Trim Page */ +pub const SI_FLAG_R: u64 = 0x1; //Read Access +pub const SI_FLAG_W: u64 = 0x2; //Write Access +pub const SI_FLAG_X: u64 = 0x4; //Execute Access +pub const SI_FLAG_PT_LOW_BIT: u64 = 0x8; // PT low bit +pub const SI_FLAG_PT_MASK: u64 = 0xFF << SI_FLAG_PT_LOW_BIT; //Page Type Mask [15:8] +pub const SI_FLAG_SECS: u64 = 0x00 << SI_FLAG_PT_LOW_BIT; //SECS +pub const SI_FLAG_TCS: u64 = 0x01 << SI_FLAG_PT_LOW_BIT; //TCS +pub const SI_FLAG_REG: u64 = 0x02 << SI_FLAG_PT_LOW_BIT; //Regular Page +pub const SI_FLAG_TRIM: u64 = 0x04 << SI_FLAG_PT_LOW_BIT; //Trim Page pub const SI_FLAG_PENDING: u64 = 0x8; pub const SI_FLAG_MODIFIED: u64 = 0x10; pub const SI_FLAG_PR: u64 = 0x20; -pub const SI_FLAGS_EXTERNAL: u64 = SI_FLAG_PT_MASK | SI_FLAG_R | SI_FLAG_W | SI_FLAG_X; /* Flags visible/usable by instructions */ +pub const SI_FLAGS_EXTERNAL: u64 = SI_FLAG_PT_MASK | SI_FLAG_R | SI_FLAG_W | SI_FLAG_X; //Flags visible/usable by instructions pub const SI_FLAGS_R: u64 = SI_FLAG_R | SI_FLAG_REG; pub const SI_FLAGS_RW: u64 = SI_FLAG_R | SI_FLAG_W | SI_FLAG_REG; pub const SI_FLAGS_RX: u64 = SI_FLAG_R | SI_FLAG_X | SI_FLAG_REG; @@ -575,11 +612,38 @@ pub struct SsaGpr { pub rsp_u: u64, /* (144) untrusted stack pointer. saved by EENTER */ pub rbp_u: u64, /* (152) untrusted frame pointer. saved by EENTE */ pub exit_info: ExitInfo, /* (160) contain information for exits */ - pub reserved: u32, /* (164) padding to multiple of 8 bytes */ + pub reserved: [u8; 3], /* (164) padding */ + pub aex_notify: u8, /* (167) AEX Notify */ pub fs: u64, /* (168) FS register */ pub gs: u64, /* (176) GS register */ } +impl SsaGpr { + pub const BYTE_SIZE: usize = mem::size_of::(); +} + +#[repr(C, packed)] +#[derive(Clone, Copy, Debug)] +pub struct MiscExInfo { + pub maddr: u64, + pub error_code: u32, + pub reserved: u32, +} + +impl MiscExInfo { + pub const BYTE_SIZE: usize = mem::size_of::(); + + #[inline] + pub fn from_ssa_gpr(ssa_gpr: &SsaGpr) -> &MiscExInfo { + unsafe { &*((ssa_gpr as *const _ as usize - Self::BYTE_SIZE) as *const MiscExInfo) } + } + + #[inline] + pub fn from_ssa_gpr_mut(ssa_gpr: &mut SsaGpr) -> &mut MiscExInfo { + unsafe { &mut *((ssa_gpr as *mut _ as usize - Self::BYTE_SIZE) as *mut MiscExInfo) } + } +} + #[repr(C, packed)] #[derive(Clone, Copy, Debug)] pub struct ExitInfo(u32); diff --git a/sgx_trts/src/asm/macro.S b/sgx_trts/src/asm/macro.S index 0f6cddef0..678deb3a8 100644 --- a/sgx_trts/src/asm/macro.S +++ b/sgx_trts/src/asm/macro.S @@ -26,11 +26,15 @@ .equ SE_EACCEPT, 5 .equ SE_EMODPE, 6 .equ SE_EVERIFYREPORT2, 8 +.equ SE_EDECCSSA, 9 .equ SE_ECREATE, 0 .equ SE_EADD, 1 .equ SE_EINIT, 2 .equ SE_EREMOVE, 3 +.equ SE_EDBGRD, 4 +.equ SE_EDBGWR, 5 +.equ SE_EEXTEND, 6 .macro DECLARE_GLOBAL_FUNC name .globl \name diff --git a/sgx_trts/src/asm/metadata.S b/sgx_trts/src/asm/metadata.S index 1bcb1bce7..5debddce2 100644 --- a/sgx_trts/src/asm/metadata.S +++ b/sgx_trts/src/asm/metadata.S @@ -17,7 +17,7 @@ .file "metadata.S" -.equ METADATA_SIZE, 0x5000 +.equ METADATA_SIZE, 0x6000 .section ".note.sgxmeta", "", @note .p2align 2 /* section alignment */ diff --git a/sgx_trts/src/asm/mod.rs b/sgx_trts/src/asm/mod.rs index 529b0e0da..81d8693a6 100644 --- a/sgx_trts/src/asm/mod.rs +++ b/sgx_trts/src/asm/mod.rs @@ -25,12 +25,15 @@ cfg_if! { if #[cfg(feature = "sim")] { global_asm!(include_str!("../inst/sim/td.S"), options(att_syntax)); global_asm!(include_str!("../inst/sim/enclu.S"), options(att_syntax)); + global_asm!(include_str!("../inst/sim/aexnotify.S"), options(att_syntax)); } else if #[cfg(feature = "hyper")] { global_asm!(include_str!("../inst/hyper/td.S"), options(att_syntax)); global_asm!(include_str!("../inst/hyper/enclu.S"), options(att_syntax)); + global_asm!(include_str!("../inst/hyper/aexnotify.S"), options(att_syntax)); } else { global_asm!(include_str!("../inst/hw/td.S"), options(att_syntax)); global_asm!(include_str!("../inst/hw/enclu.S"), options(att_syntax)); + global_asm!(include_str!("../inst/hw/aexnotify.S"), options(att_syntax)); } } @@ -62,7 +65,7 @@ global_asm!(include_str!("pic.S"), options(att_syntax)); const SYNTHETIC_STATE_SIZE: usize = 512 + 64; #[link_section = ".niprod"] #[no_mangle] -pub static mut SYNTHETIC_STATE: Align64<[u32; SYNTHETIC_STATE_SIZE / 4]> = Align64([ +pub static SYNTHETIC_STATE: Align64<[u32; SYNTHETIC_STATE_SIZE / 4]> = Align64([ 0x037F, 0, 0, 0, 0, 0, 0x1FBF, 0xFFFF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -70,9 +73,8 @@ pub static mut SYNTHETIC_STATE: Align64<[u32; SYNTHETIC_STATE_SIZE / 4]> = Align 0, 0, 0, 0, 0, 2, 0, 2, 0x80000000, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ]); -#[inline(always)] #[no_mangle] -pub unsafe extern "C" fn get_synthetic_state_ptr( -) -> &'static mut Align64<[u32; SYNTHETIC_STATE_SIZE / 4]> { - &mut SYNTHETIC_STATE +pub extern "C" fn get_synthetic_state_ptr( +) -> *const Align64<[u32; SYNTHETIC_STATE_SIZE / 4]> { + &SYNTHETIC_STATE as *const _ } diff --git a/sgx_trts/src/asm/pic.S b/sgx_trts/src/asm/pic.S index 759d238c1..5d393d3df 100644 --- a/sgx_trts/src/asm/pic.S +++ b/sgx_trts/src/asm/pic.S @@ -35,12 +35,14 @@ __ImageBase: .equ xsave_size, (SE_WORDSIZE * 7) .equ self_addr, 0 .equ stack_guard, (SE_WORDSIZE * 5) +.equ aex_notify_flag, (SE_WORDSIZE * 10) /* SSA GPR */ .equ ssa_sp_t, 32 .equ ssa_sp_u, 144 .equ ssa_bp_u, 152 .equ ssa_exit_info, 160 +.equ aex_notify, 167 .equ EXIT_INFO_VALID, 0x80000000 /* OCALL command */ @@ -168,6 +170,8 @@ _start: call restore_xregs lfence + DISABLE_AEXNOTIFY_ECALL +.Lrestore_untrust_stack: /* set xdi and xsi */ mov $OCMD_ERET, %rdi mov %rbx, %rsi @@ -339,6 +343,9 @@ DECLARE_LOCAL_FUNC __do_ocall /* restore outside stack context */ mov first_ssa_gpr(%rbx), %rdx + + DISABLE_AEXNOTIFY_OCALL +.Lrestore_outside_stack: mov ssa_bp_u(%rdx), %rbp mov ssa_sp_u(%rdx), %rsp /* @@ -453,17 +460,6 @@ Lereport_inst: SE_EPILOG */ -/* - * ------------------------------------------------------------------------- - * extern "C" void abort(void) __attribute__(__noreturn__); - * ------------------------------------------------------------------------- - */ -/* -DECLARE_GLOBAL_FUNC abort - lea_pic ENCLAVE_STATE, %rax - movl $ENCLAVE_CRASHED, (%rax) - ud2 -*/ /* * ------------------------------------------------------------------------- * extern "C" __attribute__((regparm(1))) void continue_execution(sgx_exception_info_t *info); @@ -506,15 +502,3 @@ DECLARE_LOCAL_FUNC continue_execution pop %rsp /* xsp: xax */ xchg %rax, %rsp ret $(RED_ZONE_SIZE) /* pop xip and red zone (if any) */ - -/* -DECLARE_GLOBAL_FUNC lfence - pop %r11 - lfence - jmp *%r11 - -DECLARE_GLOBAL_FUNC mfence - pop %r11 - mfence - jmp *%r11 -*/ diff --git a/sgx_trts/src/asm/sgx_sdk.S b/sgx_trts/src/asm/sgx_sdk.S new file mode 100644 index 000000000..e7e718607 --- /dev/null +++ b/sgx_trts/src/asm/sgx_sdk.S @@ -0,0 +1,83 @@ +/* Licensed to the Apache Software Foundation (ASF) under one + or more contributor license agreements. See the NOTICE file + distributed with this work for additional information + regarding copyright ownership. The ASF licenses this file + to you under the Apache License, Version 2.0 (the + "License"); you may not use this file except in compliance + with the License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, + software distributed under the License is distributed on an + "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + KIND, either express or implied. See the License for the + specific language governing permissions and limitations + under the License.. */ + +.file "get_tds.S" +.section absolute + +.equ SE_GUARD_PAGE_SHIFT, 16 +.equ SE_GUARD_PAGE_SIZE, (1 << SE_GUARD_PAGE_SHIFT) +.equ RED_ZONE_SIZE, 128 +.equ STATIC_STACK_SIZE, 2656 + +.equ OCMD_ERET, -1 + +.equ last_sp, (SE_WORDSIZE * 1) +.equ stack_base_addr, (SE_WORDSIZE * 2) +.equ stack_limit_addr, (SE_WORDSIZE * 3) +.equ first_ssa_gpr, (SE_WORDSIZE * 4) +.equ xsave_size, (SE_WORDSIZE * 7) +.equ self_addr, 0 +.equ stack_guard, (SE_WORDSIZE * 5) +.equ aex_notify_flag, (SE_WORDSIZE * 10) + +/* SSA GPR */ +.equ ssa_sp_t, 32 +.equ ssa_sp_u, 144 +.equ ssa_bp_u, 152 +.equ ssa_exit_info, 160 +.equ aex_notify, 167 + +.equ EXIT_INFO_VALID, 0x80000000 +/* OCALL command */ +.equ OCALL_FLAG, 0x04F434944 + +.equ RDRAND_RETRY_TIMES, 10 + +.equ ENCLAVE_INIT_NOT_STARTED, 0 +.equ ENCLAVE_INIT_IN_PROGRESS, 1 +.equ ENCLAVE_INIT_DONE, 2 +.equ ENCLAVE_CRASHED, 3 + + +.section .nipx,"ax",@progbits + +/* + * --------------------------------------------------------------------- + * Get the address of Tds + * --------------------------------------------------------------------- + */ +DECLARE_LOCAL_FUNC get_tds + READ_TD_DATA self_addr + ret + +.section .nipd,"aw" + +XSAVE_ENABLED: + .int 0 + +.section .text,"ax",@progbits + +DECLARE_LOCAL_FUNC get_xsave_enabled + lea_pic XSAVE_ENABLED, %rcx + xor %rax, %rax + movl (%rcx), %eax + ret + +DECLARE_LOCAL_FUNC set_xsave_enabled + lea_pic XSAVE_ENABLED, %rax + movl %edi, (%rax) + ret diff --git a/sgx_trts/src/asm_sgx_sdk.rs b/sgx_trts/src/asm_sgx_sdk.rs new file mode 100644 index 000000000..d5f4c3fac --- /dev/null +++ b/sgx_trts/src/asm_sgx_sdk.rs @@ -0,0 +1,19 @@ +use core::arch::global_asm; + +global_asm!(include_str!("asm/cet.S")); +global_asm!(include_str!("asm/macro.S")); + +cfg_if! { + if #[cfg(feature = "sim")] { + global_asm!(include_str!("inst/sim/td.S"), options(att_syntax)); + global_asm!(include_str!("inst/sim/xsave_mask.S"), options(att_syntax)); + } else if #[cfg(feature = "hyper")] { + global_asm!(include_str!("inst/hyper/td.S"), options(att_syntax)); + global_asm!(include_str!("inst/hyper/xsave_mask.S"), options(att_syntax)); + } else { + global_asm!(include_str!("inst/hw/td.S"), options(att_syntax)); + global_asm!(include_str!("inst/hw/xsave_mask.S"), options(att_syntax)); + } +} + +global_asm!(include_str!("asm/sgx_sdk.S"), options(att_syntax)); diff --git a/sgx_trts/src/call/ecall.rs b/sgx_trts/src/call/ecall.rs index e02b40963..f3c5e83dc 100644 --- a/sgx_trts/src/call/ecall.rs +++ b/sgx_trts/src/call/ecall.rs @@ -254,6 +254,15 @@ pub fn ecall(idx: ECallIndex, tcs: &mut Tcs, ms: *mut T, tidx: usize) -> SgxR tc.init(tidx, false)?; } + #[cfg(not(any(feature = "sim", feature = "hyper")))] + { + let tds = tc.tds_mut(); + if tds.aex_notify_flag == 1 { + tds.aex_notify_flag = 0; + let _ = crate::aexnotify::AEXNotify::set(true); + } + } + #[cfg(not(feature = "hyper"))] if is_root_ecall { let _ = crate::pkru::Pkru::write(0); diff --git a/sgx_trts/src/call/mod.rs b/sgx_trts/src/call/mod.rs index 80377b85c..4093fd850 100644 --- a/sgx_trts/src/call/mod.rs +++ b/sgx_trts/src/call/mod.rs @@ -24,6 +24,14 @@ mod ocalloc; #[cfg(feature = "hyper")] pub(crate) use msbuf::MsbufInfo; -pub use ecall::{ecall, ECallIndex, FIRST_ECALL}; -pub use ocall::{ocall, oret, OCallIndex}; -pub use ocalloc::{OcAlloc, OcBuffer}; +pub use ecall::FIRST_ECALL; +#[cfg(not(feature = "use_sgx_sdk"))] +pub use ecall::{ecall, ECallIndex}; +pub use ocall::ocall; +#[cfg(not(feature = "use_sgx_sdk"))] +pub use ocall::oret; +#[cfg(not(all(feature = "use_sgx_sdk", any(feature = "sim", feature = "hyper"))))] +pub use ocall::OCallIndex; +#[cfg(not(any(feature = "sim", feature = "hyper")))] +pub use ocalloc::OcAlloc; +pub use ocalloc::OcBuffer; diff --git a/sgx_trts/src/call/ocall.rs b/sgx_trts/src/call/ocall.rs index 035df1ec4..21d970e65 100644 --- a/sgx_trts/src/call/ocall.rs +++ b/sgx_trts/src/call/ocall.rs @@ -100,6 +100,7 @@ pub fn ocall(idx: OCallIndex, ms: Option<&mut T>) -> SgxResult { } } +#[cfg(not(feature = "use_sgx_sdk"))] #[no_mangle] pub unsafe extern "C" fn update_ocall_lastsp(context: &mut OCallContext) -> usize { let mut tc = tcs::current(); @@ -127,6 +128,13 @@ pub fn oret(ret: usize) -> SgxResult { let mut tc = tcs::current(); let tds = tc.tds_mut(); + + #[cfg(not(any(feature = "sim", feature = "hyper")))] + if tds.aex_notify_flag == 1 { + tds.aex_notify_flag = 0; + let _ = crate::aexnotify::AEXNotify::set(true); + } + let last_sp = tds.last_sp; let context = unsafe { &*(tds.last_sp as *const OCallContext) }; if last_sp == 0 || last_sp <= &context as *const _ as usize { diff --git a/sgx_trts/src/call/ocalloc.rs b/sgx_trts/src/call/ocalloc.rs index 44c6f9da3..903d77d58 100644 --- a/sgx_trts/src/call/ocalloc.rs +++ b/sgx_trts/src/call/ocalloc.rs @@ -129,7 +129,7 @@ impl DerefMut for OcBuffer { #[cfg(not(feature = "hyper"))] mod stack { - use crate::arch::{self, SsaGpr}; + use crate::arch; use crate::enclave; use crate::tcs; use core::alloc::{AllocError, Allocator, Layout}; @@ -166,10 +166,10 @@ mod stack { let align = cmp::min(layout.align(), OcAlloc::OC_MAX_ALIGN); let size = layout.size(); - let tc = tcs::current(); - let tds = tc.tds(); + let mut tc = tcs::current(); + let tds = tc.tds_mut(); - let ssa_gpr = unsafe { &mut *(tds.first_ssa_gpr as *mut SsaGpr) }; + let ssa_gpr = tds.ssa_gpr_mut(); let mut addr = ssa_gpr.rsp_u as usize; // check u_rsp points to the untrusted address. @@ -233,11 +233,12 @@ mod stack { // | xbp_u | // | xsp_u | pub(super) unsafe fn oc_free(&self) -> SgxResult { - let tc = tcs::current(); - let tds = tc.tds(); + let mut tc = tcs::current(); + let tds = tc.tds_mut(); + let last_sp = tds.last_sp; - let ssa_gpr = &mut *(tds.first_ssa_gpr as *mut SsaGpr); - let addr = tds.last_sp - 3 * mem::size_of::(); + let ssa_gpr = tds.ssa_gpr_mut(); + let addr = last_sp - 3 * mem::size_of::(); let usp = *(addr as *const usize); if enclave::is_within_host(usp as *const u8, mem::size_of::()) { diff --git a/sgx_trts/src/capi.rs b/sgx_trts/src/capi.rs index fcfa52ada..17aac995c 100644 --- a/sgx_trts/src/capi.rs +++ b/sgx_trts/src/capi.rs @@ -30,13 +30,11 @@ use core::ptr; use core::slice; use sgx_types::error::SgxStatus; -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_get_enclave_mode() -> i32 { enclave_mode() as i32 } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_register_exception_handler( first: i32, @@ -48,7 +46,6 @@ pub unsafe extern "C" fn sgx_register_exception_handler( } } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_unregister_exception_handler(handle: *const c_void) -> i32 { let handle = Handle::from_raw(handle as u64); @@ -56,67 +53,56 @@ pub unsafe extern "C" fn sgx_unregister_exception_handler(handle: *const c_void) i32::from(result) } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_image_base() -> *const u8 { MmLayout::image_base() as *const u8 } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_image_size() -> usize { MmLayout::image_size() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_elrange_base() -> *const u8 { MmLayout::elrange_base() as *const u8 } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_elrange_size() -> usize { MmLayout::elrange_size() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_heap_base() -> *const u8 { MmLayout::heap_base() as *const u8 } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_heap_size() -> usize { MmLayout::heap_size() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_heap_min_size() -> usize { MmLayout::heap_min_size() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_rsrvmem_base() -> *const u8 { MmLayout::rsrvmem_base() as *const u8 } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_rsrvmem_size() -> usize { MmLayout::rsrvmem_size() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_rsrvmem_min_size() -> usize { MmLayout::rsrvmem_min_size() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_rsrvmm_default_perm() -> u32 { MmLayout::rsrvmm_default_perm() as u32 @@ -128,49 +114,41 @@ pub extern "C" fn sgx_is_enclave_crashed() -> i32 { i32::from(enclave::state::is_crashed()) } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_tcs_max_num() -> usize { tcs_max_num() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_tcs_policy() -> u32 { tcs_policy() as u32 } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_stack_size() -> usize { stack_size() } -#[inline] #[no_mangle] pub extern "C" fn sgx_get_cpu_core_num() -> u32 { cpu_core_num() } -#[inline] #[no_mangle] pub extern "C" fn sgx_is_supported_edmm() -> bool { is_supported_edmm() } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_is_within_enclave(p: *const u8, len: usize) -> i32 { i32::from(enclave::is_within_enclave(p, len)) } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_is_outside_enclave(p: *const u8, len: usize) -> i32 { i32::from(enclave::is_within_host(p, len)) } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_ocall(idx: i32, ms: *mut c_void) -> u32 { if let Ok(index) = OCallIndex::try_from(idx) { @@ -184,7 +162,6 @@ pub unsafe extern "C" fn sgx_ocall(idx: i32, ms: *mut c_void) -> u32 { } } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_ocalloc(size: usize) -> *mut u8 { if let Some(size) = NonZeroUsize::new(size) { @@ -196,7 +173,6 @@ pub unsafe extern "C" fn sgx_ocalloc(size: usize) -> *mut u8 { } } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_ocalloc_aligned(align: usize, size: usize) -> *mut u8 { let size = match NonZeroUsize::new(size) { @@ -212,7 +188,6 @@ pub unsafe extern "C" fn sgx_ocalloc_aligned(align: usize, size: usize) -> *mut .unwrap_or(ptr::null_mut()) } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_ocfree() { if OcBuffer::free().is_err() { @@ -220,13 +195,11 @@ pub unsafe extern "C" fn sgx_ocfree() { } } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_ocremain_size() -> usize { OcBuffer::remain_size() } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_apply_epc_pages(addr: usize, count: usize) -> i32 { if apply_epc_pages(addr, count).is_ok() { @@ -236,7 +209,6 @@ pub unsafe extern "C" fn sgx_apply_epc_pages(addr: usize, count: usize) -> i32 { } } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_trim_epc_pages(addr: usize, count: usize) -> i32 { if trim_epc_pages(addr, count).is_ok() { @@ -247,7 +219,6 @@ pub unsafe extern "C" fn sgx_trim_epc_pages(addr: usize, count: usize) -> i32 { } #[allow(clippy::redundant_closure)] -#[inline] #[no_mangle] pub unsafe extern "C" fn atexit(f: extern "C" fn()) -> i32 { if !enclave::is_within_enclave(f as *const u8, 0) { @@ -262,7 +233,6 @@ pub unsafe extern "C" fn atexit(f: extern "C" fn()) -> i32 { } } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_read_rand(p: *mut u8, len: usize) -> u32 { if p.is_null() || len == 0 { @@ -276,7 +246,6 @@ pub unsafe extern "C" fn sgx_read_rand(p: *mut u8, len: usize) -> u32 { } } -#[inline] #[no_mangle] pub unsafe extern "C" fn get_thread_data() -> *const c_void { current().tds() as *const _ as *const c_void @@ -285,20 +254,17 @@ pub unsafe extern "C" fn get_thread_data() -> *const c_void { pub type sgx_thread_t = *const c_void; pub const SGX_THREAD_T_NULL: *const c_void = ptr::null(); -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_thread_self() -> sgx_thread_t { get_thread_data() } -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_thread_equal(a: sgx_thread_t, b: sgx_thread_t) -> i32 { i32::from(a == b) } #[cfg(not(feature = "hyper"))] -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_rdpkru(val: *mut u32) -> i32 { if val.is_null() { @@ -315,7 +281,6 @@ pub unsafe extern "C" fn sgx_rdpkru(val: *mut u32) -> i32 { } #[cfg(not(feature = "hyper"))] -#[inline] #[no_mangle] pub unsafe extern "C" fn sgx_wrpkru(val: u32) -> i32 { match crate::pkru::Pkru::write(val) { diff --git a/sgx_trts/src/capi_sgx_sdk.rs b/sgx_trts/src/capi_sgx_sdk.rs new file mode 100644 index 000000000..e9954429f --- /dev/null +++ b/sgx_trts/src/capi_sgx_sdk.rs @@ -0,0 +1,30 @@ +// Licensed to the Apache Software Foundation (ASF) under one +// or more contributor license agreements. See the NOTICE file +// distributed with this work for additional information +// regarding copyright ownership. The ASF licenses this file +// to you under the Apache License, Version 2.0 (the +// "License"); you may not use this file except in compliance +// with the License. You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, +// software distributed under the License is distributed on an +// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +// KIND, either express or implied. See the License for the +// specific language governing permissions and limitations +// under the License. + +use crate::enclave::MmLayout; + +#[inline] +#[no_mangle] +pub extern "C" fn sgx_get_image_base() -> *const u8 { + MmLayout::image_base() as *const u8 +} + +#[inline] +#[no_mangle] +pub extern "C" fn sgx_get_heap_base() -> *const u8 { + MmLayout::heap_base() as *const u8 +} \ No newline at end of file diff --git a/sgx_trts/src/edmm/layout.rs b/sgx_trts/src/edmm/layout.rs index 0e109398b..8e5335ac7 100644 --- a/sgx_trts/src/edmm/layout.rs +++ b/sgx_trts/src/edmm/layout.rs @@ -161,4 +161,12 @@ impl<'a> LayoutTable<'a> { false } } + + pub fn is_user_region_exist(&self) -> bool { + if SysFeatures::get().is_edmm() { + self.layout_by_id(arch::LAYOUT_ID_USER_REGION).is_some() + } else { + false + } + } } diff --git a/sgx_trts/src/elf/header.rs b/sgx_trts/src/elf/header.rs index 28c7e7bbd..44c1446a1 100644 --- a/sgx_trts/src/elf/header.rs +++ b/sgx_trts/src/elf/header.rs @@ -24,11 +24,11 @@ use sgx_types::marker::ContiguousMemory; pub fn parse_header<'a>(input: &'a [u8]) -> Result, &'static str> { let size_pt1 = mem::size_of::(); - if input.as_slice().len() < size_pt1 { + if AsSlice::as_slice(input).len() < size_pt1 { return Err("File is shorter than the first ELF header part"); } let header_1: &'a HeaderPt1 = - read(unsafe { input.as_slice().into_slice_unchecked((0, size_pt1)) }); + read(unsafe { AsSlice::as_slice(input).into_slice_unchecked((0, size_pt1)) }); if !slice::eq(&header_1.magic, &MAGIC) { return Err("Did not find ELF magic number"); @@ -38,24 +38,22 @@ pub fn parse_header<'a>(input: &'a [u8]) -> Result, &'static str> { Class::None | Class::Other(_) => return Err("Invalid ELF class"), Class::ThirtyTwo => { let size_pt2 = mem::size_of::>(); - if input.as_slice().len() < size_pt1 + size_pt2 { + if AsSlice::as_slice(input).len() < size_pt1 + size_pt2 { return Err("File is shorter than ELF headers"); } let header_2: &'a HeaderPt2_ = read(unsafe { - input - .as_slice() + AsSlice::as_slice(input) .into_slice_unchecked((size_pt1, size_pt1 + mem::size_of::>())) }); HeaderPt2::Header32(header_2) } Class::SixtyFour => { let size_pt2 = mem::size_of::>(); - if input.as_slice().len() < size_pt1 + size_pt2 { + if AsSlice::as_slice(input).len() < size_pt1 + size_pt2 { return Err("File is shorter than ELF headers"); } let header_2: &'a HeaderPt2_ = read(unsafe { - input - .as_slice() + AsSlice::as_slice(input) .into_slice_unchecked((size_pt1, size_pt1 + mem::size_of::>())) }); HeaderPt2::Header64(header_2) @@ -464,12 +462,12 @@ pub fn sanity_check(file: &ElfFile) -> Result<(), &'static str> { check!( pt2.ph_offset() + (pt2.ph_entry_size() as u64) * (pt2.ph_count() as u64) - <= file.input.as_slice().len() as u64, + <= AsSlice::as_slice(file.input).len() as u64, "program header table out of range" ); check!( pt2.sh_offset() + (pt2.sh_entry_size() as u64) * (pt2.sh_count() as u64) - <= file.input.as_slice().len() as u64, + <= AsSlice::as_slice(file.input).len() as u64, "section header table out of range" ); Ok(()) diff --git a/sgx_trts/src/elf/program.rs b/sgx_trts/src/elf/program.rs index c8a2e05fd..19551ce09 100644 --- a/sgx_trts/src/elf/program.rs +++ b/sgx_trts/src/elf/program.rs @@ -42,10 +42,10 @@ pub fn parse_program_header<'a>( match header.pt1.class() { Class::ThirtyTwo => Ok(ProgramHeader::Ph32(read(unsafe { - input.as_slice().into_slice_unchecked((start, end)) + AsSlice::as_slice(input).into_slice_unchecked((start, end)) }))), Class::SixtyFour => Ok(ProgramHeader::Ph64(read(unsafe { - input.as_slice().into_slice_unchecked((start, end)) + AsSlice::as_slice(input).into_slice_unchecked((start, end)) }))), Class::None | Class::Other(_) => abort(), } @@ -240,7 +240,7 @@ macro_rules! ph_impl { Err(_) => false, }); unsafe { - elf_file.input.as_slice().into_slice_unchecked(( + AsSlice::as_slice(elf_file.input).into_slice_unchecked(( self.physical_addr as usize, (self.physical_addr + self.file_size) as usize, )) diff --git a/sgx_trts/src/elf/slice.rs b/sgx_trts/src/elf/slice.rs index 576acde0f..91c603c8d 100644 --- a/sgx_trts/src/elf/slice.rs +++ b/sgx_trts/src/elf/slice.rs @@ -139,7 +139,7 @@ impl Slice { pub fn eq(&self, other: &[T]) -> bool { let t_len = self.len(); - let other = other.as_slice(); + let other = AsSlice::as_slice(other); if t_len != other.len() { return false; } @@ -179,15 +179,15 @@ pub unsafe fn from_raw_parts_mut<'a, T>(data: *mut T, len: usize) -> &'a mut [T] } pub fn eq(src: &[T], other: &[T]) -> bool { - let t_len = src.as_slice().len(); - if t_len != other.as_slice().len() { + let t_len = AsSlice::as_slice(src).len(); + if t_len != AsSlice::as_slice(other).len() { return false; } unsafe { memcmp( - src.as_slice().as_ptr() as *const u8, - other.as_slice().as_ptr() as *const u8, + AsSlice::as_slice(src).as_ptr() as *const u8, + AsSlice::as_slice(other).as_ptr() as *const u8, mem::size_of::() * t_len, ) } diff --git a/sgx_trts/src/elf/zero.rs b/sgx_trts/src/elf/zero.rs index 29a488df1..cf351004b 100644 --- a/sgx_trts/src/elf/zero.rs +++ b/sgx_trts/src/elf/zero.rs @@ -22,8 +22,8 @@ use core::str::{from_utf8, from_utf8_unchecked}; use sgx_types::marker::ContiguousMemory; pub fn read(input: &[u8]) -> &T { - assert!(mem::size_of::() <= input.as_slice().len()); - let addr = input.as_slice().as_ptr() as usize; + assert!(mem::size_of::() <= AsSlice::as_slice(input).len()); + let addr = AsSlice::as_slice(input).as_ptr() as usize; // Alignment is always a power of 2, so we can use bit ops instead of a mod here. assert!((addr & (mem::align_of::() - 1)) == 0); @@ -33,8 +33,8 @@ pub fn read(input: &[u8]) -> &T { pub fn read_array(input: &[u8]) -> &[T] { let t_size = mem::size_of::(); assert!(t_size > 0, "Can't read arrays of zero-sized types"); - assert!(input.as_slice().len() % t_size == 0); - let addr = input.as_slice().as_ptr() as usize; + assert!(AsSlice::as_slice(input).len() % t_size == 0); + let addr = AsSlice::as_slice(input).as_ptr() as usize; assert!(addr & (mem::align_of::() - 1) == 0); unsafe { read_array_unsafe(input) } @@ -45,12 +45,12 @@ pub fn read_str(input: &[u8]) -> &str { } unsafe fn read_unsafe(input: &[u8]) -> &T { - &*(input.as_slice().as_ptr() as *const T) + &*(AsSlice::as_slice(input).as_ptr() as *const T) } unsafe fn read_array_unsafe(input: &[u8]) -> &[T] { - let ptr = input.as_slice().as_ptr() as *const T; - slice::from_raw_parts(ptr, input.as_slice().len() / mem::size_of::()) + let ptr = AsSlice::as_slice(input).as_ptr() as *const T; + slice::from_raw_parts(ptr, AsSlice::as_slice(input).len() / mem::size_of::()) } unsafe fn read_str_unsafe(input: &[u8]) -> &str { diff --git a/sgx_trts/src/enclave/entry.rs b/sgx_trts/src/enclave/entry.rs index f4250ccdd..ae758ca56 100644 --- a/sgx_trts/src/enclave/entry.rs +++ b/sgx_trts/src/enclave/entry.rs @@ -70,16 +70,11 @@ pub unsafe extern "C" fn enter_enclave(index: u64, ms: usize, tcs: *mut Tcs, css _ => Err(SgxStatus::Unexpected), } } else if cssa == 1 { - match ecall { - ECallIndex::Except => { - let mut result = veh::handle(tcs); - if !tc::check_static_stack_guard(tcs) { - result = Err(SgxStatus::StackOverRun); - } - result - } - _ => Err(SgxStatus::Unexpected), + let mut result = veh::handle(tcs); + if !tc::check_static_stack_guard(tcs) { + result = Err(SgxStatus::StackOverRun); } + result } else { Err(SgxStatus::Unexpected) }; diff --git a/sgx_trts/src/enclave/init.rs b/sgx_trts/src/enclave/init.rs index d320970a8..f7203da26 100644 --- a/sgx_trts/src/enclave/init.rs +++ b/sgx_trts/src/enclave/init.rs @@ -28,12 +28,15 @@ use core::ffi::c_void; use core::ptr; use core::ptr::NonNull; use core::slice; +#[cfg(not(feature = "use_sgx_sdk"))] use sgx_crypto_sys::sgx_init_crypto_lib; +#[cfg(not(feature = "use_sgx_sdk"))] use sgx_tlibc_sys::{sgx_heap_init, sgx_init_string_lib}; use sgx_types::error::{SgxResult, SgxStatus}; use sgx_types::marker::ContiguousMemory; use sgx_types::types::EnclaveId; +#[cfg(not(feature = "use_sgx_sdk"))] #[allow(unused_variables)] #[link_section = ".nipx"] pub fn rtinit(tcs: &mut Tcs, ms: *mut SystemFeatures, tidx: usize) -> SgxResult { @@ -96,6 +99,13 @@ pub fn rtinit(tcs: &mut Tcs, ms: *mut SystemFeatures, tidx: usize) -> SgxResult Ok(()) } +#[cfg(feature = "use_sgx_sdk")] +#[no_mangle] +pub extern "C" fn rtinit_with_sgx_sdk() { + mem::Image::init(); + let _ = SysFeatures::init_from_sgx_sdk(); +} + pub fn ctors() -> SgxResult { if let Some(init_array) = parse::init_array()? { let fn_array = init_array.get_array(); diff --git a/sgx_trts/src/enclave/mem.rs b/sgx_trts/src/enclave/mem.rs index 018c861cb..a820acc87 100644 --- a/sgx_trts/src/enclave/mem.rs +++ b/sgx_trts/src/enclave/mem.rs @@ -90,6 +90,16 @@ impl MmLayout { pub fn rsrvmm_default_perm() -> ProtectPerm { RsrvMem::get_or_init().perm } + + #[inline] + pub fn user_region_mem_base() -> usize { + UserRegionMem::get_or_init().base + } + + #[inline] + pub fn user_region_mem_size() -> usize { + UserRegionMem::get_or_init().size + } } #[derive(Clone, Copy, Default, Debug)] @@ -101,8 +111,11 @@ pub struct Image { pub entry_address: usize, } +#[cfg(not(feature = "use_sgx_sdk"))] #[link_section = ".data.rel.ro"] static mut IMAGE: MaybeUninit = MaybeUninit::uninit(); +#[cfg(feature = "use_sgx_sdk")] +static mut IMAGE: MaybeUninit = MaybeUninit::uninit(); impl Image { pub fn init() { @@ -145,7 +158,13 @@ impl Image { #[inline] fn elrange_size() -> usize { - arch::Global::get().elrange_size as usize + let global_data = arch::Global::get(); + + if global_data.elrange_size != 0 { + global_data.elrange_size as usize + } else { + global_data.enclave_size + } } #[inline] @@ -344,6 +363,58 @@ impl RsrvMem { } } +pub struct UserRegionMem { + pub base: usize, + pub size: usize, +} + +static mut USER_REGION_MEM: Option = None; + +impl UserRegionMem { + pub fn get_or_init() -> &'static UserRegionMem { + unsafe { + if let Some(ref user_region_mem) = USER_REGION_MEM { + user_region_mem + } else { + let (base, size) = Self::layout(); + USER_REGION_MEM = Some(UserRegionMem { base, size }); + USER_REGION_MEM.as_ref().unwrap() + } + } + } + + fn layout() -> (usize, usize) { + if SysFeatures::get().is_edmm() { + let layout_table = arch::Global::get().layout_table(); + layout_table + .iter() + .find(|layout| unsafe { layout.entry.id == arch::LAYOUT_ID_USER_REGION }) + .map(|layout| unsafe { + ( + MmLayout::image_base() + layout.entry.rva as usize, + (layout.entry.page_count as usize) << arch::SE_PAGE_SHIFT, + ) + }) + .unwrap_or((0, 0)) + } else { + (0, 0) + } + } + + pub fn check(&self) -> bool { + if self.base == 0 { + return true; + } + if !(is_page_aligned!(self.base) && is_page_aligned!(self.size)) { + return false; + } + if self.size > usize::MAX - self.base { + return false; + } + true + } +} + pub fn is_within_enclave(p: *const u8, len: usize) -> bool { let start = p as usize; let end = if len > 0 { diff --git a/sgx_trts/src/enclave/mod.rs b/sgx_trts/src/enclave/mod.rs index a6207b6c7..5f91eb307 100644 --- a/sgx_trts/src/enclave/mod.rs +++ b/sgx_trts/src/enclave/mod.rs @@ -18,6 +18,7 @@ #![allow(unused_imports)] mod atexit; +#[cfg(not(feature = "use_sgx_sdk"))] mod entry; mod init; mod mem; @@ -27,6 +28,8 @@ pub mod parse; pub mod state; pub use atexit::{at_exit, cleanup}; -pub use init::{ctors, global_init, rtinit}; +pub use init::{ctors, global_init}; +#[cfg(not(feature = "use_sgx_sdk"))] +pub use init::rtinit; pub use mem::{is_within_enclave, is_within_host, EnclaveRange, MmLayout}; pub use uninit::{global_exit, rtuninit, UNINIT_FLAG}; diff --git a/sgx_trts/src/enclave/parse.rs b/sgx_trts/src/enclave/parse.rs index 470c6b133..1eef7bf64 100644 --- a/sgx_trts/src/enclave/parse.rs +++ b/sgx_trts/src/enclave/parse.rs @@ -79,7 +79,7 @@ pub fn relocate() -> SgxResult { let mut plt_size = 0_u64; match segment { - SegmentData::Dynamic64(dyns) => dyns.as_slice().iter().all(|d| { + SegmentData::Dynamic64(dyns) => AsSlice::as_slice(dyns).iter().all(|d| { let tag = try_result_bool!(d.get_tag()); match tag { DynTag::Null => return false, @@ -300,25 +300,23 @@ fn get_sym<'a>(symtabl: *const u8, idx: u32) -> Option<&'a DynEntry64> { } unsafe fn relocate_elf_rela(elf: &ElfFile, sym_offset: u64, rel_offset: u64, rel_size: u64) { - let sym_table = (elf.input.as_slice().as_ptr() as usize + sym_offset as usize) as *const u8; - let rel_raw = elf - .input - .as_slice() + let sym_table = (AsSlice::as_slice(elf.input).as_ptr() as usize + sym_offset as usize) as *const u8; + let rel_raw = AsSlice::as_slice(elf.input) .into_slice_unchecked((rel_offset as usize, (rel_offset + rel_size) as usize)); let rel_array = Rela64Array::new(read_array(rel_raw)); - rel_array.get_array().as_slice().iter().for_each(|rel| { + AsSlice::as_slice(rel_array.get_array()).iter().for_each(|rel| { let reloc_addr = - (elf.input.as_slice().as_ptr() as usize + rel.get_offset() as usize) as *mut u64; + (AsSlice::as_slice(elf.input).as_ptr() as usize + rel.get_offset() as usize) as *mut u64; match rel.get_type() { sections::R_X86_64_RELATIVE => { - *reloc_addr = elf.input.as_slice().as_ptr() as u64 + rel.get_addend(); + *reloc_addr = AsSlice::as_slice(elf.input).as_ptr() as u64 + rel.get_addend(); } sections::R_X86_64_GLOB_DAT | sections::R_X86_64_JMP_SLOT | sections::R_X86_64_64 => { if let Some(sym) = get_sym(sym_table, rel.get_symbol_table_index()) { *reloc_addr = - elf.input.as_slice().as_ptr() as u64 + sym.value() + rel.get_addend(); + AsSlice::as_slice(elf.input).as_ptr() as u64 + sym.value() + rel.get_addend(); } } sections::R_X86_64_DTPMOD64 => *reloc_addr = 1_u64, diff --git a/sgx_trts/src/enclave/state.rs b/sgx_trts/src/enclave/state.rs index 4c6fed3d0..3a5d1febf 100644 --- a/sgx_trts/src/enclave/state.rs +++ b/sgx_trts/src/enclave/state.rs @@ -77,12 +77,17 @@ pub fn lock_state() -> State { const IN_PROGRESS: u32 = 1; let state = unsafe { - let (state, _) = core::intrinsics::atomic_cxchg_seqcst_seqcst( - &mut ENCLAVE_STATE, + use core::sync::atomic::{AtomicU32, Ordering}; + let ptr = &ENCLAVE_STATE as *const u32 as *const AtomicU32; + match (*ptr).compare_exchange( NOT_STARTED, IN_PROGRESS, - ); - state + Ordering::SeqCst, + Ordering::SeqCst, + ) { + Ok(v) => v, + Err(v) => v, + } }; match state { 0 => State::NotStarted, diff --git a/sgx_trts/src/error.rs b/sgx_trts/src/error.rs index b93820bbd..06fb1905e 100644 --- a/sgx_trts/src/error.rs +++ b/sgx_trts/src/error.rs @@ -15,15 +15,22 @@ // specific language governing permissions and limitations // under the License. +#[cfg(not(feature = "use_sgx_sdk"))] use crate::arch::Tds; use crate::enclave::state::{self, State}; +#[cfg(not(feature = "use_sgx_sdk"))] use crate::tcs::tc; +#[cfg(not(feature = "use_sgx_sdk"))] #[no_mangle] pub extern "C" fn get_errno_addr() -> *mut i32 { let tds = unsafe { Tds::from_raw_mut(tc::get_tds()) }; &mut tds.last_error as *mut usize as *mut i32 } +#[cfg(feature = "use_sgx_sdk")] +extern "C" { + fn get_errno_addr() -> *mut i32; +} pub fn errno() -> i32 { unsafe { *get_errno_addr() } @@ -33,8 +40,15 @@ pub fn set_errno(e: i32) { unsafe { *get_errno_addr() = e } } +#[cfg(not(feature = "use_sgx_sdk"))] #[no_mangle] pub extern "C" fn abort() -> ! { state::set_state(State::Crashed); core::intrinsics::abort() } + +#[cfg(feature = "use_sgx_sdk")] +pub fn abort() -> ! { + state::set_state(State::Crashed); + core::intrinsics::abort() +} diff --git a/sgx_trts/src/feature/mod.rs b/sgx_trts/src/feature/mod.rs index 7e19328bc..31649d7a0 100644 --- a/sgx_trts/src/feature/mod.rs +++ b/sgx_trts/src/feature/mod.rs @@ -87,6 +87,14 @@ macro_rules! is_x86_feature_detected { ("bmi") => { $crate::feature::check_for($crate::feature::Feature::bmi) }; + // although bmi1 should be an alias for bmi, and bmi2 always present + // on Intel processors if bmi1 is, it seems unreliable + ("bmi1") => { + false + }; + ("bmi2") => { + false + }; ("lzcnt") => { $crate::feature::check_for($crate::feature::Feature::lzcnt) }; @@ -195,6 +203,10 @@ macro_rules! is_x86_feature_detected { ("pconfig") => { $crate::feature::check_for($crate::feature::Feature::pconfig) }; + // surely supported on SGX2 platforms (that we require) + ("cmpxchg16b") => { + true + }; ($t:tt,) => { is_x86_feature_detected!($t); }; diff --git a/sgx_trts/src/feature/sys.rs b/sgx_trts/src/feature/sys.rs index bb19469c8..71429a7d5 100644 --- a/sgx_trts/src/feature/sys.rs +++ b/sgx_trts/src/feature/sys.rs @@ -39,6 +39,7 @@ impl_enum! { Sdk2_1 = 2, Sdk2_2 = 3, Sdk2_3 = 4, + Sdk3_0 = 5, } } @@ -60,8 +61,10 @@ pub struct SystemFeatures { unsafe impl ContiguousMemory for SystemFeatures {} impl SystemFeatures { + const SYS_FEATURE_MSB: u64 = 63; const SYS_FEATURE_EXTEND: u64 = 62; const EDMM_ENABLE_BIT: u64 = 1; + const AEX_NOTIFY_BIT: u64 = 2; pub unsafe fn from_raw(features: NonNull) -> SgxResult { ensure!(features.as_ref().is_host_range(), SgxStatus::Unexpected); @@ -99,11 +102,18 @@ impl SystemFeatures { pub fn is_edmm(&self) -> bool { match self.version { - 0 => false, + 0 | 1 | 2 | 3 | 4 => false, _ => (self.system_feature_set[0] & SystemFeatures::EDMM_ENABLE_BIT) != 0, } } + pub fn is_aexnotify(&self) -> bool { + match self.version { + 0 | 1 | 2 | 3 | 4 => false, + _ => (self.system_feature_set[0] & SystemFeatures::AEX_NOTIFY_BIT) != 0, + } + } + pub fn cpu_features_bit(&self, xfrm: u64) -> SgxResult { const XFEATURE_ENABLED_AVX: u64 = 0x06; const XFEATURE_ENABLED_AVX3: u64 = 0xE0; @@ -204,10 +214,12 @@ pub struct SysFeatures { cpu_core_num: u32, cpuinfo_table: [[u32; 4]; 8], is_edmm: bool, + is_aexnotify: bool, } unsafe impl ContiguousMemory for SysFeatures {} +#[cfg(not(feature = "use_sgx_sdk"))] #[link_section = ".data.rel.ro"] static mut SYS_FEATURES: SysFeatures = SysFeatures { version: Version::Sdk1_5, @@ -216,13 +228,33 @@ static mut SYS_FEATURES: SysFeatures = SysFeatures { cpu_core_num: 0, cpuinfo_table: [[0; 4]; 8], is_edmm: false, + is_aexnotify: false, +}; +#[cfg(feature = "use_sgx_sdk")] +static mut SYS_FEATURES: SysFeatures = SysFeatures { + version: Version::Sdk1_5, + xfrm: types::XFRM_LEGACY, + cpu_features: 0, + cpu_core_num: 0, + cpuinfo_table: [[0; 4]; 8], + is_edmm: false, + is_aexnotify: false, }; // Improve compatibility // e.g. intel-sgx-ssl handles CPUID with this global variable. +#[cfg(not(feature = "use_sgx_sdk"))] #[link_section = ".data.rel.ro"] #[no_mangle] pub static mut g_cpu_feature_indicator: u64 = 0; +#[cfg(feature = "use_sgx_sdk")] +extern "C" { + static mut g_cpu_feature_indicator: u64; + static g_sdk_version: u32; + static g_cpu_core_num: u32; + static EDMM_supported: i32; + static g_aexnotify_supported: i32; +} impl SysFeatures { pub fn init(raw: NonNull) -> SgxResult<&'static SysFeatures> { @@ -230,11 +262,17 @@ impl SysFeatures { let version = Version::try_from(raw.version).map_err(|_| SgxStatus::Unexpected)?; let feature = unsafe { SysFeatures::get_mut() }; + match version { + Version::Sdk1_5 | Version::Sdk3_0 => (), + _ => return Err(SgxStatus::Unexpected), + }; + feature.version = version; feature.xfrm = xsave::get_xfrm(); feature.cpu_core_num = raw.cpu_core_num; feature.cpuinfo_table = raw.cpuinfo_table; feature.is_edmm = raw.is_edmm(); + feature.is_aexnotify = raw.is_aexnotify(); feature.cpu_features = raw.cpu_features_bit(feature.xfrm)?; unsafe { @@ -243,6 +281,28 @@ impl SysFeatures { Ok(SysFeatures::get()) } + #[cfg(feature = "use_sgx_sdk")] + pub fn init_from_sgx_sdk() -> SgxResult<&'static SysFeatures> { + unsafe { + let version = Version::try_from(g_sdk_version).map_err(|_| SgxStatus::Unexpected)?; + let feature = SysFeatures::get_mut(); + + match version { + Version::Sdk1_5 | Version::Sdk3_0 => (), + _ => return Err(SgxStatus::Unexpected), + }; + + feature.version = version; + feature.xfrm = xsave::get_xfrm(); + feature.cpu_core_num = g_cpu_core_num; + feature.is_edmm = EDMM_supported != 0; + feature.is_aexnotify = g_aexnotify_supported != 0; + feature.cpu_features = g_cpu_feature_indicator; + } + + Ok(SysFeatures::get()) + } + #[inline] pub fn get() -> &'static SysFeatures { unsafe { &SYS_FEATURES } @@ -258,6 +318,11 @@ impl SysFeatures { self.is_edmm } + #[inline] + pub fn is_aexnotify(&self) -> bool { + self.is_aexnotify + } + #[inline] pub fn version(&self) -> Version { self.version diff --git a/sgx_trts/src/inst/hw/aexnotify.S b/sgx_trts/src/inst/hw/aexnotify.S new file mode 100644 index 000000000..9eed8df8f --- /dev/null +++ b/sgx_trts/src/inst/hw/aexnotify.S @@ -0,0 +1,59 @@ +/* Licensed to the Apache Software Foundation (ASF) under one + or more contributor license agreements. See the NOTICE file + distributed with this work for additional information + regarding copyright ownership. The ASF licenses this file + to you under the Apache License, Version 2.0 (the + "License"); you may not use this file except in compliance + with the License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, + software distributed under the License is distributed on an + "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + KIND, either express or implied. See the License for the + specific language governing permissions and limitations + under the License.. */ + +.file "aexnotify.S" + +DECLARE_LOCAL_FUNC second_phase + movq %rsi, %rsp + mov $SE_EDECCSSA, %rax + ENCLU /* DECCSSA */ + jmp *%rdx + +.macro DISABLE_AEXNOTIFY_ECALL + mov -3*SE_WORDSIZE(%rbp), %rax /* cssa */ + cmp $0, %rax + jne .Lrestore_untrust_stack + + mov %gs:0, %rax /* read td data */ + cmp $0, %rax /* check if td is initialized */ + je .Lrestore_untrust_stack + mov first_ssa_gpr(%rax), %rdx + movb aex_notify(%rdx), %cl + cmpb $0, %cl + je .Lrestore_untrust_stack + /* + * clear aexnotify bit to disable aexnotify temporarily and + * set td.aex_notify_flag to indicate aexnotify is enabled + * before EEXIT + */ + movb $0, aex_notify(%rdx) + movl $0x1, aex_notify_flag(%rax) +.endm + +.macro DISABLE_AEXNOTIFY_OCALL + movb aex_notify(%rdx), %cl + cmpb $0, %cl + je .Lrestore_outside_stack + + /* + * clear aexnotify to disable aexnotify temporarily and + * set td.aex_notify_flag to indicate aexnotify is enabled + * before EEXIT + */ + movb $0, aex_notify(%rdx) + movl $0x1, aex_notify_flag(%rbx) +.endm diff --git a/sgx_trts/src/inst/hw/inst.rs b/sgx_trts/src/inst/hw/inst.rs index a15845e50..dcebdef81 100644 --- a/sgx_trts/src/inst/hw/inst.rs +++ b/sgx_trts/src/inst/hw/inst.rs @@ -44,9 +44,15 @@ impl EncluInst { pub fn everify_report2(r: &AlignReport2Mac) -> Result<(), u32> { extern "C" { + #[cfg(not(feature = "use_sgx_sdk"))] fn everifyreport2(r: *const AlignReport2Mac) -> u32; + #[cfg(feature = "use_sgx_sdk")] + fn do_everifyreport2(r: *const AlignReport2Mac) -> u32; } + #[cfg(not(feature = "use_sgx_sdk"))] let error = unsafe { everifyreport2(r) }; + #[cfg(feature = "use_sgx_sdk")] + let error = unsafe { do_everifyreport2(r) }; if error == 0 { Ok(()) } else { @@ -94,6 +100,26 @@ impl EncluInst { } } + pub fn eacceptcopy(info: &SecInfo, addr: usize, source: usize) -> Result<(), u32> { + unsafe { + let error; + asm!( + "xchg rbx, {0}", + "enclu", + "mov rbx, {0}", + inout(reg) info => _, + inlateout("eax") Enclu::EAccept as u32 => error, + in("rcx") addr, + in("rdx") source, + options(nostack), + ); + match error { + 0 => Ok(()), + _ => Err(error), + } + } + } + pub fn emodpe(info: &SecInfo, addr: usize) -> Result<(), u32> { unsafe { asm!( diff --git a/sgx_trts/src/inst/hyper/aexnotify.S b/sgx_trts/src/inst/hyper/aexnotify.S new file mode 100644 index 000000000..4871ce873 --- /dev/null +++ b/sgx_trts/src/inst/hyper/aexnotify.S @@ -0,0 +1,24 @@ +/* Licensed to the Apache Software Foundation (ASF) under one + or more contributor license agreements. See the NOTICE file + distributed with this work for additional information + regarding copyright ownership. The ASF licenses this file + to you under the Apache License, Version 2.0 (the + "License"); you may not use this file except in compliance + with the License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, + software distributed under the License is distributed on an + "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + KIND, either express or implied. See the License for the + specific language governing permissions and limitations + under the License.. */ + +.file "aexnotify.S" + +.macro DISABLE_AEXNOTIFY_ECALL +.endm + +.macro DISABLE_AEXNOTIFY_OCALL +.endm diff --git a/sgx_trts/src/inst/hyper/inst.rs b/sgx_trts/src/inst/hyper/inst.rs index 206577d03..b1c1a86ab 100644 --- a/sgx_trts/src/inst/hyper/inst.rs +++ b/sgx_trts/src/inst/hyper/inst.rs @@ -97,6 +97,11 @@ impl EncluInst { Ok(()) } + #[inline] + pub fn eacceptcopy(_info: &SecInfo, _addr: usize, _source: usize) -> Result<(), u32> { + Ok(()) + } + #[inline] pub fn emodpe(_info: &SecInfo, _addr: usize) -> Result<(), u32> { Ok(()) diff --git a/sgx_trts/src/inst/sim/aexnotify.S b/sgx_trts/src/inst/sim/aexnotify.S new file mode 100644 index 000000000..4871ce873 --- /dev/null +++ b/sgx_trts/src/inst/sim/aexnotify.S @@ -0,0 +1,24 @@ +/* Licensed to the Apache Software Foundation (ASF) under one + or more contributor license agreements. See the NOTICE file + distributed with this work for additional information + regarding copyright ownership. The ASF licenses this file + to you under the Apache License, Version 2.0 (the + "License"); you may not use this file except in compliance + with the License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, + software distributed under the License is distributed on an + "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + KIND, either express or implied. See the License for the + specific language governing permissions and limitations + under the License.. */ + +.file "aexnotify.S" + +.macro DISABLE_AEXNOTIFY_ECALL +.endm + +.macro DISABLE_AEXNOTIFY_OCALL +.endm diff --git a/sgx_trts/src/inst/sim/derive.rs b/sgx_trts/src/inst/sim/derive.rs index 0439d6bae..a87e268a1 100644 --- a/sgx_trts/src/inst/sim/derive.rs +++ b/sgx_trts/src/inst/sim/derive.rs @@ -18,7 +18,17 @@ use crate::arch::Align16; use crate::error::abort; use crate::se::AlignKey; +#[cfg(not(feature = "use_sgx_sdk"))] use sgx_crypto_sys::sgx_rijndael128_cmac_msg; +#[cfg(feature = "use_sgx_sdk")] +extern "C" { + pub fn sgx_rijndael128_cmac_msg( + p_key: *const Key128bit, + p_src: *const u8, + src_len: u32, + p_mac: *mut sgx_types::types::Mac128bit, + ) -> sgx_types::error::SgxStatus; +} use sgx_types::types::{ Attributes, ConfigId, CpuSvn, IsvExtProdId, IsvFamilyId, Key128bit, KeyId, KeyName, KeyPolicy, Mac, Measurement, MiscSelect, diff --git a/sgx_trts/src/inst/sim/inst.rs b/sgx_trts/src/inst/sim/inst.rs index a421183d2..67dd2a785 100644 --- a/sgx_trts/src/inst/sim/inst.rs +++ b/sgx_trts/src/inst/sim/inst.rs @@ -408,6 +408,11 @@ impl EncluInst { Ok(()) } + #[inline] + pub fn eacceptcopy(_info: &SecInfo, _addr: usize, _source: usize) -> Result<(), u32> { + Ok(()) + } + #[inline] pub fn emodpe(_info: &SecInfo, _addr: usize) -> Result<(), u32> { Ok(()) diff --git a/sgx_trts/src/inst/sim/mod.rs b/sgx_trts/src/inst/sim/mod.rs index ca2dda4e3..4d638c57c 100644 --- a/sgx_trts/src/inst/sim/mod.rs +++ b/sgx_trts/src/inst/sim/mod.rs @@ -19,6 +19,7 @@ use crate::arch::{Enclu, SecInfo, Secs, Tcs}; use crate::error::abort; use crate::se::{AlignKey, AlignKeyRequest, AlignReport, AlignReportData, AlignTargetInfo}; use core::convert::TryFrom; +#[cfg(not(feature = "use_sgx_sdk"))] use core::ptr; use core::sync::atomic::AtomicUsize; use inst::EncluInst; @@ -86,6 +87,7 @@ pub struct GlobalSim { pub seed: u64, } +#[cfg(not(feature = "use_sgx_sdk"))] #[no_mangle] pub static mut g_global_data_sim: GlobalSim = GlobalSim { secs: ptr::null(), @@ -93,6 +95,11 @@ pub static mut g_global_data_sim: GlobalSim = GlobalSim { seed: 0, }; +#[cfg(feature = "use_sgx_sdk")] +extern "C" { + pub static mut g_global_data_sim: GlobalSim; +} + impl GlobalSim { #[inline] pub fn get() -> &'static GlobalSim { diff --git a/sgx_trts/src/lib.rs b/sgx_trts/src/lib.rs index 03e7fbf44..cac30db51 100644 --- a/sgx_trts/src/lib.rs +++ b/sgx_trts/src/lib.rs @@ -19,20 +19,19 @@ #![no_std] #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] +#![allow(internal_features)] #![feature(allocator_api)] #![feature(const_trait_impl)] #![feature(core_intrinsics)] -#![feature(extract_if)] -#![feature(maybe_uninit_uninit_array)] #![feature(min_specialization)] #![feature(negative_impls)] #![feature(never_type)] #![feature(ptr_internals)] #![feature(thread_local)] -#![cfg_attr(feature = "sim", feature(unchecked_math))] #![allow(clippy::missing_safety_doc)] #![allow(dead_code)] #![allow(non_camel_case_types)] +#![allow(static_mut_refs)] #[cfg(all(feature = "sim", feature = "hyper"))] compile_error!("feature \"sim\" and feature \"hyper\" cannot be enabled at the same time"); @@ -41,16 +40,22 @@ extern crate alloc; #[macro_use] extern crate sgx_types; +#[cfg(not(feature = "use_sgx_sdk"))] extern crate sgx_crypto_sys; +#[cfg(not(feature = "use_sgx_sdk"))] extern crate sgx_tlibc_sys; #[macro_use] mod arch; +#[cfg(not(feature = "use_sgx_sdk"))] mod asm; +#[cfg(feature = "use_sgx_sdk")] +mod asm_sgx_sdk; mod call; #[macro_use] mod elf; mod enclave; + mod inst; #[cfg(not(feature = "hyper"))] mod pkru; @@ -58,9 +63,14 @@ mod stackchk; mod version; mod xsave; +#[cfg(not(feature = "use_sgx_sdk"))] pub mod capi; -pub mod edmm; +#[cfg(feature = "use_sgx_sdk")] +pub mod capi_sgx_sdk; +#[cfg(not(any(feature = "sim", feature = "hyper")))] +pub mod aexnotify; +pub mod edmm; pub mod error; #[macro_use] pub mod feature; diff --git a/sgx_trts/src/rand.rs b/sgx_trts/src/rand.rs index fe0aeaaa6..17226c1cf 100644 --- a/sgx_trts/src/rand.rs +++ b/sgx_trts/src/rand.rs @@ -147,17 +147,17 @@ impl Default for Rng { fn next_u32(fill_buf: &mut dyn FnMut(&mut [u8])) -> u32 { let mut buf = [0_u8; 4]; fill_buf(&mut buf); - unsafe { mem::transmute::<[u8; 4], u32>(buf) } + u32::from_ne_bytes(buf) } fn next_u64(fill_buf: &mut dyn FnMut(&mut [u8])) -> u64 { let mut buf = [0_u8; 8]; fill_buf(&mut buf); - unsafe { mem::transmute::<[u8; 8], u64>(buf) } + u64::from_ne_bytes(buf) } fn next_usize(fill_buf: &mut dyn FnMut(&mut [u8])) -> usize { let mut buf = [0_u8; mem::size_of::()]; fill_buf(&mut buf); - unsafe { mem::transmute::<[u8; mem::size_of::()], usize>(buf) } + usize::from_ne_bytes(buf) } diff --git a/sgx_trts/src/se/report.rs b/sgx_trts/src/se/report.rs index e217f65a2..4f3a04acc 100644 --- a/sgx_trts/src/se/report.rs +++ b/sgx_trts/src/se/report.rs @@ -31,8 +31,10 @@ use sgx_types::types::{ }; use sgx_types::types::{ CONFIGID_SIZE, CPUSVN_SIZE, HASH_SIZE, ISVEXT_PROD_ID_SIZE, ISV_FAMILY_ID_SIZE, KEYID_SIZE, - MAC_SIZE, REPORT_BODY_RESERVED1_BYTES, REPORT_BODY_RESERVED2_BYTES, - REPORT_BODY_RESERVED3_BYTES, REPORT_BODY_RESERVED4_BYTES, REPORT_DATA_SIZE, + MAC_SIZE, REPORT2_MAC_RESERVED1_BYTES, REPORT2_MAC_RESERVED2_BYTES, + REPORT_BODY_RESERVED1_BYTES, REPORT_BODY_RESERVED2_BYTES, REPORT_BODY_RESERVED3_BYTES, + REPORT_BODY_RESERVED4_BYTES, REPORT_DATA_SIZE, TEE_REPORT2_SUBTYPE, TEE_REPORT2_TYPE, + TEE_REPORT2_VERSION, TEE_REPORT2_VERSION_SERVICETD, }; #[repr(C, align(128))] @@ -149,6 +151,22 @@ impl AlignReport { impl AlignReport2Mac { pub fn verify(&self) -> SgxResult { ensure!(self.is_enclave_range(), SgxStatus::InvalidParameter); + ensure!( + self.0.report_type.report_type == TEE_REPORT2_TYPE, + SgxStatus::InvalidParameter + ); + ensure!( + self.0.report_type.subtype == TEE_REPORT2_SUBTYPE + && (self.0.report_type.version == TEE_REPORT2_VERSION + || self.0.report_type.version == TEE_REPORT2_VERSION_SERVICETD), + SgxStatus::InvalidParameter + ); + ensure!( + self.0.report_type.reserved == 0 + && self.0.reserved1 == [0; REPORT2_MAC_RESERVED1_BYTES] + && self.0.reserved2 == [0; REPORT2_MAC_RESERVED2_BYTES], + SgxStatus::InvalidParameter + ); EncluInst::everify_report2(self).map_err(|e| match e { inst::INVALID_REPORTMACSTRUCT => SgxStatus::MacMismatch, diff --git a/sgx_trts/src/sync/lazy.rs b/sgx_trts/src/sync/lazy.rs index 9c3250ad8..a596771f1 100644 --- a/sgx_trts/src/sync/lazy.rs +++ b/sgx_trts/src/sync/lazy.rs @@ -66,7 +66,7 @@ impl PartialEq for OnceCell { impl Eq for OnceCell {} -impl const From for OnceCell { +impl From for OnceCell { /// Creates a new `OnceCell` which already contains the given `value`. fn from(value: T) -> Self { OnceCell { diff --git a/sgx_trts/src/sync/mutex.rs b/sgx_trts/src/sync/mutex.rs index 865a320c8..d390eb7bb 100644 --- a/sgx_trts/src/sync/mutex.rs +++ b/sgx_trts/src/sync/mutex.rs @@ -93,7 +93,7 @@ impl SpinMutex { } #[inline] - pub fn try_lock(&self) -> Option> { + pub fn try_lock(&self) -> Option> { if self .lock .compare_exchange(false, true, Ordering::Acquire, Ordering::Relaxed) diff --git a/sgx_trts/src/sync/once.rs b/sgx_trts/src/sync/once.rs index 90f355386..d706bb83c 100644 --- a/sgx_trts/src/sync/once.rs +++ b/sgx_trts/src/sync/once.rs @@ -38,7 +38,7 @@ impl Once { } } - pub fn lock(&self) -> SpinMutexGuard<()> { + pub fn lock(&self) -> SpinMutexGuard<'_, ()> { self.lock.lock() } diff --git a/sgx_trts/src/sync/rwlock.rs b/sgx_trts/src/sync/rwlock.rs index 1c629c44c..a4e0c194a 100644 --- a/sgx_trts/src/sync/rwlock.rs +++ b/sgx_trts/src/sync/rwlock.rs @@ -74,7 +74,7 @@ impl SpinRwLock { impl SpinRwLock { #[inline] - pub fn read(&self) -> SpinRwLockReadGuard { + pub fn read(&self) -> SpinRwLockReadGuard<'_, T> { loop { match self.try_read() { Some(guard) => return guard, @@ -84,7 +84,7 @@ impl SpinRwLock { } #[inline] - pub fn write(&self) -> SpinRwLockWriteGuard { + pub fn write(&self) -> SpinRwLockWriteGuard<'_, T> { loop { match self.try_write_internal(false) { Some(guard) => return guard, @@ -94,7 +94,7 @@ impl SpinRwLock { } #[inline] - pub fn try_read(&self) -> Option> { + pub fn try_read(&self) -> Option> { let value = self.lock.fetch_add(READER, Ordering::Acquire); if value & WRITER != 0 { self.lock.fetch_sub(READER, Ordering::Release); @@ -108,12 +108,12 @@ impl SpinRwLock { } #[inline] - pub fn try_write(&self) -> Option> { + pub fn try_write(&self) -> Option> { self.try_write_internal(true) } #[inline(always)] - fn try_write_internal(&self, strong: bool) -> Option> { + fn try_write_internal(&self, strong: bool) -> Option> { if compare_exchange( &self.lock, 0, diff --git a/sgx_trts/src/tcs/tc.rs b/sgx_trts/src/tcs/tc.rs index 56f947b7a..6ab943f49 100644 --- a/sgx_trts/src/tcs/tc.rs +++ b/sgx_trts/src/tcs/tc.rs @@ -154,6 +154,8 @@ impl<'a> ThreadControl<'a> { self.tds.stack_limit = tcs_base.wrapping_offset(self.tds.stack_limit as isize) as usize; self.tds.stack_commit = self.tds.stack_limit; self.tds.first_ssa_gpr = tcs_base.wrapping_offset(self.tds.first_ssa_gpr as isize) as usize; + self.tds.first_ssa_xsave = + tcs_base.wrapping_offset(self.tds.first_ssa_xsave as isize) as usize; self.tds.tls_array = tcs_base.wrapping_offset(self.tds.tls_array as isize) as usize; self.tds.tls_addr = tcs_base.wrapping_offset(self.tds.tls_addr as isize) as usize; self.tds.last_sp -= STATIC_STACK_SIZE; diff --git a/sgx_trts/src/tcs/tls.rs b/sgx_trts/src/tcs/tls.rs index 44cef81b7..e6dffed0f 100644 --- a/sgx_trts/src/tcs/tls.rs +++ b/sgx_trts/src/tcs/tls.rs @@ -15,7 +15,9 @@ // specific language governing permissions and limitations // under the License. +#[cfg(not(feature = "use_sgx_sdk"))] use crate::arch::Tds; +#[cfg(not(feature = "use_sgx_sdk"))] use crate::tcs::tc; #[repr(C)] @@ -25,9 +27,14 @@ pub struct TlsIndex { offset: usize, } +#[cfg(not(feature = "use_sgx_sdk"))] #[no_mangle] pub unsafe extern "C" fn __tls_get_addr(ti: *const TlsIndex) -> *mut u8 { let ti = &*ti; let tds = Tds::from_raw(tc::get_tds()); (tds.tls_addr + ti.offset) as *mut u8 } +#[cfg(feature = "use_sgx_sdk")] +extern "C" { + pub fn __tls_get_addr(ti: *const TlsIndex) -> *mut u8; +} diff --git a/sgx_trts/src/veh/exception.rs b/sgx_trts/src/veh/exception.rs index d5f419efa..02f039a91 100644 --- a/sgx_trts/src/veh/exception.rs +++ b/sgx_trts/src/veh/exception.rs @@ -15,27 +15,55 @@ // specific language governing permissions and limitations // under the License. -use crate::arch::{self, Tcs}; +use crate::arch::{self, MiscExInfo, SsaGpr, Tcs, Tds}; use crate::edmm; use crate::enclave::state::{self, State}; use crate::error; +use crate::feature::SysFeatures; use crate::tcs::tc::{self, ThreadControl}; use crate::trts; use crate::veh::list; use crate::veh::MAX_REGISTER_COUNT; use crate::veh::{ExceptionHandler, ExceptionInfo, ExceptionType, ExceptionVector, HandleResult}; +use crate::xsave; use core::convert::TryFrom; -use core::mem; -use core::mem::MaybeUninit; +use core::mem::{self, MaybeUninit}; use sgx_types::error::{SgxResult, SgxStatus}; macro_rules! try_error { ($cond:expr) => { - if $cond { + if ($cond) { state::set_state(State::Crashed); bail!(SgxStatus::EnclaveCrashed); } }; + ($cond:expr, $e:expr) => { + if ($cond) { + state::set_state(State::Crashed); + bail!($e); + } + }; +} + +#[allow(unused_macros)] +macro_rules! bool_to_integer { + ($cond:expr) => { + if $cond { + 1 + } else { + 0 + } + }; +} + +extern "C" { + fn restore_xregs(buf: *const u8); + fn continue_execution(info: *const ExceptionInfo); + fn second_phase( + info: *const ExceptionInfo, + new_sp: *const u8, + second_phase_handler_addr: usize, + ); } pub fn handle(tcs: &mut Tcs) -> SgxResult { @@ -50,7 +78,10 @@ pub fn handle(tcs: &mut Tcs) -> SgxResult { // check if the exception is raised from 2nd phrase try_error!(tds.exception_flag == -1); - try_error!(((tds.first_ssa_gpr & (!0xFFF)) - arch::SE_PAGE_SIZE) != tcs as *const _ as usize); + try_error!( + ((tds.first_ssa_gpr & (!0xFFF)) - round_to_page!(xsave::xsave_size() + SsaGpr::BYTE_SIZE)) + != tcs as *const _ as usize + ); // no need to check the result of ssa_gpr because thread_data is always trusted let mut sp = { @@ -58,40 +89,45 @@ pub fn handle(tcs: &mut Tcs) -> SgxResult { let sp_u = ssa_gpr.rsp_u as usize; let sp = ssa_gpr.rsp as usize; - try_error!(!trts::is_within_host( - sp_u as *const u8, - mem::size_of::() - )); - try_error!(sp_u == sp); + try_error!( + !trts::is_within_host(sp_u as *const u8, mem::size_of::()), + SgxStatus::StackOverRun + ); + try_error!(sp_u == sp, SgxStatus::StackOverRun); + // check stack overrun only, alignment will be checked after exception handled + try_error!(!tds.is_stack_addr(sp, 0), SgxStatus::StackOverRun); sp }; - // check stack overrun only, alignment will be checked after exception handled - try_error!(!tds.is_stack_addr(sp, 0)); - + let xsave_size = tds.xsave_size; let mut size = 0_usize; // x86_64 requires a 128-bytes red zone, which begins directly // after the return addr and includes func's arguments size += arch::RED_ZONE_SIZE; + // Add space for reserved slot for GPRs that will be used by mitigation + // assembly code RIP, RAX, RBX, RCX, RDX, RBP, RSI, RDI Saved flags, 1st + // D/QWORD of red zone, &SSA[0].GPRSGX.AEXNOTIFY, stack_tickle_pages, + // code_tickle_page, data_tickle_page, c3_byte_address + size += arch::RSVD_SIZE_OF_MITIGATION_STACK_AREA; + // decrease the stack to give space for info size += mem::size_of::(); - + size += xsave_size; sp -= size; - sp &= !0xF; + sp &= !0x3F; // check the decreased sp to make sure it is in the trusted stack range - try_error!(!tds.is_stack_addr(sp, 0)); + try_error!(!tds.is_stack_addr(sp, 0), SgxStatus::StackOverRun); let info = unsafe { &mut *(sp as *mut ExceptionInfo) }; - // decrease the stack to save the SSA[0]->ip - size = mem::size_of::(); - sp -= size; + sp -= mem::size_of::(); try_error!(!tds.is_stack_addr(sp, size)); - // sp is within limit_addr and commit_addr, currently only SGX 2.0 under hardware mode will enter this branch. - if sp < tds.stack_commit { + let mut is_exception_handled = false; + let exit_info_valid = tds.ssa_gpr_mut().exit_info.valid(); + if exit_info_valid == 1 && sp < tds.stack_commit { // EDMM: // stack expand let mut result = SgxResult::<()>::Err(SgxStatus::StackOverRun); @@ -108,13 +144,14 @@ pub fn handle(tcs: &mut Tcs) -> SgxResult { } if result.is_ok() { tds.stack_commit -= page_aligned_delta; + is_exception_handled = true; } else { state::set_state(State::Crashed); + bail!(SgxStatus::StackOverRun); } - return result; } - let ssa_gpr = tds.ssa_gpr(); + let ssa_gpr = tds.ssa_gpr_mut(); #[cfg(all(not(feature = "sim"), not(feature = "hyper")))] unsafe { @@ -132,7 +169,8 @@ pub fn handle(tcs: &mut Tcs) -> SgxResult { // ssa_gpr.rflags |= 1; // return Ok(()); // } - if (&Leverifyreport2_inst as *const _ as u64 == ssa_gpr.rip) + if (!is_exception_handled) + && (&Leverifyreport2_inst as *const _ as u64 == ssa_gpr.rip) && (ssa_gpr.rax == Enclu::EVerifyReport2 as u64) { // Handle the exception raised by everifyreport2 instruction @@ -141,19 +179,28 @@ pub fn handle(tcs: &mut Tcs) -> SgxResult { // Set ZF to indicate error condition, see implementation of everify_report2() ssa_gpr.rflags |= 64; ssa_gpr.rax = inst::INVALID_LEAF as u64; - return Ok(()); + is_exception_handled = true; } } // exception handlers are not allowed to call in a non-exception state - try_error!(ssa_gpr.exit_info.valid() != 1); + // add aexnotify check here to skip the case of interrupts + let is_aexnotify = SysFeatures::get().is_aexnotify(); + try_error!(!is_aexnotify && exit_info_valid != 1); // initialize the info with SSA[0] + let exception_valid = if is_exception_handled { + 0_u32 + } else { + exit_info_valid + }; let vector = ExceptionVector::try_from(ssa_gpr.exit_info.vector()); let exception_type = ExceptionType::try_from(ssa_gpr.exit_info.exit_type()); try_error!(vector.is_err() || exception_type.is_err()); + info.exception_valid = exception_valid; info.vector = vector.unwrap(); info.exception_type = exception_type.unwrap(); + info.xsave_size = xsave_size as u64; info.context.rax = ssa_gpr.rax; info.context.rcx = ssa_gpr.rcx; @@ -174,22 +221,54 @@ pub fn handle(tcs: &mut Tcs) -> SgxResult { info.context.r14 = ssa_gpr.r14; info.context.r15 = ssa_gpr.r15; + if info.vector == ExceptionVector::PF || info.vector == ExceptionVector::GP { + let exinfo = MiscExInfo::from_ssa_gpr(ssa_gpr); + info.exinfo.faulting_address = exinfo.maddr; + info.exinfo.error_code = exinfo.error_code; + } let new_sp = sp as *mut u64; - // prepare the ip for 2nd phrase handling - ssa_gpr.rip = internal_handle as usize as u64; - // new stack for internal_handle_exception - ssa_gpr.rsp = new_sp as u64; - // 1st parameter (info) for LINUX32 - ssa_gpr.rax = info as *mut _ as u64; - // 1st parameter (info) for LINUX64, LINUX32 also uses it while restoring the context - ssa_gpr.rdi = info as *mut _ as u64; + + if !(is_aexnotify || is_exception_handled) { + // Two cases that we don't need to run below code: + // 1. AEXNotify is enabled + // 2. stack expansion or EREPORT exception. We have handled it + // in the first phase and we should not change anything in the ssa_gpr + + // prepare the ip for 2nd phrase handling + ssa_gpr.rip = internal_handle as *const () as usize as u64; + // new stack for internal_handle_exception + ssa_gpr.rsp = new_sp as u64; + // 1st parameter (info) for LINUX32 + ssa_gpr.rax = info as *mut _ as u64; + // 1st parameter (info) for LINUX64, LINUX32 also uses it while restoring the context + ssa_gpr.rdi = info as *mut _ as u64; + } unsafe { // for debugger to get call trace *new_sp = info.context.rip; } - // mark valid to 0 to prevent eenter again - ssa_gpr.exit_info.set_valid(0); + #[cfg(not(any(feature = "sim", feature = "hyper")))] + { + use crate::aexnotify::AEXNotify; + if is_aexnotify { + info.do_aex_mitigation = bool_to_integer!(AEXNotify::is_enable(ssa_gpr)); + unsafe { + restore_xregs(tds.first_ssa_xsave as *const u8); + } + + if info.do_aex_mitigation == 1 { + let _ = AEXNotify::set(false); + } + unsafe { + second_phase( + info as *const _, + new_sp as *const _, + internal_handle as *const () as usize, + ); + } + } + } Ok(()) } @@ -203,38 +282,48 @@ macro_rules! try_abort { }; } -macro_rules! abort { - ($tds:ident) => { - $tds.exception_flag = -1; +#[inline] +fn exception_continue_execution(info: &ExceptionInfo, tds: &mut Tds) -> ! { + // TODO: apply aex mitigations + unsafe { + restore_xregs((&info.xsave_area) as *const u8); + continue_execution(info); + // Should not come here + tds.exception_flag = -1; error::abort(); - }; + } } extern "C" fn internal_handle(info: &mut ExceptionInfo) { - extern "C" { - fn continue_execution(info: *mut ExceptionInfo); - } - let mut tc = tc::current(); let tds = tc.tds_mut(); + try_abort!(info.exception_valid == 0, tds); try_abort!(tds.exception_flag < 0, tds); + + info.xsave_area_mut().copy_from_slice(tds.xsave_area()); tds.exception_flag += 1; + if info.vector == ExceptionVector::PF { + tds.exception_flag -= 1; + + // EMM_TODO: + // if mm_fault_handler(&info.exinfo) == SGX_MM_EXCEPTION_CONTINUE_EXECUTION { + // exception_continue_execution(info); + // } + tds.exception_flag += 1; + } + let (handlers, len) = { let list_guard = list::EXCEPTION_LIST.lock(); if list_guard.len() == 0 { drop(list_guard); tds.exception_flag = -1; - unsafe { - continue_execution(info); - } - // Should not come here - error::abort(); + exception_continue_execution(info, tds); } let mut handlers: [MaybeUninit; MAX_REGISTER_COUNT] = - MaybeUninit::uninit_array(); + [const { MaybeUninit::uninit() }; MAX_REGISTER_COUNT]; // let mut handlers: [ExceptionHandler; MAX_REGISTER_COUNT] = unsafe { mem::zeroed() }; let mut len = 0_usize; @@ -249,7 +338,7 @@ extern "C" fn internal_handle(info: &mut ExceptionInfo) { let mut result = HandleResult::Search; for f in &handlers[..len] { - result = (unsafe { f.assume_init_ref() })(info); + result = (unsafe { f.assume_init_ref() as &ExceptionHandler })(info); if result == HandleResult::Execution { break; } @@ -265,10 +354,5 @@ extern "C" fn internal_handle(info: &mut ExceptionInfo) { tds.exception_flag = -1; } - //instruction triggering the exception will be executed again. - unsafe { - continue_execution(info); - } - - abort!(tds); + exception_continue_execution(info, tds); } diff --git a/sgx_trts/src/veh/mod.rs b/sgx_trts/src/veh/mod.rs index df7f38af2..5dbb993de 100644 --- a/sgx_trts/src/veh/mod.rs +++ b/sgx_trts/src/veh/mod.rs @@ -19,6 +19,7 @@ mod exception; mod list; mod register; +#[cfg(not(feature = "use_sgx_sdk"))] pub(crate) use exception::handle; pub use register::*; diff --git a/sgx_trts/src/veh/register.rs b/sgx_trts/src/veh/register.rs index 653f16562..950740f41 100644 --- a/sgx_trts/src/veh/register.rs +++ b/sgx_trts/src/veh/register.rs @@ -20,6 +20,7 @@ use crate::error; use crate::sync::SpinMutex; use crate::veh::list; use core::num::NonZeroU64; +use core::slice; use sgx_types::error::{SgxResult, SgxStatus}; pub const MAX_REGISTER_COUNT: usize = 64; @@ -79,13 +80,45 @@ impl_struct! { impl_struct! { #[repr(C)] #[derive(Debug)] - pub struct ExceptionInfo { - pub context: CpuContext, - pub vector: ExceptionVector, - pub exception_type: ExceptionType, + pub struct MiscExInfo { + pub faulting_address: u64, + pub error_code: u32, + pub reserved: u32, } } +#[repr(C, align(64))] +#[derive(Debug)] +pub struct ExceptionInfo { + pub context: CpuContext, + pub vector: ExceptionVector, + pub exception_type: ExceptionType, + pub exinfo: MiscExInfo, + pub exception_valid: u32, + pub do_aex_mitigation: u32, + pub xsave_size: u64, + pub reserved: [u64; 1], + pub(super) xsave_area: [u8; 0], +} + +impl ExceptionInfo { + #[inline] + pub fn xsave_area(&self) -> &[u8] { + unsafe { slice::from_raw_parts(&self.xsave_area as *const u8, self.xsave_size as usize) } + } + + #[inline] + pub fn xsave_area_mut(&mut self) -> &mut [u8] { + unsafe { + slice::from_raw_parts_mut(&mut self.xsave_area as *mut u8, self.xsave_size as usize) + } + } +} + +impl_struct_ContiguousMemory! { + ExceptionInfo; +} + impl_enum! { #[repr(u32)] #[derive(Clone, Copy, Debug, Eq, PartialEq)] diff --git a/sgx_trts/src/version.rs b/sgx_trts/src/version.rs index 58fc9f133..6a5466776 100644 --- a/sgx_trts/src/version.rs +++ b/sgx_trts/src/version.rs @@ -16,6 +16,6 @@ // under the License. pub const MAJOR_VERSION: usize = 2; -pub const MINOR_VERSION: usize = 17; -pub const REVISION_VERSION: usize = 101; +pub const MINOR_VERSION: usize = 29; +pub const REVISION_VERSION: usize = 100; pub const VERSION_UINT: usize = (MAJOR_VERSION << 32) | (MINOR_VERSION << 16) | REVISION_VERSION; diff --git a/sgx_trts/src/xsave.rs b/sgx_trts/src/xsave.rs index 53db4adc3..c3080b658 100644 --- a/sgx_trts/src/xsave.rs +++ b/sgx_trts/src/xsave.rs @@ -15,6 +15,7 @@ // specific language governing permissions and limitations // under the License. +use crate::arch::Global; use sgx_types::types; pub fn get_xfrm() -> u64 { @@ -34,9 +35,9 @@ pub fn get_xfrm() -> u64 { } } - let enbaled = i32::from(xfrm != types::XFRM_LEGACY); + let enabled = i32::from(xfrm != types::XFRM_LEGACY); unsafe { - set_xsave_enabled(enbaled); + set_xsave_enabled(enabled); } #[cfg(feature = "sim")] @@ -59,3 +60,8 @@ pub fn is_enabled() -> bool { } unsafe { get_xsave_enabled() != 0 } } + +#[inline] +pub fn xsave_size() -> usize { + Global::get().td_template.xsave_size +} diff --git a/sgx_tstd/hashbrown/src/lib.rs b/sgx_tstd/hashbrown/src/lib.rs index 6e9592abe..7a4a5d5da 100644 --- a/sgx_tstd/hashbrown/src/lib.rs +++ b/sgx_tstd/hashbrown/src/lib.rs @@ -10,18 +10,16 @@ //! [CppCon talk]: https://www.youtube.com/watch?v=ncHmEUmJZf4 #![no_std] +#![allow(internal_features)] #![cfg_attr( feature = "nightly", feature( - test, core_intrinsics, dropck_eyepatch, min_specialization, extend_one, allocator_api, - slice_ptr_get, - maybe_uninit_array_assume_init, - strict_provenance + slice_ptr_get ) )] #![allow( @@ -36,6 +34,7 @@ )] #![warn(missing_docs)] #![warn(rust_2018_idioms)] +#![feature(strict_provenance_lints)] #![cfg_attr(feature = "nightly", warn(fuzzy_provenance_casts))] #[cfg(test)] diff --git a/sgx_tstd/hashbrown/src/macros.rs b/sgx_tstd/hashbrown/src/macros.rs index eaba6bed1..fa5c8b3f9 100644 --- a/sgx_tstd/hashbrown/src/macros.rs +++ b/sgx_tstd/hashbrown/src/macros.rs @@ -54,17 +54,3 @@ macro_rules! cfg_if { }; } -// Helper macro for specialization. This also helps avoid parse errors if the -// default fn syntax for specialization changes in the future. -#[cfg(feature = "nightly")] -macro_rules! default_fn { - (#[$($a:tt)*] $($tt:tt)*) => { - #[$($a)*] default $($tt)* - } -} -#[cfg(not(feature = "nightly"))] -macro_rules! default_fn { - ($($tt:tt)*) => { - $($tt)* - } -} diff --git a/sgx_tstd/hashbrown/src/raw/mod.rs b/sgx_tstd/hashbrown/src/raw/mod.rs index 25c5d1c4d..57fd982d7 100644 --- a/sgx_tstd/hashbrown/src/raw/mod.rs +++ b/sgx_tstd/hashbrown/src/raw/mod.rs @@ -57,16 +57,6 @@ use core::convert::identity as unlikely; #[cfg(feature = "nightly")] use core::intrinsics::{likely, unlikely}; -// Use strict provenance functions if available. -#[cfg(feature = "nightly")] -use core::ptr::invalid_mut; -// Implement it with a cast otherwise. -#[cfg(not(feature = "nightly"))] -#[inline(always)] -fn invalid_mut(addr: usize) -> *mut T { - addr as *mut T -} - #[inline] unsafe fn offset_from(to: *const T, from: *const T) -> usize { to.offset_from(from) as usize @@ -379,7 +369,7 @@ impl Bucket { // won't overflow because index must be less than length (bucket_mask) // and bucket_mask is guaranteed to be less than `isize::MAX` // (see TableLayout::calculate_layout_for method) - invalid_mut(index + 1) + ptr::without_provenance_mut(index + 1) } else { base.as_ptr().sub(index) }; @@ -516,7 +506,7 @@ impl Bucket { if T::IS_ZERO_SIZED { // Just return an arbitrary ZST pointer which is properly aligned // invalid pointer is good enough for ZST - invalid_mut(mem::align_of::()) + ptr::without_provenance_mut(mem::align_of::()) } else { unsafe { self.ptr.as_ptr().sub(1) } } @@ -563,7 +553,7 @@ impl Bucket { unsafe fn next_n(&self, offset: usize) -> Self { let ptr = if T::IS_ZERO_SIZED { // invalid pointer is good enough for ZST - invalid_mut(self.ptr.as_ptr() as usize + offset) + ptr::without_provenance_mut(self.ptr.as_ptr() as usize + offset) } else { self.ptr.as_ptr().sub(offset) }; @@ -943,13 +933,6 @@ impl RawTable { unsafe { NonNull::new_unchecked(self.table.ctrl.as_ptr().cast()) } } - /// Returns pointer to start of data table. - #[inline] - #[cfg(any(feature = "raw", feature = "nightly"))] - pub unsafe fn data_start(&self) -> NonNull { - NonNull::new_unchecked(self.data_end().as_ptr().wrapping_sub(self.buckets())) - } - /// Return the information about memory allocated by the table. /// /// `RawTable` allocates single memory block to store both data and metadata. @@ -3541,33 +3524,17 @@ impl Clone for RawTable { } } -/// Specialization of `clone_from` for `Copy` types +// NOTE (Privasys fork): newer nightly `min_specialization` forbids specializing +// on `Copy`, so the bulk-memcpy specialization for `Copy` element types was +// removed. All clones go through the generic per-element `clone_from_impl` path; +// correctness is identical and table-clone is not an enclave hot path. trait RawTableClone { unsafe fn clone_from_spec(&mut self, source: &Self); } impl RawTableClone for RawTable { - default_fn! { - #[cfg_attr(feature = "inline-more", inline)] - unsafe fn clone_from_spec(&mut self, source: &Self) { - self.clone_from_impl(source); - } - } -} -#[cfg(feature = "nightly")] -impl RawTableClone for RawTable { #[cfg_attr(feature = "inline-more", inline)] unsafe fn clone_from_spec(&mut self, source: &Self) { - source - .table - .ctrl(0) - .copy_to_nonoverlapping(self.table.ctrl(0), self.table.num_ctrl_bytes()); - source - .data_start() - .as_ptr() - .copy_to_nonoverlapping(self.data_start().as_ptr(), self.table.buckets()); - - self.table.items = source.table.items; - self.table.growth_left = source.table.growth_left; + self.clone_from_impl(source); } } @@ -4358,11 +4325,13 @@ impl FusedIterator for RawDrain<'_, T, A> {} /// created will be yielded by that iterator. /// - The order in which the iterator yields buckets is unspecified and may /// change in the future. +#[allow(dead_code)] pub struct RawIterHash { inner: RawIterHashInner, _marker: PhantomData, } +#[allow(dead_code)] struct RawIterHashInner { // See `RawTableInner`'s corresponding fields for details. // We can't store a `*const RawTableInner` as it would get diff --git a/sgx_tstd/src/alloc.rs b/sgx_tstd/src/alloc.rs index fe4d8da83..1ef7b3952 100644 --- a/sgx_tstd/src/alloc.rs +++ b/sgx_tstd/src/alloc.rs @@ -134,18 +134,7 @@ pub fn take_alloc_error_hook() -> fn(Layout) { } fn default_alloc_error_hook(layout: Layout) { - extern "Rust" { - // This symbol is emitted by rustc next to __rust_alloc_error_handler. - // Its value depends on the -Zoom={panic,abort} compiler option. - static __rust_alloc_error_handler_should_panic: u8; - } - - #[allow(unused_unsafe)] - if unsafe { __rust_alloc_error_handler_should_panic != 0 } { - panic!("memory allocation of {} bytes failed", layout.size()); - } else { - rtprintpanic!("memory allocation of {} bytes failed\n", layout.size()); - } + panic!("memory allocation of {} bytes failed", layout.size()); } #[doc(hidden)] @@ -172,7 +161,7 @@ pub mod __default_lib_allocator { // linkage directives are provided as part of the current compiler allocator // ABI - #[rustc_std_internal_symbol] + #[no_mangle] pub unsafe extern "C" fn __rdl_alloc(size: usize, align: usize) -> *mut u8 { // SAFETY: see the guarantees expected by `Layout::from_size_align` and // `GlobalAlloc::alloc`. @@ -180,14 +169,14 @@ pub mod __default_lib_allocator { System.alloc(layout) } - #[rustc_std_internal_symbol] + #[no_mangle] pub unsafe extern "C" fn __rdl_dealloc(ptr: *mut u8, size: usize, align: usize) { // SAFETY: see the guarantees expected by `Layout::from_size_align` and // `GlobalAlloc::dealloc`. System.dealloc(ptr, Layout::from_size_align_unchecked(size, align)) } - #[rustc_std_internal_symbol] + #[no_mangle] pub unsafe extern "C" fn __rdl_realloc( ptr: *mut u8, old_size: usize, @@ -200,7 +189,7 @@ pub mod __default_lib_allocator { System.realloc(ptr, old_layout, new_size) } - #[rustc_std_internal_symbol] + #[no_mangle] pub unsafe extern "C" fn __rdl_alloc_zeroed(size: usize, align: usize) -> *mut u8 { // SAFETY: see the guarantees expected by `Layout::from_size_align` and // `GlobalAlloc::alloc_zeroed`. diff --git a/sgx_tstd/src/f32.rs b/sgx_tstd/src/f32.rs index 53ad7e8aa..4dfced4be 100644 --- a/sgx_tstd/src/f32.rs +++ b/sgx_tstd/src/f32.rs @@ -42,356 +42,99 @@ pub use core::f32::{ impl f32 { /// Returns the largest integer less than or equal to `self`. - /// - /// # Examples - /// - /// ``` - /// let f = 3.7_f32; - /// let g = 3.0_f32; - /// let h = -3.7_f32; - /// - /// assert_eq!(f.floor(), 3.0); - /// assert_eq!(g.floor(), 3.0); - /// assert_eq!(h.floor(), -4.0); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn floor(self) -> f32 { - unsafe { intrinsics::floorf32(self) } + pub const fn floor(self) -> f32 { + core::f32::math::floor(self) } /// Returns the smallest integer greater than or equal to `self`. - /// - /// # Examples - /// - /// ``` - /// let f = 3.01_f32; - /// let g = 4.0_f32; - /// - /// assert_eq!(f.ceil(), 4.0); - /// assert_eq!(g.ceil(), 4.0); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn ceil(self) -> f32 { - unsafe { intrinsics::ceilf32(self) } + pub const fn ceil(self) -> f32 { + core::f32::math::ceil(self) } - /// Returns the nearest integer to `self`. If a value is half-way between two - /// integers, round away from `0.0`. - /// - /// # Examples - /// - /// ``` - /// let f = 3.3_f32; - /// let g = -3.3_f32; - /// let h = -3.7_f32; - /// let i = 3.5_f32; - /// let j = 4.5_f32; - /// - /// assert_eq!(f.round(), 3.0); - /// assert_eq!(g.round(), -3.0); - /// assert_eq!(h.round(), -4.0); - /// assert_eq!(i.round(), 4.0); - /// assert_eq!(j.round(), 5.0); - /// ``` + /// Returns the nearest integer to `self`, rounding half-way cases away from `0.0`. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn round(self) -> f32 { - unsafe { intrinsics::roundf32(self) } + pub const fn round(self) -> f32 { + core::f32::math::round(self) } - /// Returns the nearest integer to a number. Rounds half-way cases to the number - /// with an even least significant digit. - /// - /// # Examples - /// - /// ``` - /// #![feature(round_ties_even)] - /// - /// let f = 3.3_f32; - /// let g = -3.3_f32; - /// let h = 3.5_f32; - /// let i = 4.5_f32; - /// - /// assert_eq!(f.round_ties_even(), 3.0); - /// assert_eq!(g.round_ties_even(), -3.0); - /// assert_eq!(h.round_ties_even(), 4.0); - /// assert_eq!(i.round_ties_even(), 4.0); - /// ``` + /// Returns the nearest integer, rounding ties to even. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn round_ties_even(self) -> f32 { - unsafe { intrinsics::rintf32(self) } + pub const fn round_ties_even(self) -> f32 { + core::f32::math::round_ties_even(self) } - /// Returns the integer part of `self`. - /// This means that non-integer numbers are always truncated towards zero. - /// - /// # Examples - /// - /// ``` - /// let f = 3.7_f32; - /// let g = 3.0_f32; - /// let h = -3.7_f32; - /// - /// assert_eq!(f.trunc(), 3.0); - /// assert_eq!(g.trunc(), 3.0); - /// assert_eq!(h.trunc(), -3.0); - /// ``` + /// Returns the integer part of `self`. Truncates towards zero. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn trunc(self) -> f32 { - unsafe { intrinsics::truncf32(self) } + pub const fn trunc(self) -> f32 { + core::f32::math::trunc(self) } /// Returns the fractional part of `self`. - /// - /// # Examples - /// - /// ``` - /// let x = 3.6_f32; - /// let y = -3.6_f32; - /// let abs_difference_x = (x.fract() - 0.6).abs(); - /// let abs_difference_y = (y.fract() - (-0.6)).abs(); - /// - /// assert!(abs_difference_x <= f32::EPSILON); - /// assert!(abs_difference_y <= f32::EPSILON); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn fract(self) -> f32 { - self - self.trunc() + pub const fn fract(self) -> f32 { + core::f32::math::fract(self) } - /// Computes the absolute value of `self`. - /// - /// # Examples - /// - /// ``` - /// let x = 3.5_f32; - /// let y = -3.5_f32; - /// - /// let abs_difference_x = (x.abs() - x).abs(); - /// let abs_difference_y = (y.abs() - (-y)).abs(); - /// - /// assert!(abs_difference_x <= f32::EPSILON); - /// assert!(abs_difference_y <= f32::EPSILON); - /// - /// assert!(f32::NAN.abs().is_nan()); - /// ``` + /// Fused multiply-add. Computes `(self * a) + b` with only one rounding error. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] - #[inline] - pub fn abs(self) -> f32 { - unsafe { intrinsics::fabsf32(self) } - } - - /// Returns a number that represents the sign of `self`. - /// - /// - `1.0` if the number is positive, `+0.0` or `INFINITY` - /// - `-1.0` if the number is negative, `-0.0` or `NEG_INFINITY` - /// - NaN if the number is NaN - /// - /// # Examples - /// - /// ``` - /// let f = 3.5_f32; - /// - /// assert_eq!(f.signum(), 1.0); - /// assert_eq!(f32::NEG_INFINITY.signum(), -1.0); - /// - /// assert!(f32::NAN.signum().is_nan()); - /// ``` - #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] - #[inline] - pub fn signum(self) -> f32 { - if self.is_nan() { Self::NAN } else { 1.0_f32.copysign(self) } - } - - /// Returns a number composed of the magnitude of `self` and the sign of - /// `sign`. - /// - /// Equal to `self` if the sign of `self` and `sign` are the same, otherwise - /// equal to `-self`. If `self` is a NaN, then a NaN with the sign bit of - /// `sign` is returned. Note, however, that conserving the sign bit on NaN - /// across arithmetical operations is not generally guaranteed. - /// See [explanation of NaN as a special value](primitive@f32) for more info. - /// - /// # Examples - /// - /// ``` - /// let f = 3.5_f32; - /// - /// assert_eq!(f.copysign(0.42), 3.5_f32); - /// assert_eq!(f.copysign(-0.42), -3.5_f32); - /// assert_eq!((-f).copysign(0.42), 3.5_f32); - /// assert_eq!((-f).copysign(-0.42), -3.5_f32); - /// - /// assert!(f32::NAN.copysign(1.0).is_nan()); - /// ``` - #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] - #[inline] - pub fn copysign(self, sign: f32) -> f32 { - unsafe { intrinsics::copysignf32(self, sign) } - } - - /// Fused multiply-add. Computes `(self * a) + b` with only one rounding - /// error, yielding a more accurate result than an unfused multiply-add. - /// - /// Using `mul_add` *may* be more performant than an unfused multiply-add if - /// the target architecture has a dedicated `fma` CPU instruction. However, - /// this is not always true, and will be heavily dependant on designing - /// algorithms with specific target hardware in mind. - /// - /// # Examples - /// - /// ``` - /// let m = 10.0_f32; - /// let x = 4.0_f32; - /// let b = 60.0_f32; - /// - /// // 100.0 - /// let abs_difference = (m.mul_add(x, b) - ((m * x) + b)).abs(); - /// - /// assert!(abs_difference <= f32::EPSILON); - /// ``` - #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn mul_add(self, a: f32, b: f32) -> f32 { - unsafe { intrinsics::fmaf32(self, a, b) } + core::f32::math::mul_add(self, a, b) } - /// Calculates Euclidean division, the matching method for `rem_euclid`. - /// - /// This computes the integer `n` such that - /// `self = n * rhs + self.rem_euclid(rhs)`. - /// In other words, the result is `self / rhs` rounded to the integer `n` - /// such that `self >= n * rhs`. - /// - /// # Examples - /// - /// ``` - /// let a: f32 = 7.0; - /// let b = 4.0; - /// assert_eq!(a.div_euclid(b), 1.0); // 7.0 > 4.0 * 1.0 - /// assert_eq!((-a).div_euclid(b), -2.0); // -7.0 >= 4.0 * -2.0 - /// assert_eq!(a.div_euclid(-b), -1.0); // 7.0 >= -4.0 * -1.0 - /// assert_eq!((-a).div_euclid(-b), 2.0); // -7.0 >= -4.0 * 2.0 - /// ``` + /// Calculates Euclidean division. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn div_euclid(self, rhs: f32) -> f32 { - let q = (self / rhs).trunc(); - if self % rhs < 0.0 { - return if rhs > 0.0 { q - 1.0 } else { q + 1.0 }; - } - q + core::f32::math::div_euclid(self, rhs) } /// Calculates the least nonnegative remainder of `self (mod rhs)`. - /// - /// In particular, the return value `r` satisfies `0.0 <= r < rhs.abs()` in - /// most cases. However, due to a floating point round-off error it can - /// result in `r == rhs.abs()`, violating the mathematical definition, if - /// `self` is much smaller than `rhs.abs()` in magnitude and `self < 0.0`. - /// This result is not an element of the function's codomain, but it is the - /// closest floating point number in the real numbers and thus fulfills the - /// property `self == self.div_euclid(rhs) * rhs + self.rem_euclid(rhs)` - /// approximately. - /// - /// # Examples - /// - /// ``` - /// let a: f32 = 7.0; - /// let b = 4.0; - /// assert_eq!(a.rem_euclid(b), 3.0); - /// assert_eq!((-a).rem_euclid(b), 1.0); - /// assert_eq!(a.rem_euclid(-b), 3.0); - /// assert_eq!((-a).rem_euclid(-b), 1.0); - /// // limitation due to round-off error - /// assert!((-f32::EPSILON).rem_euclid(3.0) != 0.0); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn rem_euclid(self, rhs: f32) -> f32 { - let r = self % rhs; - if r < 0.0 { r + rhs.abs() } else { r } + core::f32::math::rem_euclid(self, rhs) } /// Raises a number to an integer power. - /// - /// Using this function is generally faster than using `powf`. - /// It might have a different sequence of rounding operations than `powf`, - /// so the results are not guaranteed to agree. - /// - /// # Examples - /// - /// ``` - /// let x = 2.0_f32; - /// let abs_difference = (x.powi(2) - (x * x)).abs(); - /// - /// assert!(abs_difference <= f32::EPSILON); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn powi(self, n: i32) -> f32 { - unsafe { intrinsics::powif32(self, n) } + core::f32::math::powi(self, n) } - /// Raises a number to a floating point power. - /// - /// # Examples - /// - /// ``` - /// let x = 2.0_f32; - /// let abs_difference = (x.powf(2.0) - (x * x)).abs(); + /// Returns the square root of a number. /// - /// assert!(abs_difference <= f32::EPSILON); - /// ``` + /// Returns NaN if `self` is a negative number other than `-0.0`. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn powf(self, n: f32) -> f32 { - unsafe { intrinsics::powf32(self, n) } + pub fn sqrt(self) -> f32 { + intrinsics::sqrtf32(self) } - /// Returns the square root of a number. - /// - /// Returns NaN if `self` is a negative number other than `-0.0`. + /// Raises a number to a floating point power. /// /// # Examples /// /// ``` - /// let positive = 4.0_f32; - /// let negative = -4.0_f32; - /// let negative_zero = -0.0_f32; - /// - /// let abs_difference = (positive.sqrt() - 2.0).abs(); + /// let x = 2.0_f32; + /// let abs_difference = (x.powf(2.0) - (x * x)).abs(); /// /// assert!(abs_difference <= f32::EPSILON); - /// assert!(negative.sqrt().is_nan()); - /// assert!(negative_zero.sqrt() == negative_zero); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn sqrt(self) -> f32 { - unsafe { intrinsics::sqrtf32(self) } + pub fn powf(self, n: f32) -> f32 { + intrinsics::powf32(self, n) } - /// Returns `e^(self)`, (the exponential function). /// /// # Examples @@ -407,10 +150,9 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn exp(self) -> f32 { - unsafe { intrinsics::expf32(self) } + intrinsics::expf32(self) } /// Returns `2^(self)`. @@ -426,10 +168,9 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn exp2(self) -> f32 { - unsafe { intrinsics::exp2f32(self) } + intrinsics::exp2f32(self) } /// Returns the natural logarithm of the number. @@ -447,10 +188,9 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn ln(self) -> f32 { - unsafe { intrinsics::logf32(self) } + intrinsics::logf32(self) } /// Returns the logarithm of the number with respect to an arbitrary base. @@ -470,7 +210,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn log(self, base: f32) -> f32 { self.ln() / base.ln() @@ -489,10 +228,9 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn log2(self) -> f32 { - unsafe { intrinsics::log2f32(self) } + intrinsics::log2f32(self) } /// Returns the base 10 logarithm of the number. @@ -508,10 +246,9 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn log10(self) -> f32 { - unsafe { intrinsics::log10f32(self) } + intrinsics::log10f32(self) } /// The positive difference of two numbers. @@ -532,7 +269,6 @@ impl f32 { /// assert!(abs_difference_y <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] #[deprecated( since = "1.10.0", @@ -561,7 +297,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn cbrt(self) -> f32 { unsafe { cmath::cbrtf(self) } @@ -584,7 +319,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn hypot(self, other: f32) -> f32 { unsafe { cmath::hypotf(self, other) } @@ -602,10 +336,9 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn sin(self) -> f32 { - unsafe { intrinsics::sinf32(self) } + intrinsics::sinf32(self) } /// Computes the cosine of a number (in radians). @@ -620,10 +353,9 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn cos(self) -> f32 { - unsafe { intrinsics::cosf32(self) } + intrinsics::cosf32(self) } /// Computes the tangent of a number (in radians). @@ -637,7 +369,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn tan(self) -> f32 { unsafe { cmath::tanf(self) } @@ -658,7 +389,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn asin(self) -> f32 { unsafe { cmath::asinf(self) } @@ -679,7 +409,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn acos(self) -> f32 { unsafe { cmath::acosf(self) } @@ -699,7 +428,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn atan(self) -> f32 { unsafe { cmath::atanf(self) } @@ -732,7 +460,6 @@ impl f32 { /// assert!(abs_difference_2 <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn atan2(self, other: f32) -> f32 { unsafe { cmath::atan2f(self, other) } @@ -774,7 +501,6 @@ impl f32 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn exp_m1(self) -> f32 { unsafe { cmath::expm1f(self) } @@ -795,7 +521,6 @@ impl f32 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn ln_1p(self) -> f32 { unsafe { cmath::log1pf(self) } @@ -817,7 +542,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn sinh(self) -> f32 { unsafe { cmath::sinhf(self) } @@ -839,7 +563,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn cosh(self) -> f32 { unsafe { cmath::coshf(self) } @@ -861,7 +584,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn tanh(self) -> f32 { unsafe { cmath::tanhf(self) } @@ -880,7 +602,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn asinh(self) -> f32 { let ax = self.abs(); @@ -901,7 +622,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn acosh(self) -> f32 { if self < 1.0 { @@ -924,7 +644,6 @@ impl f32 { /// assert!(abs_difference <= 1e-5); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn atanh(self) -> f32 { 0.5 * ((2.0 * self) / (1.0 - self)).ln_1p() @@ -943,7 +662,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn gamma(self) -> f32 { unsafe { cmath::tgammaf(self) } @@ -964,7 +682,6 @@ impl f32 { /// assert!(abs_difference <= f32::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn ln_gamma(self) -> (f32, i32) { let mut signgamp: i32 = 0; diff --git a/sgx_tstd/src/f64.rs b/sgx_tstd/src/f64.rs index 9fe630f50..d69284bda 100644 --- a/sgx_tstd/src/f64.rs +++ b/sgx_tstd/src/f64.rs @@ -42,356 +42,99 @@ pub use core::f64::{ impl f64 { /// Returns the largest integer less than or equal to `self`. - /// - /// # Examples - /// - /// ``` - /// let f = 3.7_f64; - /// let g = 3.0_f64; - /// let h = -3.7_f64; - /// - /// assert_eq!(f.floor(), 3.0); - /// assert_eq!(g.floor(), 3.0); - /// assert_eq!(h.floor(), -4.0); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn floor(self) -> f64 { - unsafe { intrinsics::floorf64(self) } + pub const fn floor(self) -> f64 { + core::f64::math::floor(self) } /// Returns the smallest integer greater than or equal to `self`. - /// - /// # Examples - /// - /// ``` - /// let f = 3.01_f64; - /// let g = 4.0_f64; - /// - /// assert_eq!(f.ceil(), 4.0); - /// assert_eq!(g.ceil(), 4.0); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn ceil(self) -> f64 { - unsafe { intrinsics::ceilf64(self) } + pub const fn ceil(self) -> f64 { + core::f64::math::ceil(self) } - /// Returns the nearest integer to `self`. If a value is half-way between two - /// integers, round away from `0.0`. - /// - /// # Examples - /// - /// ``` - /// let f = 3.3_f64; - /// let g = -3.3_f64; - /// let h = -3.7_f64; - /// let i = 3.5_f64; - /// let j = 4.5_f64; - /// - /// assert_eq!(f.round(), 3.0); - /// assert_eq!(g.round(), -3.0); - /// assert_eq!(h.round(), -4.0); - /// assert_eq!(i.round(), 4.0); - /// assert_eq!(j.round(), 5.0); - /// ``` + /// Returns the nearest integer to `self`, rounding half-way cases away from `0.0`. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn round(self) -> f64 { - unsafe { intrinsics::roundf64(self) } + pub const fn round(self) -> f64 { + core::f64::math::round(self) } - /// Returns the nearest integer to a number. Rounds half-way cases to the number - /// with an even least significant digit. - /// - /// # Examples - /// - /// ``` - /// #![feature(round_ties_even)] - /// - /// let f = 3.3_f64; - /// let g = -3.3_f64; - /// let h = 3.5_f64; - /// let i = 4.5_f64; - /// - /// assert_eq!(f.round_ties_even(), 3.0); - /// assert_eq!(g.round_ties_even(), -3.0); - /// assert_eq!(h.round_ties_even(), 4.0); - /// assert_eq!(i.round_ties_even(), 4.0); - /// ``` + /// Returns the nearest integer, rounding ties to even. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn round_ties_even(self) -> f64 { - unsafe { intrinsics::rintf64(self) } + pub const fn round_ties_even(self) -> f64 { + core::f64::math::round_ties_even(self) } - /// Returns the integer part of `self`. - /// This means that non-integer numbers are always truncated towards zero. - /// - /// # Examples - /// - /// ``` - /// let f = 3.7_f64; - /// let g = 3.0_f64; - /// let h = -3.7_f64; - /// - /// assert_eq!(f.trunc(), 3.0); - /// assert_eq!(g.trunc(), 3.0); - /// assert_eq!(h.trunc(), -3.0); - /// ``` + /// Returns the integer part of `self`. Truncates towards zero. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn trunc(self) -> f64 { - unsafe { intrinsics::truncf64(self) } + pub const fn trunc(self) -> f64 { + core::f64::math::trunc(self) } /// Returns the fractional part of `self`. - /// - /// # Examples - /// - /// ``` - /// let x = 3.6_f64; - /// let y = -3.6_f64; - /// let abs_difference_x = (x.fract() - 0.6).abs(); - /// let abs_difference_y = (y.fract() - (-0.6)).abs(); - /// - /// assert!(abs_difference_x < 1e-10); - /// assert!(abs_difference_y < 1e-10); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn fract(self) -> f64 { - self - self.trunc() + pub const fn fract(self) -> f64 { + core::f64::math::fract(self) } - /// Computes the absolute value of `self`. - /// - /// # Examples - /// - /// ``` - /// let x = 3.5_f64; - /// let y = -3.5_f64; - /// - /// let abs_difference_x = (x.abs() - x).abs(); - /// let abs_difference_y = (y.abs() - (-y)).abs(); - /// - /// assert!(abs_difference_x < 1e-10); - /// assert!(abs_difference_y < 1e-10); - /// - /// assert!(f64::NAN.abs().is_nan()); - /// ``` + /// Fused multiply-add. Computes `(self * a) + b` with only one rounding error. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] - #[inline] - pub fn abs(self) -> f64 { - unsafe { intrinsics::fabsf64(self) } - } - - /// Returns a number that represents the sign of `self`. - /// - /// - `1.0` if the number is positive, `+0.0` or `INFINITY` - /// - `-1.0` if the number is negative, `-0.0` or `NEG_INFINITY` - /// - NaN if the number is NaN - /// - /// # Examples - /// - /// ``` - /// let f = 3.5_f64; - /// - /// assert_eq!(f.signum(), 1.0); - /// assert_eq!(f64::NEG_INFINITY.signum(), -1.0); - /// - /// assert!(f64::NAN.signum().is_nan()); - /// ``` - #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] - #[inline] - pub fn signum(self) -> f64 { - if self.is_nan() { Self::NAN } else { 1.0_f64.copysign(self) } - } - - /// Returns a number composed of the magnitude of `self` and the sign of - /// `sign`. - /// - /// Equal to `self` if the sign of `self` and `sign` are the same, otherwise - /// equal to `-self`. If `self` is a NaN, then a NaN with the sign bit of - /// `sign` is returned. Note, however, that conserving the sign bit on NaN - /// across arithmetical operations is not generally guaranteed. - /// See [explanation of NaN as a special value](primitive@f32) for more info. - /// - /// # Examples - /// - /// ``` - /// let f = 3.5_f64; - /// - /// assert_eq!(f.copysign(0.42), 3.5_f64); - /// assert_eq!(f.copysign(-0.42), -3.5_f64); - /// assert_eq!((-f).copysign(0.42), 3.5_f64); - /// assert_eq!((-f).copysign(-0.42), -3.5_f64); - /// - /// assert!(f64::NAN.copysign(1.0).is_nan()); - /// ``` - #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] - #[inline] - pub fn copysign(self, sign: f64) -> f64 { - unsafe { intrinsics::copysignf64(self, sign) } - } - - /// Fused multiply-add. Computes `(self * a) + b` with only one rounding - /// error, yielding a more accurate result than an unfused multiply-add. - /// - /// Using `mul_add` *may* be more performant than an unfused multiply-add if - /// the target architecture has a dedicated `fma` CPU instruction. However, - /// this is not always true, and will be heavily dependant on designing - /// algorithms with specific target hardware in mind. - /// - /// # Examples - /// - /// ``` - /// let m = 10.0_f64; - /// let x = 4.0_f64; - /// let b = 60.0_f64; - /// - /// // 100.0 - /// let abs_difference = (m.mul_add(x, b) - ((m * x) + b)).abs(); - /// - /// assert!(abs_difference < 1e-10); - /// ``` - #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn mul_add(self, a: f64, b: f64) -> f64 { - unsafe { intrinsics::fmaf64(self, a, b) } + core::f64::math::mul_add(self, a, b) } - /// Calculates Euclidean division, the matching method for `rem_euclid`. - /// - /// This computes the integer `n` such that - /// `self = n * rhs + self.rem_euclid(rhs)`. - /// In other words, the result is `self / rhs` rounded to the integer `n` - /// such that `self >= n * rhs`. - /// - /// # Examples - /// - /// ``` - /// let a: f64 = 7.0; - /// let b = 4.0; - /// assert_eq!(a.div_euclid(b), 1.0); // 7.0 > 4.0 * 1.0 - /// assert_eq!((-a).div_euclid(b), -2.0); // -7.0 >= 4.0 * -2.0 - /// assert_eq!(a.div_euclid(-b), -1.0); // 7.0 >= -4.0 * -1.0 - /// assert_eq!((-a).div_euclid(-b), 2.0); // -7.0 >= -4.0 * 2.0 - /// ``` + /// Calculates Euclidean division. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn div_euclid(self, rhs: f64) -> f64 { - let q = (self / rhs).trunc(); - if self % rhs < 0.0 { - return if rhs > 0.0 { q - 1.0 } else { q + 1.0 }; - } - q + core::f64::math::div_euclid(self, rhs) } /// Calculates the least nonnegative remainder of `self (mod rhs)`. - /// - /// In particular, the return value `r` satisfies `0.0 <= r < rhs.abs()` in - /// most cases. However, due to a floating point round-off error it can - /// result in `r == rhs.abs()`, violating the mathematical definition, if - /// `self` is much smaller than `rhs.abs()` in magnitude and `self < 0.0`. - /// This result is not an element of the function's codomain, but it is the - /// closest floating point number in the real numbers and thus fulfills the - /// property `self == self.div_euclid(rhs) * rhs + self.rem_euclid(rhs)` - /// approximately. - /// - /// # Examples - /// - /// ``` - /// let a: f64 = 7.0; - /// let b = 4.0; - /// assert_eq!(a.rem_euclid(b), 3.0); - /// assert_eq!((-a).rem_euclid(b), 1.0); - /// assert_eq!(a.rem_euclid(-b), 3.0); - /// assert_eq!((-a).rem_euclid(-b), 1.0); - /// // limitation due to round-off error - /// assert!((-f64::EPSILON).rem_euclid(3.0) != 0.0); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn rem_euclid(self, rhs: f64) -> f64 { - let r = self % rhs; - if r < 0.0 { r + rhs.abs() } else { r } + core::f64::math::rem_euclid(self, rhs) } /// Raises a number to an integer power. - /// - /// Using this function is generally faster than using `powf`. - /// It might have a different sequence of rounding operations than `powf`, - /// so the results are not guaranteed to agree. - /// - /// # Examples - /// - /// ``` - /// let x = 2.0_f64; - /// let abs_difference = (x.powi(2) - (x * x)).abs(); - /// - /// assert!(abs_difference < 1e-10); - /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn powi(self, n: i32) -> f64 { - unsafe { intrinsics::powif64(self, n) } + core::f64::math::powi(self, n) } - /// Raises a number to a floating point power. - /// - /// # Examples - /// - /// ``` - /// let x = 2.0_f64; - /// let abs_difference = (x.powf(2.0) - (x * x)).abs(); + /// Returns the square root of a number. /// - /// assert!(abs_difference < 1e-10); - /// ``` + /// Returns NaN if `self` is a negative number other than `-0.0`. #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn powf(self, n: f64) -> f64 { - unsafe { intrinsics::powf64(self, n) } + pub fn sqrt(self) -> f64 { + intrinsics::sqrtf64(self) } - /// Returns the square root of a number. - /// - /// Returns NaN if `self` is a negative number other than `-0.0`. + /// Raises a number to a floating point power. /// /// # Examples /// /// ``` - /// let positive = 4.0_f64; - /// let negative = -4.0_f64; - /// let negative_zero = -0.0_f64; - /// - /// let abs_difference = (positive.sqrt() - 2.0).abs(); + /// let x = 2.0_f64; + /// let abs_difference = (x.powf(2.0) - (x * x)).abs(); /// /// assert!(abs_difference < 1e-10); - /// assert!(negative.sqrt().is_nan()); - /// assert!(negative_zero.sqrt() == negative_zero); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] - pub fn sqrt(self) -> f64 { - unsafe { intrinsics::sqrtf64(self) } + pub fn powf(self, n: f64) -> f64 { + intrinsics::powf64(self, n) } - /// Returns `e^(self)`, (the exponential function). /// /// # Examples @@ -407,10 +150,9 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn exp(self) -> f64 { - unsafe { intrinsics::expf64(self) } + intrinsics::expf64(self) } /// Returns `2^(self)`. @@ -426,10 +168,9 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn exp2(self) -> f64 { - unsafe { intrinsics::exp2f64(self) } + intrinsics::exp2f64(self) } /// Returns the natural logarithm of the number. @@ -447,10 +188,9 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn ln(self) -> f64 { - self.log_wrapper(|n| unsafe { intrinsics::logf64(n) }) + self.log_wrapper(|n| intrinsics::logf64(n)) } /// Returns the logarithm of the number with respect to an arbitrary base. @@ -470,7 +210,6 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn log(self, base: f64) -> f64 { self.ln() / base.ln() @@ -489,10 +228,9 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn log2(self) -> f64 { - self.log_wrapper(|n| unsafe { intrinsics::log2f64(n) }) + self.log_wrapper(|n| intrinsics::log2f64(n)) } /// Returns the base 10 logarithm of the number. @@ -508,10 +246,9 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn log10(self) -> f64 { - self.log_wrapper(|n| unsafe { intrinsics::log10f64(n) }) + self.log_wrapper(|n| intrinsics::log10f64(n)) } /// The positive difference of two numbers. @@ -532,7 +269,6 @@ impl f64 { /// assert!(abs_difference_y < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] #[deprecated( since = "1.10.0", @@ -561,7 +297,6 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn cbrt(self) -> f64 { unsafe { cmath::cbrt(self) } @@ -584,7 +319,6 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn hypot(self, other: f64) -> f64 { unsafe { cmath::hypot(self, other) } @@ -602,10 +336,9 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn sin(self) -> f64 { - unsafe { intrinsics::sinf64(self) } + intrinsics::sinf64(self) } /// Computes the cosine of a number (in radians). @@ -620,10 +353,9 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn cos(self) -> f64 { - unsafe { intrinsics::cosf64(self) } + intrinsics::cosf64(self) } /// Computes the tangent of a number (in radians). @@ -637,7 +369,6 @@ impl f64 { /// assert!(abs_difference < 1e-14); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn tan(self) -> f64 { unsafe { cmath::tan(self) } @@ -658,7 +389,6 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn asin(self) -> f64 { unsafe { cmath::asin(self) } @@ -679,7 +409,6 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn acos(self) -> f64 { unsafe { cmath::acos(self) } @@ -699,7 +428,6 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn atan(self) -> f64 { unsafe { cmath::atan(self) } @@ -732,7 +460,6 @@ impl f64 { /// assert!(abs_difference_2 < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn atan2(self, other: f64) -> f64 { unsafe { cmath::atan2(self, other) } @@ -774,7 +501,6 @@ impl f64 { /// assert!(abs_difference < 1e-20); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn exp_m1(self) -> f64 { unsafe { cmath::expm1(self) } @@ -795,7 +521,6 @@ impl f64 { /// assert!(abs_difference < 1e-20); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn ln_1p(self) -> f64 { unsafe { cmath::log1p(self) } @@ -817,7 +542,6 @@ impl f64 { /// assert!(abs_difference < 1e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn sinh(self) -> f64 { unsafe { cmath::sinh(self) } @@ -839,7 +563,6 @@ impl f64 { /// assert!(abs_difference < 1.0e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn cosh(self) -> f64 { unsafe { cmath::cosh(self) } @@ -861,7 +584,6 @@ impl f64 { /// assert!(abs_difference < 1.0e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn tanh(self) -> f64 { unsafe { cmath::tanh(self) } @@ -880,7 +602,6 @@ impl f64 { /// assert!(abs_difference < 1.0e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn asinh(self) -> f64 { let ax = self.abs(); @@ -901,7 +622,6 @@ impl f64 { /// assert!(abs_difference < 1.0e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn acosh(self) -> f64 { if self < 1.0 { @@ -924,7 +644,6 @@ impl f64 { /// assert!(abs_difference < 1.0e-10); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn atanh(self) -> f64 { 0.5 * ((2.0 * self) / (1.0 - self)).ln_1p() @@ -943,7 +662,6 @@ impl f64 { /// assert!(abs_difference <= f64::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn gamma(self) -> f64 { unsafe { cmath::tgamma(self) } @@ -964,7 +682,6 @@ impl f64 { /// assert!(abs_difference <= f64::EPSILON); /// ``` #[rustc_allow_incoherent_impl] - #[must_use = "method returns a new number and does not mutate the original value"] #[inline] pub fn ln_gamma(self) -> (f64, i32) { let mut signgamp: i32 = 0; diff --git a/sgx_tstd/src/ffi/mod.rs b/sgx_tstd/src/ffi/mod.rs index 9b75d5e66..5178f76b7 100644 --- a/sgx_tstd/src/ffi/mod.rs +++ b/sgx_tstd/src/ffi/mod.rs @@ -182,6 +182,6 @@ pub use core::ffi::{ pub use core::ffi::c_void; -pub use core::ffi::{VaList, VaListImpl}; +pub use core::ffi::{VaList}; mod os_str; diff --git a/sgx_tstd/src/fs.rs b/sgx_tstd/src/fs.rs index cf6859916..c8b3d3336 100644 --- a/sgx_tstd/src/fs.rs +++ b/sgx_tstd/src/fs.rs @@ -740,7 +740,7 @@ impl Read for &File { } #[inline] - fn read_buf(&mut self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { self.inner.read_buf(cursor) } @@ -796,7 +796,7 @@ impl Read for File { fn read_vectored(&mut self, bufs: &mut [IoSliceMut<'_>]) -> io::Result { (&*self).read_vectored(bufs) } - fn read_buf(&mut self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { (&*self).read_buf(cursor) } #[inline] @@ -842,7 +842,7 @@ impl Read for Arc { fn read_vectored(&mut self, bufs: &mut [IoSliceMut<'_>]) -> io::Result { (&**self).read_vectored(bufs) } - fn read_buf(&mut self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { (&**self).read_buf(cursor) } #[inline] diff --git a/sgx_tstd/src/fs/tests.rs b/sgx_tstd/src/fs/tests.rs index babbeede8..b27d49532 100644 --- a/sgx_tstd/src/fs/tests.rs +++ b/sgx_tstd/src/fs/tests.rs @@ -319,7 +319,7 @@ fn file_test_read_buf() { let filename = &tmpdir.join("test"); check!(fs::write(filename, [1, 2, 3, 4])); - let mut buf: [MaybeUninit; 128] = MaybeUninit::uninit_array(); + let mut buf: [MaybeUninit; 128] = [const { MaybeUninit::uninit() }; 128]; let mut buf = BorrowedBuf::from(buf.as_mut_slice()); let mut file = check!(File::open(filename)); check!(file.read_buf(buf.unfilled())); diff --git a/sgx_tstd/src/hash/random.rs b/sgx_tstd/src/hash/random.rs index 40da4a388..197636b76 100644 --- a/sgx_tstd/src/hash/random.rs +++ b/sgx_tstd/src/hash/random.rs @@ -118,7 +118,7 @@ impl DefaultHasher { #[inline] #[allow(deprecated)] #[must_use] - pub const fn new() -> DefaultHasher { + pub fn new() -> DefaultHasher { DefaultHasher(SipHasher13::new_with_keys(0, 0)) } } diff --git a/sgx_tstd/src/io/buffered/bufreader.rs b/sgx_tstd/src/io/buffered/bufreader.rs index ced201271..bfc1484ef 100644 --- a/sgx_tstd/src/io/buffered/bufreader.rs +++ b/sgx_tstd/src/io/buffered/bufreader.rs @@ -300,7 +300,7 @@ impl Read for BufReader { Ok(nread) } - fn read_buf(&mut self, mut cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, mut cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { // If we don't have any buffered data and we're doing a massive read // (larger than our internal buffer), bypass our internal buffer // entirely. diff --git a/sgx_tstd/src/io/buffered/bufreader/buffer.rs b/sgx_tstd/src/io/buffered/bufreader/buffer.rs index fd5777bca..5cfb744ff 100644 --- a/sgx_tstd/src/io/buffered/bufreader/buffer.rs +++ b/sgx_tstd/src/io/buffered/bufreader/buffer.rs @@ -42,21 +42,21 @@ pub struct Buffer { // defensive initialization as possible. Note that while this often the same as `filled`, it // doesn't need to be. Calls to `fill_buf` are not required to actually fill the buffer, and // omitting this is a huge perf regression for `Read` impls that do not. - initialized: usize, + initialized: bool, } impl Buffer { #[inline] pub fn with_capacity(capacity: usize) -> Self { let buf = Box::new_uninit_slice(capacity); - Self { buf, pos: 0, filled: 0, initialized: 0 } + Self { buf, pos: 0, filled: 0, initialized: false } } #[inline] pub fn buffer(&self) -> &[u8] { // SAFETY: self.pos and self.cap are valid, and self.cap => self.pos, and // that region is initialized because those are all invariants of this type. - unsafe { MaybeUninit::slice_assume_init_ref(self.buf.get_unchecked(self.pos..self.filled)) } + unsafe { self.buf.get_unchecked(self.pos..self.filled).assume_init_ref() } } #[inline] @@ -76,7 +76,7 @@ impl Buffer { // This is only used by a test which asserts that the initialization-tracking is correct. #[cfg(feature = "unit_test")] - pub fn initialized(&self) -> usize { + pub fn initialized(&self) -> bool { self.initialized } @@ -124,15 +124,16 @@ impl Buffer { let mut buf = BorrowedBuf::from(&mut *self.buf); // SAFETY: `self.filled` bytes will always have been initialized. - unsafe { - buf.set_init(self.initialized); + if self.initialized { + // SAFETY: only set after buf was fully initialized. + unsafe { buf.set_init() }; } reader.read_buf(buf.unfilled())?; self.pos = 0; self.filled = buf.len(); - self.initialized = buf.init_len(); + self.initialized = buf.is_init(); } Ok(self.buffer()) } diff --git a/sgx_tstd/src/io/buffered/tests.rs b/sgx_tstd/src/io/buffered/tests.rs index 5c72f0eef..eb1d3a1c5 100644 --- a/sgx_tstd/src/io/buffered/tests.rs +++ b/sgx_tstd/src/io/buffered/tests.rs @@ -84,7 +84,7 @@ fn test_buffered_reader_read_buf() { let mut reader = BufReader::with_capacity(2, inner); let buf: &mut [_] = &mut [MaybeUninit::uninit(); 3]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); reader.read_buf(buf.unfilled()).unwrap(); @@ -92,7 +92,7 @@ fn test_buffered_reader_read_buf() { assert_eq!(reader.buffer(), []); let buf: &mut [_] = &mut [MaybeUninit::uninit(); 2]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); reader.read_buf(buf.unfilled()).unwrap(); @@ -100,7 +100,7 @@ fn test_buffered_reader_read_buf() { assert_eq!(reader.buffer(), []); let buf: &mut [_] = &mut [MaybeUninit::uninit(); 1]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); reader.read_buf(buf.unfilled()).unwrap(); @@ -108,7 +108,7 @@ fn test_buffered_reader_read_buf() { assert_eq!(reader.buffer(), [3]); let buf: &mut [_] = &mut [MaybeUninit::uninit(); 3]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); reader.read_buf(buf.unfilled()).unwrap(); diff --git a/sgx_tstd/src/io/copy.rs b/sgx_tstd/src/io/copy.rs index 6f30fde27..a4f2444ce 100644 --- a/sgx_tstd/src/io/copy.rs +++ b/sgx_tstd/src/io/copy.rs @@ -225,16 +225,10 @@ impl BufferedWriterSpec for BufWriter { } let mut len = 0; - let mut init = 0; loop { let buf = self.buffer_mut(); - let mut read_buf: BorrowedBuf<'_> = buf.spare_capacity_mut().into(); - - unsafe { - // SAFETY: init is either 0 or the init_len from the previous iteration. - read_buf.set_init(init); - } + let mut read_buf: BorrowedBuf<'_, u8> = buf.spare_capacity_mut().into(); if read_buf.capacity() >= DEFAULT_BUF_SIZE { let mut cursor = read_buf.unfilled(); @@ -246,7 +240,6 @@ impl BufferedWriterSpec for BufWriter { return Ok(len); } - init = read_buf.init_len() - bytes_read; len += bytes_read as u64; // SAFETY: BorrowedBuf guarantees all of its filled bytes are init @@ -260,7 +253,6 @@ impl BufferedWriterSpec for BufWriter { } } else { self.flush_buf()?; - init = 0; } } } @@ -290,16 +282,11 @@ impl BufferedWriterSpec for Vec { loop { self.reserve(DEFAULT_BUF_SIZE); - let mut initialized_spare_capacity = 0; loop { let buf = self.spare_capacity_mut(); let read_size = min(max_read_size, buf.len()); let mut buf = BorrowedBuf::from(&mut buf[..read_size]); - // SAFETY: init is either 0 or the init_len from the previous iteration. - unsafe { - buf.set_init(initialized_spare_capacity); - } match reader.read_buf(buf.unfilled()) { Ok(()) => { let bytes_read = buf.len(); @@ -310,7 +297,7 @@ impl BufferedWriterSpec for Vec { } // the reader is returning short reads but it doesn't call ensure_init() - if buf.init_len() < buf.capacity() { + if !buf.is_init() { max_read_size = usize::MAX; } // the reader hasn't returned short reads so far @@ -318,7 +305,6 @@ impl BufferedWriterSpec for Vec { max_read_size *= 2; } - initialized_spare_capacity = buf.init_len() - bytes_read; bytes += bytes_read as u64; // SAFETY: BorrowedBuf guarantees all of its filled bytes are init // and the number of read bytes can't exceed the spare capacity since @@ -343,7 +329,7 @@ fn stack_buffer_copy( writer: &mut W, ) -> Result { let buf: &mut [_] = &mut [MaybeUninit::uninit(); DEFAULT_BUF_SIZE]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); let mut len = 0; diff --git a/sgx_tstd/src/io/cursor.rs b/sgx_tstd/src/io/cursor.rs index 9f8da589d..a5ba58b2b 100644 --- a/sgx_tstd/src/io/cursor.rs +++ b/sgx_tstd/src/io/cursor.rs @@ -325,7 +325,7 @@ where Ok(n) } - fn read_buf(&mut self, mut cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, mut cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { let prev_written = cursor.written(); Read::read_buf(&mut self.fill_buf()?, cursor.reborrow())?; diff --git a/sgx_tstd/src/io/impls.rs b/sgx_tstd/src/io/impls.rs index 8e7f61a1f..a421001ad 100644 --- a/sgx_tstd/src/io/impls.rs +++ b/sgx_tstd/src/io/impls.rs @@ -38,7 +38,7 @@ impl Read for &mut R { } #[inline] - fn read_buf(&mut self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { (**self).read_buf(cursor) } @@ -141,7 +141,7 @@ impl Read for Box { } #[inline] - fn read_buf(&mut self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { (**self).read_buf(cursor) } @@ -264,7 +264,7 @@ impl Read for &[u8] { } #[inline] - fn read_buf(&mut self, mut cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, mut cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { let amt = cmp::min(cursor.capacity(), self.len()); let (a, b) = self.split_at(amt); @@ -450,7 +450,7 @@ impl Read for VecDeque { } #[inline] - fn read_buf(&mut self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { let (ref mut front, _) = self.as_slices(); let n = cmp::min(cursor.capacity(), front.len()); Read::read_buf(front, cursor)?; @@ -538,7 +538,7 @@ impl Write for VecDeque { } } -impl<'a> io::Write for core::io::BorrowedCursor<'a> { +impl<'a> io::Write for core::io::BorrowedCursor<'a, u8> { fn write(&mut self, buf: &[u8]) -> io::Result { let amt = cmp::min(buf.len(), self.capacity()); self.append(&buf[..amt]); diff --git a/sgx_tstd/src/io/mod.rs b/sgx_tstd/src/io/mod.rs index 181dee772..da6426f55 100644 --- a/sgx_tstd/src/io/mod.rs +++ b/sgx_tstd/src/io/mod.rs @@ -420,64 +420,104 @@ pub(crate) fn default_read_to_end( let start_cap = buf.capacity(); // Optionally limit the maximum bytes read on each iteration. // This adds an arbitrary fiddle factor to allow for more data than we expect. - let max_read_size = - size_hint.and_then(|s| s.checked_add(1024)?.checked_next_multiple_of(DEFAULT_BUF_SIZE)); - - let mut initialized = 0; // Extra initialized bytes from previous loop iteration - loop { - if buf.len() == buf.capacity() { - buf.reserve(32); // buf is full, need more space + let mut max_read_size = size_hint + .and_then(|s| s.checked_add(1024)?.checked_next_multiple_of(DEFAULT_BUF_SIZE)) + .unwrap_or(DEFAULT_BUF_SIZE); + + const PROBE_SIZE: usize = 32; + + fn small_probe_read(r: &mut R, buf: &mut Vec) -> Result { + let mut probe = [0u8; PROBE_SIZE]; + + loop { + match r.read(&mut probe) { + Ok(n) => { + // there is no way to recover from allocation failure here + // because the data has already been read. + buf.extend_from_slice(&probe[..n]); + return Ok(n); + } + Err(ref e) if e.is_interrupted() => continue, + Err(e) => return Err(e), + } } + } - let mut spare = buf.spare_capacity_mut(); - if let Some(size) = max_read_size { - let len = cmp::min(spare.len(), size); - spare = &mut spare[..len] - } - let mut read_buf: BorrowedBuf<'_> = spare.into(); + // avoid inflating empty/small vecs before we have determined that there's anything to read + if (size_hint.is_none() || size_hint == Some(0)) && buf.capacity() - buf.len() < PROBE_SIZE { + let read = small_probe_read(r, buf)?; - // SAFETY: These bytes were initialized but not filled in the previous loop - unsafe { - read_buf.set_init(initialized); + if read == 0 { + return Ok(0); } + } - let mut cursor = read_buf.unfilled(); - match r.read_buf(cursor.reborrow()) { - Ok(()) => {} - Err(e) if e.is_interrupted() => continue, - Err(e) => return Err(e), + loop { + if buf.len() == buf.capacity() && buf.capacity() == start_cap { + // The buffer might be an exact fit. Let's read into a probe buffer + // and see if it returns `Ok(0)`. If so, we've avoided an + // unnecessary doubling of the capacity. But if not, append the + // probe buffer to the primary buffer and let its capacity grow. + let read = small_probe_read(r, buf)?; + + if read == 0 { + return Ok(buf.len() - start_len); + } } - if cursor.written() == 0 { - return Ok(buf.len() - start_len); + if buf.len() == buf.capacity() { + // buf is full, need more space + buf.try_reserve(PROBE_SIZE).map_err(|_| crate::io::ErrorKind::OutOfMemory)?; } - // store how much was initialized but not filled - initialized = cursor.init_ref().len(); + let mut spare = buf.spare_capacity_mut(); + let buf_len = cmp::min(spare.len(), max_read_size); + spare = &mut spare[..buf_len]; + let mut read_buf: BorrowedBuf<'_, u8> = spare.into(); + + // Note that we don't track already initialized bytes here, but this is fine + // because we explicitly limit the read size + let mut cursor = read_buf.unfilled(); + let result = loop { + match r.read_buf(cursor.reborrow()) { + Err(e) if e.is_interrupted() => continue, + // Do not stop now in case of error: we might have received both data + // and an error + res => break res, + } + }; + + let bytes_read = cursor.written(); + let is_init = read_buf.is_init(); // SAFETY: BorrowedBuf's invariants mean this much memory is initialized. unsafe { - let new_len = read_buf.filled().len() + buf.len(); + let new_len = bytes_read + buf.len(); buf.set_len(new_len); } - if buf.len() == buf.capacity() && buf.capacity() == start_cap { - // The buffer might be an exact fit. Let's read into a probe buffer - // and see if it returns `Ok(0)`. If so, we've avoided an - // unnecessary doubling of the capacity. But if not, append the - // probe buffer to the primary buffer and let its capacity grow. - let mut probe = [0u8; 32]; - - loop { - match r.read(&mut probe) { - Ok(0) => return Ok(buf.len() - start_len), - Ok(n) => { - buf.extend_from_slice(&probe[..n]); - break; - } - Err(ref e) if e.is_interrupted() => continue, - Err(e) => return Err(e), - } + // Now that all data is pushed to the vector, we can fail without data loss + result?; + + if bytes_read == 0 { + return Ok(buf.len() - start_len); + } + + // Use heuristics to determine the max read size if no initial size hint was provided + if size_hint.is_none() { + // The reader is returning short reads but it doesn't call ensure_init(). + // In that case we no longer need to restrict read sizes to avoid + // initialization costs. + // When reading from disk we usually don't get any short reads except at EOF. + // So we wait for at least 2 short reads before uncapping the read buffer; + // this helps with the Windows issue. + if !is_init { + max_read_size = usize::MAX; + } + // we have passed a larger buffer than previously and the + // reader still hasn't returned a short read + else if buf_len >= max_read_size && bytes_read == buf_len { + max_read_size = max_read_size.saturating_mul(2); } } } @@ -534,15 +574,12 @@ pub(crate) fn default_read_exact(this: &mut R, mut buf: &mut [ } } -pub(crate) fn default_read_buf(read: F, mut cursor: BorrowedCursor<'_>) -> Result<()> +pub(crate) fn default_read_buf(read: F, mut cursor: BorrowedCursor<'_, u8>) -> Result<()> where F: FnOnce(&mut [u8]) -> Result, { - let n = read(cursor.ensure_init().init_mut())?; - unsafe { - // SAFETY: we initialised using `ensure_init` so there is no uninit data to advance to. - cursor.advance(n); - } + let n = read(cursor.ensure_init())?; + unsafe { cursor.advance(n) }; Ok(()) } @@ -876,7 +913,7 @@ pub trait Read { /// with uninitialized buffers. The new data will be appended to any existing contents of `buf`. /// /// The default implementation delegates to `read`. - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> Result<()> { default_read_buf(|b| self.read(b), buf) } @@ -898,7 +935,7 @@ pub trait Read { /// returns. /// /// If this function returns an error, all bytes read will be appended to `cursor`. - fn read_buf_exact(&mut self, mut cursor: BorrowedCursor<'_>) -> Result<()> { + fn read_buf_exact(&mut self, mut cursor: BorrowedCursor<'_, u8>) -> Result<()> { while cursor.capacity() > 0 { let prev_written = cursor.written(); match self.read_buf(cursor.reborrow()) { @@ -2614,51 +2651,61 @@ impl Read for Take { Ok(n) } - fn read_buf(&mut self, mut buf: BorrowedCursor<'_>) -> Result<()> { + fn read_buf(&mut self, mut buf: BorrowedCursor<'_, u8>) -> Result<()> { // Don't call into inner reader at all at EOF because it may still block if self.limit == 0 { return Ok(()); } - if self.limit <= buf.capacity() as u64 { - // if we just use an as cast to convert, limit may wrap around on a 32 bit target - let limit = cmp::min(self.limit, usize::MAX as u64) as usize; + if self.limit < buf.capacity() as u64 { + // The condition above guarantees that `self.limit` fits in `usize`. + let limit = self.limit as usize; - let extra_init = cmp::min(limit as usize, buf.init_ref().len()); + let is_init = buf.is_init(); // SAFETY: no uninit data is written to ibuf - let ibuf = unsafe { &mut buf.as_mut()[..limit] }; + let mut sliced_buf = BorrowedBuf::from(unsafe { &mut buf.as_mut()[..limit] }); - let mut sliced_buf: BorrowedBuf<'_> = ibuf.into(); - - // SAFETY: extra_init bytes of ibuf are known to be initialized - unsafe { - sliced_buf.set_init(extra_init); + if is_init { + // SAFETY: `sliced_buf` is a subslice of `buf`, so if `buf` was initialized then + // `sliced_buf` is. + unsafe { sliced_buf.set_init() }; } - let mut cursor = sliced_buf.unfilled(); - self.inner.read_buf(cursor.reborrow())?; + let result = self.inner.read_buf(sliced_buf.unfilled()); - let new_init = cursor.init_ref().len(); + let did_init_up_to_limit = sliced_buf.is_init(); let filled = sliced_buf.len(); - // cursor / sliced_buf / ibuf must drop here + // sliced_buf must drop here + + // Avoid accidentally quadratic behaviour by initializing the whole + // cursor if only part of it was initialized. + if did_init_up_to_limit && !is_init { + // SAFETY: No uninit data will be written. + let unfilled_before_advance = unsafe { buf.as_mut() }; + + unfilled_before_advance[limit..].write_filled(0); + + // SAFETY: `unfilled_before_advance[..limit]` was initialized by `T::read_buf`, and + // `unfilled_before_advance[limit..]` was just initialized. + unsafe { buf.set_init() }; + } unsafe { - // SAFETY: filled bytes have been filled and therefore initialized + // SAFETY: filled bytes have been filled buf.advance(filled); - // SAFETY: new_init bytes of buf's unfilled buffer have been initialized - buf.set_init(new_init); } self.limit -= filled as u64; + + result } else { let written = buf.written(); - self.inner.read_buf(buf.reborrow())?; + let result = self.inner.read_buf(buf.reborrow()); self.limit -= (buf.written() - written) as u64; + result } - - Ok(()) } } diff --git a/sgx_tstd/src/io/stdio.rs b/sgx_tstd/src/io/stdio.rs index 8a02e6145..62b73db03 100644 --- a/sgx_tstd/src/io/stdio.rs +++ b/sgx_tstd/src/io/stdio.rs @@ -109,7 +109,7 @@ impl Read for StdinRaw { handle_ebadf(self.0.read(buf), 0) } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { handle_ebadf(self.0.read_buf(buf), ()) } @@ -426,7 +426,7 @@ impl Read for Stdin { fn read(&mut self, buf: &mut [u8]) -> io::Result { self.lock().read(buf) } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.lock().read_buf(buf) } fn read_vectored(&mut self, bufs: &mut [IoSliceMut<'_>]) -> io::Result { @@ -459,7 +459,7 @@ impl Read for StdinLock<'_> { self.inner.read(buf) } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.inner.read_buf(buf) } diff --git a/sgx_tstd/src/io/tests.rs b/sgx_tstd/src/io/tests.rs index edaa5ee6c..8d6d9e4a7 100644 --- a/sgx_tstd/src/io/tests.rs +++ b/sgx_tstd/src/io/tests.rs @@ -179,7 +179,7 @@ fn read_exact_slice() { #[test_case] fn read_buf_exact() { let buf: &mut [_] = &mut [0; 4]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); let mut c = Cursor::new(&b""[..]); assert_eq!(c.read_buf_exact(buf.unfilled()).unwrap_err().kind(), io::ErrorKind::UnexpectedEof); @@ -624,7 +624,7 @@ fn bench_take_read_buf(b: &mut Bencher) { b.iter(|| { let buf: &mut [_] = &mut [MaybeUninit::uninit(); 64]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); [255; 128].take(64).read_buf(buf.unfilled()).unwrap(); }); diff --git a/sgx_tstd/src/io/util.rs b/sgx_tstd/src/io/util.rs index 19764de9e..f13a0170f 100644 --- a/sgx_tstd/src/io/util.rs +++ b/sgx_tstd/src/io/util.rs @@ -77,7 +77,7 @@ impl Read for Empty { } #[inline] - fn read_buf(&mut self, _cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, _cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { Ok(()) } } @@ -194,7 +194,7 @@ impl Read for Repeat { Ok(buf.len()) } - fn read_buf(&mut self, mut buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, mut buf: BorrowedCursor<'_, u8>) -> io::Result<()> { // SAFETY: No uninit bytes are being written for slot in unsafe { buf.as_mut() } { slot.write(self.byte); @@ -202,10 +202,7 @@ impl Read for Repeat { let remaining = buf.capacity(); - // SAFETY: the entire unfilled portion of buf has been initialized - unsafe { - buf.advance(remaining); - } + unsafe { buf.advance(remaining) }; Ok(()) } diff --git a/sgx_tstd/src/io/util/tests.rs b/sgx_tstd/src/io/util/tests.rs index 279f6f85c..cb5e8d6d6 100644 --- a/sgx_tstd/src/io/util/tests.rs +++ b/sgx_tstd/src/io/util/tests.rs @@ -40,25 +40,25 @@ fn empty_reads() { assert_eq!(Read::by_ref(&mut e).read(&mut [0; 1024]).unwrap(), 0); let buf: &mut [MaybeUninit<_>] = &mut []; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); e.read_buf(buf.unfilled()).unwrap(); assert_eq!(buf.len(), 0); assert_eq!(buf.init_len(), 0); let buf: &mut [_] = &mut [MaybeUninit::uninit()]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); e.read_buf(buf.unfilled()).unwrap(); assert_eq!(buf.len(), 0); assert_eq!(buf.init_len(), 0); let buf: &mut [_] = &mut [MaybeUninit::uninit(); 1024]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); e.read_buf(buf.unfilled()).unwrap(); assert_eq!(buf.len(), 0); assert_eq!(buf.init_len(), 0); let buf: &mut [_] = &mut [MaybeUninit::uninit(); 1024]; - let mut buf: BorrowedBuf<'_> = buf.into(); + let mut buf: BorrowedBuf<'_, u8> = buf.into(); Read::by_ref(&mut e).read_buf(buf.unfilled()).unwrap(); assert_eq!(buf.len(), 0); assert_eq!(buf.init_len(), 0); diff --git a/sgx_tstd/src/lib.rs b/sgx_tstd/src/lib.rs index cc68e5174..a9ba6eac4 100644 --- a/sgx_tstd/src/lib.rs +++ b/sgx_tstd/src/lib.rs @@ -34,14 +34,15 @@ #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] #![needs_panic_runtime] -#![allow(non_camel_case_types)] -#![allow(unused_must_use)] #![allow(dead_code)] #![allow(deprecated)] #![allow(incomplete_features)] #![allow(internal_features)] +#![allow(non_camel_case_types)] +#![allow(static_mut_refs)] #![allow(unused_assignments)] - #![allow(unused_features)] +#![allow(unused_features)] +#![allow(unused_must_use)] #![allow(clippy::assertions_on_constants)] #![allow(clippy::err_expect)] #![allow(clippy::explicit_auto_deref)] @@ -62,57 +63,49 @@ #![feature(allocator_internals)] #![feature(allow_internal_unsafe)] #![feature(allow_internal_unstable)] -#![feature(c_unwind)] -#![feature(concat_idents)] -#![feature(const_mut_refs)] #![feature(const_trait_impl)] #![feature(decl_macro)] #![feature(dropck_eyepatch)] -#![feature(if_let_guard)] #![feature(lang_items)] -#![feature(let_chains)] #![feature(min_specialization)] #![feature(must_not_suspend)] #![feature(needs_panic_runtime)] #![feature(negative_impls)] #![feature(never_type)] #![feature(prelude_import)] +#![feature(formatting_options)] #![feature(rustc_attrs)] #![feature(thread_local)] #![feature(try_blocks)] #![feature(type_alias_impl_trait)] -#![feature(utf8_chunks)] +// #![feature(utf8_chunks)] // // Library features (core): // tidy-alphabetical-start #![feature(char_internals)] #![feature(core_intrinsics)] #![feature(core_io_borrowed_buf)] +#![feature(borrowed_buf_init)] +#![feature(core_io)] +#![feature(core_io_internals)] #![feature(duration_constants)] #![feature(error_generic_member_access)] -#![feature(error_in_core)] #![feature(error_iter)] #![feature(exact_size_is_empty)] #![feature(exclusive_wrapper)] #![feature(extend_one)] #![feature(float_minimum_maximum)] +#![feature(fmt_internals)] #![feature(hasher_prefixfree_extras)] #![feature(hashmap_internals)] #![feature(ip)] -#![feature(ip_in_core)] -#![feature(maybe_uninit_slice)] -#![feature(maybe_uninit_uninit_array)] -#![feature(maybe_uninit_write_slice)] +#![feature(maybe_uninit_fill)] #![feature(panic_can_unwind)] -#![feature(panic_info_message)] #![feature(panic_internals)] -#![feature(prelude_2024)] #![feature(ptr_as_uninit)] -#![feature(raw_os_nonzero)] #![feature(slice_internals)] #![feature(std_internals)] #![feature(str_internals)] -#![feature(strict_provenance)] #![feature(type_ascription)] // tidy-alphabetical-end // @@ -121,10 +114,8 @@ #![feature(allocator_api)] #![feature(get_mut_unchecked)] #![feature(map_try_insert)] -#![feature(new_uninit)] #![feature(slice_concat_trait)] #![feature(try_reserve_kind)] -#![feature(vec_into_raw_parts)] // tidy-alphabetical-end // // Library features (unwind): @@ -134,38 +125,32 @@ // // Only for re-exporting: // tidy-alphabetical-start -#![feature(assert_matches)] #![feature(async_iterator)] #![feature(c_variadic)] #![feature(cfg_accessible)] #![feature(cfg_eval)] #![feature(concat_bytes)] #![feature(const_format_args)] -#![feature(core_panic)] #![feature(custom_test_frameworks)] #![feature(edition_panic)] #![feature(format_args_nl)] -#![feature(lazy_cell)] #![feature(log_syntax)] #![feature(test)] #![feature(trace_macros)] -// tidy-alphabetical-end -// -// Only used in tests/benchmarks: -// -// Only for const-ness: -// tidy-alphabetical-start -#![feature(const_hash)] +#![feature(core_float_math)] // tidy-alphabetical-end // #![default_lib_allocator] -// Explicitly import the prelude. The compiler uses this same unstable attribute -// to import the prelude implicitly when building crates that depend on std. -#[prelude_import] -#[allow(unused)] -use prelude::rust_2021::*; +#[cfg(feature = "backtrace")] +extern crate sgx_backtrace_sys; +#[cfg(feature = "backtrace")] +extern crate sgx_demangle; +extern crate sgx_alloc; + +#[global_allocator] +static GLOBAL: sgx_alloc::System = sgx_alloc::System; extern crate hashbrown; @@ -175,11 +160,6 @@ extern crate alloc as alloc_crate; // We always need an unwinder currently for backtraces extern crate sgx_unwind; -#[cfg(feature = "backtrace")] -extern crate sgx_backtrace_sys; -#[cfg(feature = "backtrace")] -extern crate sgx_demangle; -extern crate sgx_alloc; #[macro_use] extern crate sgx_types; @@ -204,6 +184,10 @@ pub mod rt; // The Rust prelude pub mod prelude; +#[prelude_import] +#[allow(unused)] +use prelude::rust_2021::*; + // Public module declarations and re-exports pub use alloc_crate::borrow; pub use alloc_crate::boxed; @@ -255,6 +239,30 @@ pub mod thread; pub mod ascii; #[cfg(feature = "backtrace")] pub mod backtrace; +// some libraries (typically anyhow) always assume backtrace is available when using std +#[cfg(not(feature = "backtrace"))] +pub mod backtrace { + pub struct Backtrace(); + impl Backtrace { + pub fn capture() -> Backtrace { + Backtrace() + } + pub fn status(&self) -> BacktraceStatus { + BacktraceStatus::Unsupported + } + } + impl crate::fmt::Display for Backtrace { + fn fmt(&self, fmt: &mut crate::fmt::Formatter<'_>) -> crate::fmt::Result { + fmt.write_str("unsupported backtrace") + } + } + pub enum BacktraceStatus { + Unsupported, + Disabled, + Captured, + } +} + pub mod collections; pub mod env; pub mod error; @@ -298,6 +306,7 @@ pub mod arch { } pub use sgx_trts::macros::is_x86_feature_detected; +pub use sgx_trts::veh; // Platform-abstraction modules mod sys; @@ -321,7 +330,7 @@ pub use core::{ // Re-export built-in macros defined through core. #[allow(deprecated)] pub use core::{ - assert, assert_matches, cfg, column, compile_error, concat, concat_idents, const_format_args, + assert, assert_matches, cfg, column, compile_error, concat, const_format_args, env, file, format_args, format_args_nl, include, include_bytes, include_str, line, log_syntax, module_path, option_env, stringify, trace_macros, }; diff --git a/sgx_tstd/src/net/tcp.rs b/sgx_tstd/src/net/tcp.rs index 4d60a3163..494c6e9fb 100644 --- a/sgx_tstd/src/net/tcp.rs +++ b/sgx_tstd/src/net/tcp.rs @@ -610,7 +610,7 @@ impl Read for TcpStream { self.0.read(buf) } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.0.read_buf(buf) } @@ -648,7 +648,7 @@ impl Read for &TcpStream { self.0.read(buf) } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.0.read_buf(buf) } diff --git a/sgx_tstd/src/net/tcp/tests.rs b/sgx_tstd/src/net/tcp/tests.rs index a89eb2d37..cb5ac76da 100644 --- a/sgx_tstd/src/net/tcp/tests.rs +++ b/sgx_tstd/src/net/tcp/tests.rs @@ -323,7 +323,7 @@ fn read_buf() { }); let mut s = t!(srv.accept()).0; - let mut buf: [MaybeUninit; 128] = MaybeUninit::uninit_array(); + let mut buf: [MaybeUninit; 128] = [const { MaybeUninit::uninit() }; 128]; let mut buf = BorrowedBuf::from(buf.as_mut_slice()); t!(s.read_buf(buf.unfilled())); assert_eq!(buf.filled(), &[1, 2, 3, 4]); diff --git a/sgx_tstd/src/num.rs b/sgx_tstd/src/num.rs index 8ef92023a..245927dfa 100644 --- a/sgx_tstd/src/num.rs +++ b/sgx_tstd/src/num.rs @@ -28,7 +28,7 @@ mod tests; #[cfg(feature = "unit_test")] mod benches; -pub use core::num::Wrapping; +pub use core::num::{Saturating, Wrapping}; pub use core::num::{FpCategory, ParseFloatError, ParseIntError, TryFromIntError}; pub use core::num::{NonZeroI128, NonZeroI16, NonZeroI32, NonZeroI64, NonZeroI8, NonZeroIsize}; pub use core::num::{NonZeroU128, NonZeroU16, NonZeroU32, NonZeroU64, NonZeroU8, NonZeroUsize}; diff --git a/sgx_tstd/src/os/fd/owned.rs b/sgx_tstd/src/os/fd/owned.rs index 052bd9a3f..095fbfa5f 100644 --- a/sgx_tstd/src/os/fd/owned.rs +++ b/sgx_tstd/src/os/fd/owned.rs @@ -43,11 +43,9 @@ use crate::sys_common::{AsInner, FromInner, IntoInner}; /// descriptor, which is then borrowed under the same lifetime. #[derive(Copy, Clone)] #[repr(transparent)] -#[rustc_layout_scalar_valid_range_start(0)] // libstd/os/raw/mod.rs assures me that every libstd-supported platform has a // 32-bit c_int. Below is -2, in two's complement, but that only works out // because c_int is 32 bits. -#[rustc_layout_scalar_valid_range_end(0xFF_FF_FF_FE)] pub struct BorrowedFd<'fd> { fd: RawFd, _phantom: PhantomData<&'fd OwnedFd>, @@ -63,11 +61,9 @@ pub struct BorrowedFd<'fd> { /// passed as a consumed argument or returned as an owned value, and it never /// has the value `-1`. #[repr(transparent)] -#[rustc_layout_scalar_valid_range_start(0)] // libstd/os/raw/mod.rs assures me that every libstd-supported platform has a // 32-bit c_int. Below is -2, in two's complement, but that only works out // because c_int is 32 bits. -#[rustc_layout_scalar_valid_range_end(0xFF_FF_FF_FE)] pub struct OwnedFd { fd: RawFd, } @@ -83,7 +79,7 @@ impl BorrowedFd<'_> { pub const unsafe fn borrow_raw(fd: RawFd) -> Self { assert!(fd != u32::MAX as RawFd); // SAFETY: we just asserted that the value is in the valid range and isn't `-1` (the only value bigger than `0xFF_FF_FF_FE` unsigned) - unsafe { Self { fd, _phantom: PhantomData } } + Self { fd, _phantom: PhantomData } } } @@ -146,7 +142,7 @@ impl FromRawFd for OwnedFd { unsafe fn from_raw_fd(fd: RawFd) -> Self { assert_ne!(fd, u32::MAX as RawFd); // SAFETY: we just asserted that the value is in the valid range and isn't `-1` (the only value bigger than `0xFF_FF_FF_FE` unsigned) - unsafe { Self { fd } } + Self { fd } } } diff --git a/sgx_tstd/src/panic.rs b/sgx_tstd/src/panic.rs index 50c51a407..983866503 100644 --- a/sgx_tstd/src/panic.rs +++ b/sgx_tstd/src/panic.rs @@ -19,34 +19,193 @@ use crate::any::Any; use crate::collections; +use crate::fmt; use crate::panicking; #[cfg(feature = "backtrace")] use crate::sync::atomic::{AtomicUsize, Ordering}; use crate::sync::{Mutex, RwLock}; use crate::thread::Result; -#[doc(hidden)] -#[allow_internal_unstable(libstd_sys_internals, const_format_args, core_panic, rt)] -#[cfg_attr(not(test), rustc_diagnostic_item = "std_panic_2015_macro")] -#[rustc_macro_transparency = "semitransparent"] -pub macro panic_2015 { - () => ({ - $crate::rt::begin_panic("explicit panic") - }), - ($msg:expr $(,)?) => ({ - $crate::rt::begin_panic($msg); - }), - // Special-case the single-argument case for const_panic. - ("{}", $arg:expr $(,)?) => ({ - $crate::rt::panic_display(&$arg); - }), - ($fmt:expr, $($arg:tt)+) => ({ - // Semicolon to prevent temporaries inside the formatting machinery from - // being considered alive in the caller after the panic_fmt call. - $crate::rt::panic_fmt($crate::const_format_args!($fmt, $($arg)+)); - }), +/// A struct providing information about a panic. +/// +/// `PanicHookInfo` structure is passed to a panic hook set by the [`set_hook`] function. +/// +/// # Examples +/// +/// ```should_panic +/// use std::panic; +/// +/// panic::set_hook(Box::new(|panic_info| { +/// println!("panic occurred: {panic_info}"); +/// })); +/// +/// panic!("critical system failure"); +/// ``` +/// +/// [`set_hook`]: ../../std/panic/fn.set_hook.html +#[derive(Debug)] +pub struct PanicHookInfo<'a> { + payload: &'a (dyn Any + Send), + location: &'a Location<'a>, + can_unwind: bool, + force_no_backtrace: bool, } +impl<'a> PanicHookInfo<'a> { + #[inline] + pub(crate) fn new( + location: &'a Location<'a>, + payload: &'a (dyn Any + Send), + can_unwind: bool, + force_no_backtrace: bool, + ) -> Self { + PanicHookInfo { payload, location, can_unwind, force_no_backtrace } + } + + /// Returns the payload associated with the panic. + /// + /// This will commonly, but not always, be a `&'static str` or [`String`]. + /// + /// A invocation of the `panic!()` macro in Rust 2021 or later will always result in a + /// panic payload of type `&'static str` or `String`. + /// + /// Only an invocation of [`panic_any`] + /// (or, in Rust 2018 and earlier, `panic!(x)` where `x` is something other than a string) + /// can result in a panic payload other than a `&'static str` or `String`. + /// + /// [`String`]: ../../std/string/struct.String.html + /// + /// # Examples + /// + /// ```should_panic + /// use std::panic; + /// + /// panic::set_hook(Box::new(|panic_info| { + /// if let Some(s) = panic_info.payload().downcast_ref::<&str>() { + /// println!("panic occurred: {s:?}"); + /// } else if let Some(s) = panic_info.payload().downcast_ref::() { + /// println!("panic occurred: {s:?}"); + /// } else { + /// println!("panic occurred"); + /// } + /// })); + /// + /// panic!("Normal panic"); + /// ``` + #[must_use] + #[inline] + pub fn payload(&self) -> &(dyn Any + Send) { + self.payload + } + + /// Returns the payload associated with the panic, if it is a string. + /// + /// This returns the payload if it is of type `&'static str` or `String`. + /// + /// A invocation of the `panic!()` macro in Rust 2021 or later will always result in a + /// panic payload where `payload_as_str` returns `Some`. + /// + /// Only an invocation of [`panic_any`] + /// (or, in Rust 2018 and earlier, `panic!(x)` where `x` is something other than a string) + /// can result in a panic payload where `payload_as_str` returns `None`. + /// + /// # Example + /// + /// ```should_panic + /// #![feature(panic_payload_as_str)] + /// + /// std::panic::set_hook(Box::new(|panic_info| { + /// if let Some(s) = panic_info.payload_as_str() { + /// println!("panic occurred: {s:?}"); + /// } else { + /// println!("panic occurred"); + /// } + /// })); + /// + /// panic!("Normal panic"); + /// ``` + #[must_use] + #[inline] + pub fn payload_as_str(&self) -> Option<&str> { + if let Some(s) = self.payload.downcast_ref::<&str>() { + Some(s) + } else if let Some(s) = self.payload.downcast_ref::() { + Some(s) + } else { + None + } + } + + /// Returns information about the location from which the panic originated, + /// if available. + /// + /// This method will currently always return [`Some`], but this may change + /// in future versions. + /// + /// # Examples + /// + /// ```should_panic + /// use std::panic; + /// + /// panic::set_hook(Box::new(|panic_info| { + /// if let Some(location) = panic_info.location() { + /// println!("panic occurred in file '{}' at line {}", + /// location.file(), + /// location.line(), + /// ); + /// } else { + /// println!("panic occurred but can't get location information..."); + /// } + /// })); + /// + /// panic!("Normal panic"); + /// ``` + #[must_use] + #[inline] + pub fn location(&self) -> Option<&Location<'_>> { + // NOTE: If this is changed to sometimes return None, + // deal with that case in std::panicking::default_hook and core::panicking::panic_fmt. + Some(&self.location) + } + + /// Returns whether the panic handler is allowed to unwind the stack from + /// the point where the panic occurred. + /// + /// This is true for most kinds of panics with the exception of panics + /// caused by trying to unwind out of a `Drop` implementation or a function + /// whose ABI does not support unwinding. + /// + /// It is safe for a panic handler to unwind even when this function returns + /// false, however this will simply cause the panic handler to be called + /// again. + #[must_use] + #[inline] + pub fn can_unwind(&self) -> bool { + self.can_unwind + } + + #[doc(hidden)] + #[inline] + pub fn force_no_backtrace(&self) -> bool { + self.force_no_backtrace + } +} + +impl fmt::Display for PanicHookInfo<'_> { + fn fmt(&self, formatter: &mut fmt::Formatter<'_>) -> fmt::Result { + formatter.write_str("panicked at ")?; + self.location.fmt(formatter)?; + if let Some(payload) = self.payload_as_str() { + formatter.write_str(":\n")?; + formatter.write_str(payload)?; + } + Ok(()) + } +} + +#[doc(hidden)] +pub use core::panic::panic_2015; + #[doc(hidden)] pub use core::panic::panic_2021; diff --git a/sgx_tstd/src/panicking.rs b/sgx_tstd/src/panicking.rs index c98b7ac0c..e8b529d2f 100644 --- a/sgx_tstd/src/panicking.rs +++ b/sgx_tstd/src/panicking.rs @@ -27,6 +27,7 @@ #[cfg(feature = "backtrace")] use crate::panic::BacktraceStyle; use core::panic::{Location, PanicInfo, PanicPayload}; +use crate::panic::PanicHookInfo; use crate::any::Any; use crate::fmt; @@ -70,26 +71,26 @@ extern "Rust" { /// This function is called by the panic runtime if FFI code catches a Rust /// panic but doesn't rethrow it. We don't support this case since it messes /// with our panic count. -#[rustc_std_internal_symbol] +#[no_mangle] extern "C" fn __rust_drop_panic() -> ! { rtabort!("Rust panics must be rethrown"); } /// This function is called by the panic runtime if it catches an exception /// object which does not correspond to a Rust panic. -#[rustc_std_internal_symbol] +#[no_mangle] extern "C" fn __rust_foreign_exception() -> ! { rtabort!("Rust cannot catch foreign exceptions"); } enum Hook { Default, - Custom(Box) + 'static + Sync + Send>), + Custom(Box) + 'static + Sync + Send>), } impl Hook { #[inline] - fn into_box(self) -> Box) + 'static + Sync + Send> { + fn into_box(self) -> Box) + 'static + Sync + Send> { match self { Hook::Default => Box::new(default_hook), Hook::Custom(hook) => hook, @@ -142,7 +143,7 @@ static HOOK: RwLock = RwLock::new(Hook::Default); /// /// panic!("Normal panic"); /// ``` -pub fn set_hook(hook: Box) + 'static + Sync + Send>) { +pub fn set_hook(hook: Box) + 'static + Sync + Send>) { if thread::panicking() { panic!("cannot modify the panic hook from a panicking thread"); } @@ -185,7 +186,7 @@ pub fn set_hook(hook: Box) + 'static + Sync + Send>) { /// panic!("Normal panic"); /// ``` #[must_use] -pub fn take_hook() -> Box) + 'static + Sync + Send> { +pub fn take_hook() -> Box) + 'static + Sync + Send> { if thread::panicking() { panic!("cannot modify the panic hook from a panicking thread"); } @@ -230,7 +231,7 @@ pub fn take_hook() -> Box) + 'static + Sync + Send> { /// ``` pub fn update_hook(hook_fn: F) where - F: Fn(&(dyn Fn(&PanicInfo<'_>) + Send + Sync + 'static), &PanicInfo<'_>) + F: Fn(&(dyn Fn(&PanicHookInfo<'_>) + Send + Sync + 'static), &PanicHookInfo<'_>) + Sync + Send + 'static, @@ -245,11 +246,11 @@ where } #[cfg(not(feature = "stdio"))] -fn default_hook(_info: &PanicInfo<'_>) {} +fn default_hook(_info: &PanicHookInfo<'_>) {} /// The default panic handler. #[cfg(feature = "stdio")] -fn default_hook(info: &PanicInfo<'_>) { +fn default_hook(info: &PanicHookInfo<'_>) { // If this is a double panic, make sure that we print a backtrace // for this panic. Otherwise only print it if logging is enabled. #[cfg(feature = "backtrace")] @@ -432,7 +433,6 @@ pub mod panic_count { } } -/// Invoke a closure, capturing the cause of an unwinding panic if one occurs. /// Invoke a closure, capturing the cause of an unwinding panic if one occurs. pub unsafe fn r#try R>(f: F) -> Result> { union Data { @@ -478,7 +478,7 @@ pub unsafe fn r#try R>(f: F) -> Result> // - `do_catch`, the second argument, can be called with the `data_ptr` as well. // See their safety preconditions for more information unsafe { - return if intrinsics::r#try(do_call::, data_ptr, do_catch::) == 0 { + return if !intrinsics::catch_unwind(do_call::, data_ptr, do_catch::) { Ok(ManuallyDrop::into_inner(data.r)) } else { Err(ManuallyDrop::into_inner(data.p)) @@ -556,29 +556,24 @@ pub fn panicking() -> bool { #[panic_handler] pub fn begin_panic_handler(info: &PanicInfo<'_>) -> ! { struct FormatStringPayload<'a> { - inner: &'a fmt::Arguments<'a>, + inner: &'a core::panic::PanicMessage<'a>, string: Option, } - impl<'a> FormatStringPayload<'a> { - fn new(inner: &'a fmt::Arguments<'a>) -> Self { - Self { inner, string: None } - } - + impl FormatStringPayload<'_> { fn fill(&mut self) -> &mut String { - use crate::fmt::Write; - let inner = self.inner; // Lazily, the first time this gets called, run the actual string formatting. self.string.get_or_insert_with(|| { let mut s = String::new(); - let _err = s.write_fmt(*inner); + let mut fmt = fmt::Formatter::new(&mut s, fmt::FormattingOptions::new()); + let _err = fmt::Display::fmt(&inner, &mut fmt); s }) } } - unsafe impl<'a> PanicPayload for FormatStringPayload<'a> { + unsafe impl PanicPayload for FormatStringPayload<'_> { fn take_box(&mut self) -> *mut (dyn Any + Send) { // We do two allocations here, unfortunately. But (a) they're required with the current // scheme, and (b) we don't handle panic + OOM properly anyway (see comment in @@ -592,6 +587,16 @@ pub fn begin_panic_handler(info: &PanicInfo<'_>) -> ! { } } + impl fmt::Display for FormatStringPayload<'_> { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + if let Some(s) = &self.string { + f.write_str(s) + } else { + fmt::Display::fmt(&self.inner, f) + } + } + } + struct StaticStrPayload(&'static str); unsafe impl PanicPayload for StaticStrPayload { @@ -602,27 +607,33 @@ pub fn begin_panic_handler(info: &PanicInfo<'_>) -> ! { fn get(&mut self) -> &(dyn Any + Send) { &self.0 } + + fn as_str(&mut self) -> Option<&str> { + Some(self.0) + } + } + + impl fmt::Display for StaticStrPayload { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + f.write_str(self.0) + } } let loc = info.location().unwrap(); // The current implementation always returns Some - let msg = info.message().unwrap(); // The current implementation always returns Some + let msg = info.message(); #[cfg(feature = "backtrace")] { - crate::sys_common::backtrace::__rust_end_short_backtrace(move || { - // FIXME: can we just pass `info` along rather than taking it apart here, only to have - // `rust_panic_with_hook` construct a new `PanicInfo`? - if let Some(msg) = msg.as_str() { + crate::sys::backtrace::__rust_end_short_backtrace(move || { + if let Some(s) = msg.as_str() { rust_panic_with_hook( - &mut StaticStrPayload(msg), - info.message(), + &mut StaticStrPayload(s), loc, info.can_unwind(), info.force_no_backtrace(), ); } else { rust_panic_with_hook( - &mut FormatStringPayload::new(msg), - info.message(), + &mut FormatStringPayload { inner: &msg, string: None }, loc, info.can_unwind(), info.force_no_backtrace(), @@ -632,21 +643,19 @@ pub fn begin_panic_handler(info: &PanicInfo<'_>) -> ! { } #[cfg(not(feature = "backtrace"))] { - if let Some(msg) = msg.as_str() { + if let Some(s) = msg.as_str() { rust_panic_with_hook( - &mut StaticStrPayload(msg), - info.message(), + &mut StaticStrPayload(s), loc, info.can_unwind(), - /* force_no_backtrace */ true, + info.force_no_backtrace(), ); } else { rust_panic_with_hook( - &mut FormatStringPayload::new(msg), - info.message(), + &mut FormatStringPayload { inner: &msg, string: None }, loc, info.can_unwind(), - /* force_no_backtrace */ true, + info.force_no_backtrace(), ); } } @@ -696,9 +705,19 @@ pub const fn begin_panic(msg: M) -> ! { } } + impl fmt::Display for Payload { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + match &self.inner { + Some(a) => f.write_str(payload_as_str(a)), + None => crate::sys::abort_internal(), + } + } + } + let loc = Location::caller(); - #[cfg(feature = "backtrace")] { - crate::sys_common::backtrace::__rust_end_short_backtrace(move || { + #[cfg(feature = "backtrace")] + { + crate::sys::backtrace::__rust_end_short_backtrace(move || { rust_panic_with_hook( &mut Payload::new(msg), None, @@ -711,7 +730,6 @@ pub const fn begin_panic(msg: M) -> ! { #[cfg(not(feature = "backtrace"))] { rust_panic_with_hook( &mut Payload::new(msg), - None, loc, /* can_unwind */ true, /* force_no_backtrace */ true, @@ -719,6 +737,16 @@ pub const fn begin_panic(msg: M) -> ! { } } +fn payload_as_str(payload: &dyn Any) -> &str { + if let Some(&s) = payload.downcast_ref::<&'static str>() { + s + } else if let Some(s) = payload.downcast_ref::() { + s.as_str() + } else { + "Box" + } +} + /// Central point for dispatching panics. /// /// Executes the primary logic for a panic, including checking for recursive @@ -726,7 +754,6 @@ pub const fn begin_panic(msg: M) -> ! { /// abort or unwind. fn rust_panic_with_hook( payload: &mut dyn PanicPayload, - message: Option<&fmt::Arguments<'_>>, location: &Location<'_>, can_unwind: bool, force_no_backtrace: bool, @@ -737,27 +764,21 @@ fn rust_panic_with_hook( if let Some(must_abort) = must_abort { match must_abort { panic_count::MustAbort::PanicInHook => { - // Don't try to print the message in this case - // - perhaps that is causing the recursive panics. - rtprintpanic!("thread panicked while processing panic. aborting.\n"); + // Don't try to format the message in this case, perhaps that is causing the + // recursive panics. However if the message is just a string, no user-defined + // code is involved in printing it, so that is risk-free. + let message: &str = payload.as_str().unwrap_or_default(); + rtprintpanic!( + "panicked at {location}:\n{message}\nthread panicked while processing panic. aborting.\n" + ); } panic_count::MustAbort::AlwaysAbort => { - // Unfortunately, this does not print a backtrace, because creating - // a `Backtrace` will allocate, which we must to avoid here. - let panicinfo = PanicInfo::internal_constructor( - message, - location, - can_unwind, - force_no_backtrace, - ); - rtprintpanic!("{panicinfo}\npanicked after panic::always_abort(), aborting.\n"); + rtprintpanic!("aborting due to panic at {location}:\n{payload}\n"); } } crate::sys::abort_internal(); } - let mut info = - PanicInfo::internal_constructor(message, location, can_unwind, force_no_backtrace); let hook = HOOK.read().unwrap_or_else(PoisonError::into_inner); match *hook { // Some platforms (like wasm) know that printing to stderr won't ever actually @@ -769,12 +790,15 @@ fn rust_panic_with_hook( #[cfg(feature = "stdio")] Hook::Default if panic_output().is_none() => {} Hook::Default => { - info.set_payload(payload.get()); - default_hook(&info); + default_hook(&PanicHookInfo::new( + location, + payload.get(), + can_unwind, + force_no_backtrace, + )); } Hook::Custom(ref hook) => { - info.set_payload(payload.get()); - hook(&info); + hook(&PanicHookInfo::new(location, payload.get(), can_unwind, force_no_backtrace)); } }; drop(hook); @@ -812,13 +836,19 @@ pub fn rust_panic_without_hook(payload: Box) -> ! { } } + impl fmt::Display for RewrapBox { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + f.write_str(payload_as_str(&self.0)) + } + } + rust_panic(&mut RewrapBox(payload)) } /// An unmangled function (through `rustc_std_internal_symbol`) on which to slap /// yer breakpoints. #[inline(never)] -#[rustc_std_internal_symbol] +#[no_mangle] fn rust_panic(msg: &mut dyn PanicPayload) -> ! { let code = unsafe { __rust_start_panic(msg) }; rtabort!("failed to initiate panic, error {code}") diff --git a/sgx_tstd/src/prelude/v1.rs b/sgx_tstd/src/prelude/v1.rs index 7adb79ba2..74cb45dd6 100644 --- a/sgx_tstd/src/prelude/v1.rs +++ b/sgx_tstd/src/prelude/v1.rs @@ -45,17 +45,16 @@ pub use crate::result::Result::{self, Err, Ok}; #[allow(deprecated)] #[doc(no_inline)] pub use core::prelude::v1::{ - assert, cfg, column, compile_error, concat, concat_idents, env, file, format_args, - format_args_nl, include, include_bytes, include_str, line, log_syntax, module_path, option_env, - stringify, trace_macros, Clone, Copy, Debug, Default, Eq, Hash, Ord, PartialEq, PartialOrd, + assert, assert_eq, assert_ne, cfg, column, compile_error, concat, debug_assert, + debug_assert_eq, debug_assert_ne, env, file, format_args, include, include_bytes, + include_str, line, log_syntax, matches, module_path, option_env, stringify, todo, + r#try, trace_macros, unimplemented, unreachable, write, writeln, + Clone, Copy, Debug, Default, Eq, Hash, Ord, PartialEq, PartialOrd, }; #[doc(no_inline)] pub use core::prelude::v1::concat_bytes; -#[allow(deprecated)] -pub use core::prelude::v1::{RustcDecodable, RustcEncodable}; - // Do not `doc(no_inline)` so that they become doc items on their own // (no public module for them to be re-exported from). pub use core::prelude::v1::{ @@ -82,3 +81,22 @@ pub use crate::boxed::Box; pub use crate::string::{String, ToString}; #[doc(no_inline)] pub use crate::vec::Vec; + +// Std-defined macros that belong in the prelude (matching std::prelude::v1). +// Without these, downstream crates built with the `std` feature cannot resolve +// `panic!` (e.g. via `debug_assert!`), `vec!`, `format!`, etc. unqualified. +#[doc(no_inline)] +pub use crate::{dbg, eprint, eprintln, format, print, println, thread_local}; + +// `vec` and `panic` would be ambiguous with the modules of the same name, so +// shadow those modules with private empty modules and glob-export only the +// macros (this mirrors std's own prelude mechanism). +mod ambiguous_macros_only { + #[allow(hidden_glob_reexports)] + mod vec {} + #[allow(hidden_glob_reexports)] + mod panic {} + pub use crate::*; +} +#[doc(no_inline)] +pub use self::ambiguous_macros_only::{panic, vec}; diff --git a/sgx_tstd/src/process.rs b/sgx_tstd/src/process.rs index a4ce47308..c9c9a3140 100644 --- a/sgx_tstd/src/process.rs +++ b/sgx_tstd/src/process.rs @@ -360,7 +360,7 @@ impl Read for ChildStdout { self.inner.read(buf) } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.inner.read_buf(buf) } @@ -428,7 +428,7 @@ impl Read for ChildStderr { self.inner.read(buf) } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.inner.read_buf(buf) } diff --git a/sgx_tstd/src/sync/mod.rs b/sgx_tstd/src/sync/mod.rs index 3496aa75a..085289a2f 100644 --- a/sgx_tstd/src/sync/mod.rs +++ b/sgx_tstd/src/sync/mod.rs @@ -171,7 +171,6 @@ pub use alloc_crate::sync::{Arc, Weak}; pub use core::sync::atomic; -pub use core::sync::Exclusive; pub use self::barrier::{Barrier, BarrierWaitResult}; pub use self::condvar::{Condvar, WaitTimeoutResult}; diff --git a/sgx_tstd/src/sys/common/thread_local/fast_local.rs b/sgx_tstd/src/sys/common/thread_local/fast_local.rs index 3b15fa3fe..674861221 100644 --- a/sgx_tstd/src/sys/common/thread_local/fast_local.rs +++ b/sgx_tstd/src/sys/common/thread_local/fast_local.rs @@ -23,7 +23,7 @@ use crate::{fmt, mem, panic}; #[allow_internal_unstable(thread_local_internals, cfg_target_thread_local, thread_local)] #[allow_internal_unsafe] -#[rustc_macro_transparency = "semitransparent"] +#[rustc_macro_transparency = "semiopaque"] pub macro thread_local_inner { // used to generate the `LocalKey` value for const-initialized thread locals (@key $t:ty, const $init:expr) => {{ diff --git a/sgx_tstd/src/sys/common/thread_local/os_local.rs b/sgx_tstd/src/sys/common/thread_local/os_local.rs index 3e36e17c1..35e30b69a 100644 --- a/sgx_tstd/src/sys/common/thread_local/os_local.rs +++ b/sgx_tstd/src/sys/common/thread_local/os_local.rs @@ -23,7 +23,7 @@ use crate::{fmt, marker, panic, ptr}; #[allow_internal_unstable(thread_local_internals)] #[allow_internal_unsafe] -#[rustc_macro_transparency = "semitransparent"] +#[rustc_macro_transparency = "semiopaque"] pub macro thread_local_inner { // used to generate the `LocalKey` value for const-initialized thread locals (@key $t:ty, const $init:expr) => {{ @@ -191,7 +191,7 @@ unsafe extern "C" fn destroy_value(ptr: *mut u8) { let ret = panic::catch_unwind(|| unsafe { let ptr = Box::from_raw(ptr as *mut Value); let key = ptr.key; - key.os.set(ptr::invalid_mut(1)); + key.os.set(ptr::without_provenance_mut(1)); drop(ptr); key.os.set(ptr::null_mut()); }); diff --git a/sgx_tstd/src/sys/fd.rs b/sgx_tstd/src/sys/fd.rs index 6dc3ee8da..f151a5690 100644 --- a/sgx_tstd/src/sys/fd.rs +++ b/sgx_tstd/src/sys/fd.rs @@ -20,7 +20,6 @@ mod tests; use crate::cmp; use crate::io::{self, BorrowedCursor, IoSlice, IoSliceMut, Read}; -use crate::mem::MaybeUninit; use crate::os::unix::io::{AsFd, AsRawFd, BorrowedFd, FromRawFd, IntoRawFd, OwnedFd, RawFd}; use crate::sys::cvt_ocall; use crate::sys_common::{AsInner, FromInner, IntoInner}; @@ -61,15 +60,13 @@ impl FileDesc { cvt_ocall(unsafe { libc::pread64(self.as_raw_fd(), buf, offset as _) }) } - pub fn read_buf(&self, mut cursor: BorrowedCursor<'_>) -> io::Result<()> { + pub fn read_buf(&self, mut cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { let ret = cvt_ocall(unsafe { - libc::read(self.as_raw_fd(), MaybeUninit::slice_assume_init_mut(cursor.as_mut())) + libc::read(self.as_raw_fd(), cursor.as_mut().assume_init_mut()) })?; - // Safety: `ret` bytes were written to the initialized portion of the buffer - unsafe { - cursor.advance(ret); - } + unsafe { cursor.advance(ret) }; + Ok(()) } @@ -150,7 +147,7 @@ impl<'a> Read for &'a FileDesc { (**self).read(buf) } - fn read_buf(&mut self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { (**self).read_buf(cursor) } diff --git a/sgx_tstd/src/sys/fs.rs b/sgx_tstd/src/sys/fs.rs index 206bd86e1..2c5e86435 100644 --- a/sgx_tstd/src/sys/fs.rs +++ b/sgx_tstd/src/sys/fs.rs @@ -455,7 +455,7 @@ impl File { self.0.read_at(buf, offset) } - pub fn read_buf(&self, cursor: BorrowedCursor<'_>) -> io::Result<()> { + pub fn read_buf(&self, cursor: BorrowedCursor<'_, u8>) -> io::Result<()> { self.0.read_buf(cursor) } diff --git a/sgx_tstd/src/sys/net.rs b/sgx_tstd/src/sys/net.rs index 7077399e5..28f2062f5 100644 --- a/sgx_tstd/src/sys/net.rs +++ b/sgx_tstd/src/sys/net.rs @@ -17,7 +17,6 @@ use crate::cmp; use crate::io::{self, BorrowedBuf, BorrowedCursor, IoSlice, IoSliceMut}; -use crate::mem::MaybeUninit; use crate::net::{Shutdown, SocketAddr}; use crate::os::unix::io::{AsFd, AsRawFd, BorrowedFd, FromRawFd, IntoRawFd, RawFd}; use crate::sys::fd::FileDesc; @@ -187,17 +186,17 @@ impl Socket { self.0.duplicate().map(Socket) } - fn recv_with_flags(&self, mut buf: BorrowedCursor<'_>, flags: c_int) -> io::Result<()> { + fn recv_with_flags(&self, mut buf: BorrowedCursor<'_, u8>, flags: c_int) -> io::Result<()> { let ret = cvt_ocall(unsafe { libc::recv( self.as_raw_fd(), - MaybeUninit::slice_assume_init_mut(buf.as_mut()), + buf.as_mut().assume_init_mut(), flags, ) })?; - unsafe { - buf.advance(ret as usize); - } + + unsafe { buf.advance(ret as usize) }; + Ok(()) } @@ -213,7 +212,7 @@ impl Socket { Ok(buf.len()) } - pub fn read_buf(&self, buf: BorrowedCursor<'_>) -> io::Result<()> { + pub fn read_buf(&self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.recv_with_flags(buf, 0) } diff --git a/sgx_tstd/src/sys/os_str.rs b/sgx_tstd/src/sys/os_str.rs index aedf1a27e..453879e08 100644 --- a/sgx_tstd/src/sys/os_str.rs +++ b/sgx_tstd/src/sys/os_str.rs @@ -28,8 +28,6 @@ use crate::str; use crate::sync::Arc; use crate::sys_common::{AsInner, IntoInner}; -use core::str::Utf8Chunks; - #[cfg(feature = "unit_test")] mod tests; @@ -46,7 +44,7 @@ pub struct Slice { impl fmt::Debug for Slice { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - fmt::Debug::fmt(&Utf8Chunks::new(&self.inner).debug(), f) + fmt::Debug::fmt(&self.inner.utf8_chunks().debug(), f) } } @@ -58,7 +56,7 @@ impl fmt::Display for Slice { return "".fmt(f); } - for chunk in Utf8Chunks::new(&self.inner) { + for chunk in self.inner.utf8_chunks() { let valid = chunk.valid(); // If we successfully decoded the whole chunk as a valid string then // we can return a direct formatting of the string which will also diff --git a/sgx_tstd/src/sys/personality/dwarf/eh.rs b/sgx_tstd/src/sys/personality/dwarf/eh.rs index a215ff506..36a50f72f 100644 --- a/sgx_tstd/src/sys/personality/dwarf/eh.rs +++ b/sgx_tstd/src/sys/personality/dwarf/eh.rs @@ -142,7 +142,7 @@ pub unsafe fn find_eh_action(lsda: *const u8, context: &EHContext<'_>) -> Result // Can never have null landing pad for sjlj -- that would have // been indicated by a -1 call site index. // FIXME(strict provenance) - let lpad = ptr::from_exposed_addr((cs_lpad + 1) as usize); + let lpad = ptr::with_exposed_provenance((cs_lpad + 1) as usize); return Ok(interpret_cs_action(action_table, cs_action_entry, lpad)); } } diff --git a/sgx_tstd/src/sys/pipe.rs b/sgx_tstd/src/sys/pipe.rs index fa0fae426..32f38794c 100644 --- a/sgx_tstd/src/sys/pipe.rs +++ b/sgx_tstd/src/sys/pipe.rs @@ -42,7 +42,7 @@ impl AnonPipe { self.0.read(buf) } - pub fn read_buf(&self, buf: BorrowedCursor<'_>) -> io::Result<()> { + pub fn read_buf(&self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.0.read_buf(buf) } diff --git a/sgx_tstd/src/sys/stdio.rs b/sgx_tstd/src/sys/stdio.rs index 88cff4771..ba90614e2 100644 --- a/sgx_tstd/src/sys/stdio.rs +++ b/sgx_tstd/src/sys/stdio.rs @@ -37,7 +37,7 @@ impl io::Read for Stdin { unsafe { ManuallyDrop::new(FileDesc::from_raw_fd(libc::STDIN_FILENO)).read(buf) } } - fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> io::Result<()> { + fn read_buf(&mut self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { unsafe { ManuallyDrop::new(FileDesc::from_raw_fd(libc::STDIN_FILENO)).read_buf(buf) } } diff --git a/sgx_tstd/src/sys/time.rs b/sgx_tstd/src/sys/time.rs index bd6c6a38f..6663e4bea 100644 --- a/sgx_tstd/src/sys/time.rs +++ b/sgx_tstd/src/sys/time.rs @@ -26,8 +26,6 @@ pub const UNIX_EPOCH: SystemTime = SystemTime { t: Timespec::zero() }; #[derive(Copy, Clone, PartialEq, Eq, PartialOrd, Ord, Hash)] #[repr(transparent)] -#[rustc_layout_scalar_valid_range_start(0)] -#[rustc_layout_scalar_valid_range_end(999_999_999)] struct Nanoseconds(u32); #[derive(Copy, Clone, PartialEq, Eq, PartialOrd, Ord, Hash)] @@ -86,7 +84,7 @@ impl Timespec { const fn new(tv_sec: i64, tv_nsec: i64) -> Timespec { assert!(tv_nsec >= 0 && tv_nsec < NSEC_PER_SEC as i64); // SAFETY: The assert above checks tv_nsec is within the valid range - Timespec { tv_sec, tv_nsec: unsafe { Nanoseconds(tv_nsec as u32) } } + Timespec { tv_sec, tv_nsec: Nanoseconds(tv_nsec as u32) } } pub fn now(clock: libc::clockid_t) -> Timespec { diff --git a/sgx_tstd/src/sys/unsupported/pipe.rs b/sgx_tstd/src/sys/unsupported/pipe.rs index eda55a4d6..b75352414 100644 --- a/sgx_tstd/src/sys/unsupported/pipe.rs +++ b/sgx_tstd/src/sys/unsupported/pipe.rs @@ -32,7 +32,7 @@ impl AnonPipe { unsupported() } - pub fn read_buf(&self, _buf: BorrowedCursor<'_>) -> io::Result<()> { + pub fn read_buf(&self, _buf: BorrowedCursor<'_, u8>) -> io::Result<()> { unsupported() } diff --git a/sgx_tstd/src/sys/unsupported/process.rs b/sgx_tstd/src/sys/unsupported/process.rs index ee2c2bec5..c2ff01b9b 100644 --- a/sgx_tstd/src/sys/unsupported/process.rs +++ b/sgx_tstd/src/sys/unsupported/process.rs @@ -29,7 +29,7 @@ use crate::sys::unsupported::pipe::AnonPipe; use crate::sys::unsupported::{unsupported, unsupported_err}; use crate::sys_common::IntoInner; use crate::sys_common::process::{CommandEnv, CommandEnvs}; -use core::ffi::NonZero_c_int; +use core::num::NonZero; use sgx_oc as libc; use libc::{c_int, gid_t, pid_t, uid_t}; @@ -197,7 +197,7 @@ impl ExitStatus { // https://pubs.opengroup.org/onlinepubs/9699919799/functions/wait.html . If it is not // true for a platform pretending to be Unix, the tests (our doctests, and also // procsss_unix/tests.rs) will spot it. `ExitStatusError::code` assumes this too. - match NonZero_c_int::try_from(self.0) { + match NonZero::::try_from(self.0) { /* was nonzero */ Ok(failure) => Err(ExitStatusError(failure)), /* was zero, couldn't convert */ Err(_) => Ok(()), } @@ -301,7 +301,7 @@ impl fmt::Display for ExitStatus { } #[derive(PartialEq, Eq, Clone, Copy)] -pub struct ExitStatusError(NonZero_c_int); +pub struct ExitStatusError(NonZero); #[allow(clippy::from_over_into)] impl Into for ExitStatusError { diff --git a/sgx_tstd/src/sys_common/net.rs b/sgx_tstd/src/sys_common/net.rs index d4142b116..5d7b60b34 100644 --- a/sgx_tstd/src/sys_common/net.rs +++ b/sgx_tstd/src/sys_common/net.rs @@ -226,7 +226,7 @@ impl TcpStream { self.inner.read(buf) } - pub fn read_buf(&self, buf: BorrowedCursor<'_>) -> io::Result<()> { + pub fn read_buf(&self, buf: BorrowedCursor<'_, u8>) -> io::Result<()> { self.inner.read_buf(buf) } diff --git a/sgx_tstd/src/sys_common/once/futex.rs b/sgx_tstd/src/sys_common/once/futex.rs index 44448b358..47be747ca 100644 --- a/sgx_tstd/src/sys_common/once/futex.rs +++ b/sgx_tstd/src/sys_common/once/futex.rs @@ -144,12 +144,13 @@ impl Once { } RUNNING | QUEUED => { // Set the state to QUEUED if it is not already. - if state == RUNNING - && let Err(new) = + if state == RUNNING { + if let Err(new) = self.state.compare_exchange_weak(RUNNING, QUEUED, Relaxed, Acquire) - { - state = new; - continue; + { + state = new; + continue; + } } futex_wait(&self.state, QUEUED, None); diff --git a/sgx_tstd/src/thread/mod.rs b/sgx_tstd/src/thread/mod.rs index bc4da3027..54620c9cb 100644 --- a/sgx_tstd/src/thread/mod.rs +++ b/sgx_tstd/src/thread/mod.rs @@ -534,7 +534,12 @@ impl Builder { let main = Box::new(main); // SAFETY: dynamic size and alignment of the Box remain the same. See below for why the // lifetime change is justified. - let main = unsafe { Box::from_raw(Box::into_raw(main) as *mut (dyn FnOnce() + 'static)) }; + // raw-pointer `as` casts can no longer extend trait-object lifetimes (rust#141402); + // unsize with the natural lifetime, then transmute the lifetime to 'static. + let main: *mut (dyn FnOnce() + '_) = Box::into_raw(main); + let main = unsafe { + Box::from_raw(crate::mem::transmute::<_, *mut (dyn FnOnce() + 'static)>(main)) + }; Ok(JoinInner { // SAFETY: diff --git a/sgx_tstd/src/untrusted/path.rs b/sgx_tstd/src/untrusted/path.rs index e0b04cafc..55e05939b 100644 --- a/sgx_tstd/src/untrusted/path.rs +++ b/sgx_tstd/src/untrusted/path.rs @@ -156,7 +156,6 @@ impl PathEx for Path { /// /// This is a convenience function that coerces errors to false. If you want to /// check errors, call [`fs::metadata`]. - #[must_use] #[inline] fn exists(&self) -> bool { fs::metadata(self).is_ok() @@ -216,7 +215,6 @@ impl PathEx for Path { /// it. Only using `is_file` can break workflows like `diff <( prog_a )` on /// a Unix-like system for example. See [`fs::File::open`] or /// [`fs::OpenOptions::open`] for more information. - #[must_use] fn is_file(&self) -> bool { fs::metadata(self).map(|m| m.is_file()).unwrap_or(false) } @@ -243,7 +241,6 @@ impl PathEx for Path { /// This is a convenience function that coerces errors to false. If you want to /// check errors, call [`fs::metadata`] and handle its [`Result`]. Then call /// [`fs::Metadata::is_dir`] if it was [`Ok`]. - #[must_use] fn is_dir(&self) -> bool { fs::metadata(self).map(|m| m.is_dir()).unwrap_or(false) } @@ -269,7 +266,6 @@ impl PathEx for Path { /// assert_eq!(link_path.is_symlink(), true); /// assert_eq!(link_path.exists(), false); /// ``` - #[must_use] fn is_symlink(&self) -> bool { fs::symlink_metadata(self).map(|m| m.is_symlink()).unwrap_or(false) } diff --git a/sgx_tstd/src/untrusted/time.rs b/sgx_tstd/src/untrusted/time.rs index f7d9ca8fa..92b1c7608 100644 --- a/sgx_tstd/src/untrusted/time.rs +++ b/sgx_tstd/src/untrusted/time.rs @@ -33,7 +33,6 @@ impl InstantEx for Instant { /// /// let now = Instant::now(); /// ``` - #[must_use] fn now() -> Instant { Instant::_now() } @@ -60,7 +59,6 @@ impl InstantEx for Instant { /// sleep(three_secs); /// assert!(instant.elapsed() >= three_secs); /// ``` - #[must_use] fn elapsed(&self) -> Duration { Instant::_now() - *self } @@ -82,7 +80,6 @@ impl SystemTimeEx for SystemTime { /// /// let sys_time = SystemTime::now(); /// ``` - #[must_use] fn now() -> SystemTime { SystemTime::_now() } diff --git a/sgx_types/src/error/mod.rs b/sgx_types/src/error/mod.rs index c0ad4d3da..e262670b7 100644 --- a/sgx_types/src/error/mod.rs +++ b/sgx_types/src/error/mod.rs @@ -438,6 +438,13 @@ impl_enum! { PswNotAvailable = 0x0000_E052, CollateralVersionNotSupported = 0x0000_E053, TdxModuleMismatch = 0x0000_E060, + QeQeIdentityNotFound = 0x0000_E061, + TcbInfoNotFound = 0x0000_E062, + InternalServerError = 0x0000_E063, + SupplementalDataVersionNotSupport = 0x0000_E064, + RootCAUntrusted = 0x0000_E065, + TcbNotSupported = 0x0000_E066, + ConfigInvalidJson = 0x0000_E067, ErrorMax = 0x0000_E0FF, } } @@ -557,7 +564,22 @@ impl Quote3Error { "SGX quote verification collateral version not supported by QVL/QvE." } Quote3Error::TdxModuleMismatch => { - "TDX SEAM module identity is NOT match to Intel signed TDX SEAM module" + "TDX SEAM module identity is NOT match to Intel signed TDX SEAM module." + } + Quote3Error::QeQeIdentityNotFound => "QE identity was not found.", + Quote3Error::TcbInfoNotFound => "TCB Info was not found.", + Quote3Error::InternalServerError => "Internal server error.", + Quote3Error::SupplementalDataVersionNotSupport => { + "The supplemental data version is not supported." + } + Quote3Error::RootCAUntrusted => { + "The certificate used to establish SSL session is untrusted." + } + Quote3Error::TcbNotSupported => { + "Current TCB level cannot be found in platform/enclave TCB info." + } + Quote3Error::ConfigInvalidJson => { + "The QPL's config file is in JSON format but has a format error." } Quote3Error::ErrorMax => "Indicate max error to allow better translation.", } @@ -645,6 +667,13 @@ impl Quote3Error { Quote3Error::PswNotAvailable => "PswNotAvailable", Quote3Error::CollateralVersionNotSupported => "CollateralVersionNotSupported", Quote3Error::TdxModuleMismatch => "TdxModuleMismatch", + Quote3Error::QeQeIdentityNotFound => "QeQeIdentityNotFound", + Quote3Error::TcbInfoNotFound => "TcbInfoNotFound", + Quote3Error::InternalServerError => "InternalServerError", + Quote3Error::SupplementalDataVersionNotSupport => "SupplementalDataVersionNotSupport", + Quote3Error::RootCAUntrusted => "RootCAUntrusted", + Quote3Error::TcbNotSupported => "TcbNotSupported", + Quote3Error::ConfigInvalidJson => "ConfigInvalidJson", Quote3Error::ErrorMax => "ErrorMax", } } @@ -681,6 +710,11 @@ impl_enum! { StatusCertsUnavaliable = 0x0000_B012, StatusServiceUnavaliable = 0x0000_B013, InvalidConfig = 0x0000_B030, + CacheMissing = 0x0000_B031, + CacheExpired = 0x0000_B032, + RootCAUntrusted = 0x0000_B033, + ConfigInvalidJson = 0x0000_B035, + ConfigNotJson = 0x0000_B036, } } @@ -694,20 +728,20 @@ impl QcnlError { QcnlError::NetworkProxyFail => "Network error : Couldn't resolve proxy.", QcnlError::NetworkHostFail => "Network error : Couldn't resolve host.", QcnlError::NetworkNotConnected => { - "Network error : Failed to connect() to host or proxy." + "Network error: Failed to connect() to host or proxy." } QcnlError::NetworkHttp2Error => { - "Network error : A problem was detected in the HTTP2 framing layer." + "Network error: A problem was detected in the HTTP2 framing layer." } QcnlError::NetworkWriteError => { - "Network error : an error was returned to libcurl from a write callback." + "Network error: an error was returned to libcurl from a write callback." } QcnlError::NetworkTimeout => "Network error : Operation timeout.", QcnlError::NetworkHttpsError => { - "Network error : A problem occurred somewhere in the SSL/TLS handshake." + "Network error: A problem occurred somewhere in the SSL/TLS handshake." } QcnlError::NetworkUnknownOption => { - "Network error : An option passed to libcurl is not recognized/known." + "Network error: An option passed to libcurl is not recognized/known." } QcnlError::NetworkInitError => "Failed to initialize CURL library.", QcnlError::MsgError => "HTTP message error.", @@ -718,6 +752,15 @@ impl QcnlError { QcnlError::StatusCertsUnavaliable => "Certs not available.", QcnlError::StatusServiceUnavaliable => "Service is currently not available.", QcnlError::InvalidConfig => "Error in configuration file.", + QcnlError::CacheMissing => "Cache missing.", + QcnlError::CacheExpired => "Cache expired.", + QcnlError::RootCAUntrusted => { + "The certificate used to establish SSL session is untrusted." + } + QcnlError::ConfigInvalidJson => { + "The config file is in JSON format but has a format error." + } + QcnlError::ConfigNotJson => "The config file is not in JSON format.", } } @@ -744,6 +787,11 @@ impl QcnlError { QcnlError::StatusCertsUnavaliable => "StatusCertsUnavaliable", QcnlError::StatusServiceUnavaliable => "StatusServiceUnavaliable", QcnlError::InvalidConfig => "InvalidConfig", + QcnlError::CacheMissing => "CacheMissing", + QcnlError::CacheExpired => "CacheExpired", + QcnlError::RootCAUntrusted => "RootCAUntrusted", + QcnlError::ConfigInvalidJson => "ConfigInvalidJson", + QcnlError::ConfigNotJson => "ConfigNotJson", } } } @@ -754,10 +802,82 @@ impl fmt::Display for QcnlError { } } +impl_enum! { + #[repr(u32)] + #[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)] + pub enum TdxAttestError { + Success = 0x0000_0000, + Unexpected = 0x0000_0001, + InvalidParameter = 0x0000_0002, + OutOfMemory = 0x0000_0003, + VSockFailure = 0x0000_0004, + ReportFailure = 0x0000_0005, + ExtendFailure = 0x0000_0006, + NotSupported = 0x0000_0007, + QuoteFailure = 0x0000_0008, + DeviceBusy = 0x0000_0009, + DeviceFailure = 0x0000_000A, + InvaildRtmrIndex = 0x0000_000B, + UnsupportedAttKeyId = 0x0000_000C, + ErrorMax = 0x0000_000D, + } +} + +impl TdxAttestError { + pub fn __description(&self) -> &'static str { + match *self { + TdxAttestError::Success => "Success.", + TdxAttestError::Unexpected => "Unexpected error.", + TdxAttestError::InvalidParameter => "The parameter is incorrect.", + TdxAttestError::OutOfMemory => "Out of memory error.", + TdxAttestError::VSockFailure => "vsock related failure.", + TdxAttestError::ReportFailure => "Failed to get the TD Report.", + TdxAttestError::ExtendFailure => "Failed to extend rtmr.", + TdxAttestError::NotSupported => "Request feature is not supported.", + TdxAttestError::QuoteFailure => "Failed to get the TD Quote.", + TdxAttestError::DeviceBusy => "The device driver return busy.", + TdxAttestError::DeviceFailure => "Failed to acess tdx attest device.", + TdxAttestError::InvaildRtmrIndex => "Only supported RTMR index is 2 and 3.", + TdxAttestError::UnsupportedAttKeyId => { + "The platform Quoting infrastructure does not support any of the keys described in att_key_id_list." + } + TdxAttestError::ErrorMax => { + "Indicate max error." + } + } + } + + pub fn as_str(&self) -> &'static str { + match *self { + TdxAttestError::Success => "Success.", + TdxAttestError::Unexpected => "Unexpected", + TdxAttestError::InvalidParameter => "InvalidParameter", + TdxAttestError::OutOfMemory => "OutOfMemory", + TdxAttestError::VSockFailure => "VSockFailure", + TdxAttestError::ReportFailure => "ReportFailure", + TdxAttestError::ExtendFailure => "ExtendFailure", + TdxAttestError::NotSupported => "NotSupported", + TdxAttestError::QuoteFailure => "QuoteFailure", + TdxAttestError::DeviceBusy => "DeviceBusy", + TdxAttestError::DeviceFailure => "DeviceFailure", + TdxAttestError::InvaildRtmrIndex => "InvaildRtmrIndex", + TdxAttestError::UnsupportedAttKeyId => "UnsupportedAttKeyId", + TdxAttestError::ErrorMax => "ErrorMax", + } + } +} + +impl fmt::Display for TdxAttestError { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + write!(f, "{}", self.as_str()) + } +} + pub type SgxResult = result::Result; pub type SgxPceResult = result::Result; pub type SgxQcnlResult = result::Result; pub type SgxQuote3Result = result::Result; +pub type SgxTdxAttestResult = result::Result; pub type OsError = i32; pub type OsResult = result::Result; diff --git a/sgx_types/src/function.rs b/sgx_types/src/function.rs index e6e150336..13906255d 100644 --- a/sgx_types/src/function.rs +++ b/sgx_types/src/function.rs @@ -15,7 +15,7 @@ // specific language governing permissions and limitations // under the License. -use crate::error::{PceError, QcnlError, Quote3Error, SgxStatus}; +use crate::error::{PceError, QcnlError, Quote3Error, SgxStatus, TdxAttestError}; use crate::metadata::MetaData; use crate::types::*; @@ -306,10 +306,19 @@ extern "C" { fmspc: *const u8, fmspc_size: u16, pck_ra: *const c_char, - pp_quote_collateral: *mut *mut CQlQveCollateral, + pp_quote_collateral: *mut *mut CTdxQlQvCollateral, + ) -> Quote3Error; + /* intel DCAP 1.17 */ + pub fn tdx_ql_get_quote_verification_collateral_with_params( + fmspc: *const u8, + fmspc_size: u16, + pck_ra: *const c_char, + custom_param: *const c_void, + custom_param_length: u16, + pp_quote_collateral: *mut *mut CTdxQlQvCollateral, ) -> Quote3Error; pub fn tdx_ql_free_quote_verification_collateral( - p_quote_collateral: *const CQlQveCollateral, + p_quote_collateral: *const CTdxQlQvCollateral, ) -> Quote3Error; pub fn sgx_ql_get_qve_identity( @@ -323,14 +332,20 @@ extern "C" { p_qve_identity_issuer_chain: *const c_char, ) -> Quote3Error; - /* intel DCAP 1.4 */ + /* intel DCAP 1.14 */ pub fn sgx_ql_get_root_ca_crl( pp_root_ca_crl: *mut *mut u8, p_root_ca_crl_size: *mut u16, ) -> Quote3Error; pub fn sgx_ql_free_root_ca_crl(p_root_ca_crl: *const uint8_t) -> Quote3Error; - /* intel DCAP 2.14 */ - pub fn sgx_ql_set_logging_callback(logger: QlLoggingCallbackFn) -> Quote3Error; + /* intel DCAP 1.17 */ + pub fn sgx_ql_set_logging_callback( + logger: QlLoggingCallbackFn, + loglevel: QlLogLevel, + ) -> Quote3Error; + pub fn sgx_qpl_clear_cache(cache_type: QplCacheType) -> Quote3Error; + pub fn sgx_qpl_global_init() -> Quote3Error; + pub fn sgx_qpl_global_cleanup() -> Quote3Error; } //#[link(name = "sgx_default_qcnl_wrapper")] @@ -397,7 +412,14 @@ extern "C" { pub fn sgx_qcnl_free_root_ca_crl(p_root_ca_crl: *const u8); /* intel DCAP 1.13 */ pub fn sgx_qcnl_get_api_version(p_major_ver: *mut u16, p_minor_ver: *mut u16) -> bool; - pub fn sgx_qcnl_set_logging_callback(logger: QlLoggingCallbackFn) -> QcnlError; + pub fn sgx_qcnl_set_logging_callback( + logger: QlLoggingCallbackFn, + loglevel: QlLogLevel, + ) -> QcnlError; + /* intel DCAP 1.17 */ + pub fn sgx_qcnl_clear_cache(cache_type: u32) -> QcnlError; + pub fn sgx_qcnl_global_init() -> QcnlError; + pub fn sgx_qcnl_global_cleanup() -> QcnlError; } //#[link(name = "dcap_quoteverify")] @@ -443,7 +465,7 @@ extern "C" { pub fn tdx_qv_verify_quote( p_quote: *const u8, quote_size: u32, - p_quote_collateral: *const CQlQveCollateral, + p_quote_collateral: *const CTdxQlQvCollateral, expiration_check_date: time_t, p_collateral_expiration_status: *mut u32, p_quote_verification_result: *mut QlQvResult, @@ -451,4 +473,65 @@ extern "C" { supplemental_data_size: u32, p_supplemental_data: *mut u8, ) -> Quote3Error; + + /* intel DCAP 1.15 */ + pub fn tee_qv_get_collateral( + p_quote: *const u8, + quote_size: u32, + pp_quote_collateral: *mut *mut u8, + p_collateral_size: *mut u32, + ) -> Quote3Error; + + pub fn tee_qv_free_collateral(p_quote_collateral: *const u8) -> Quote3Error; + pub fn tee_get_supplemental_data_version_and_size( + p_quote: *const u8, + quote_size: u32, + p_version: *mut u32, + p_data_size: *mut u32, + ) -> Quote3Error; + + pub fn tee_verify_quote( + p_quote: *const u8, + quote_size: u32, + p_quote_collateral: *const u8, + expiration_check_date: time_t, + p_collateral_expiration_status: *mut u32, + p_quote_verification_result: *mut QlQvResult, + p_qve_report_info: *mut QlQeReportInfo, + p_supp_data_descriptor: *const CTeeSuppDataDescriptor, + ) -> Quote3Error; + /* intel DCAP 1.16 */ + pub fn tee_get_fmspc_from_quote( + p_quote: *const u8, + quote_size: u32, + p_fmspc_from_quote: *mut u8, + fmspc_from_quote_size: u32, + ) -> Quote3Error; +} + +/* intel DCAP 1.15 */ +//#[link(name = "libtdx_attest")] +extern "C" { + // + // tdx_attes.h + // + pub fn tdx_att_get_quote( + p_tdx_report_data: *const TdxReportData, + att_key_id_list: *const TdxUuid, + list_size: u32, + p_att_key_id: *mut TdxUuid, + pp_quote: *mut *mut u8, + p_quote_size: *mut u32, + flags: u32, + ) -> TdxAttestError; + pub fn tdx_att_free_quote(p_quote: *const u8) -> TdxAttestError; + pub fn tdx_att_get_report( + p_tdx_report_data: *const TdxReportData, + p_tdx_report: *mut TdxReport, + ) -> TdxAttestError; + pub fn tdx_att_extend(p_rtmr_event: *const TdxRtmrEvent) -> TdxAttestError; + pub fn tdx_att_get_supported_att_key_ids( + p_att_key_id_list: *mut TdxUuid, + p_list_size: *mut u32, + ) -> TdxAttestError; } diff --git a/sgx_types/src/lib.rs b/sgx_types/src/lib.rs index e0f79d3a1..b7cff250a 100644 --- a/sgx_types/src/lib.rs +++ b/sgx_types/src/lib.rs @@ -16,7 +16,6 @@ // under the License. #![no_std] -#![feature(error_in_core)] #![feature(min_specialization)] #![allow(clippy::upper_case_acronyms)] #![allow(non_camel_case_types)] diff --git a/sgx_types/src/metadata.rs b/sgx_types/src/metadata.rs index e424c4cbe..3fd415ce0 100644 --- a/sgx_types/src/metadata.rs +++ b/sgx_types/src/metadata.rs @@ -24,9 +24,9 @@ pub const SE_KEY_SIZE: usize = 384; pub const SE_EXPONENT_SIZE: usize = 4; /* version of metadata */ -pub const MAJOR_VERSION: u32 = 2; -pub const MINOR_VERSION: u32 = 4; -pub const SGX_2_ELRANGE_MAJOR_VERSION: u32 = 12; //MAJOR_VERSION should not larger than 0FFFFFFFF +pub const MAJOR_VERSION: u32 = 3; +pub const MINOR_VERSION: u32 = 0; +pub const SGX_2_ELRANGE_MAJOR_VERSION: u32 = 13; //MAJOR_VERSION should not larger than 0FFFFFFFF pub const SGX_1_ELRANGE_MAJOR_VERSION: u32 = 11; //MINOR_VERSION should not larger than 0FFFFFFFF pub const SGX_2_1_MAJOR_VERSION: u32 = 2; //MAJOR_VERSION should not larger than 0FFFFFFFF pub const SGX_2_1_MINOR_VERSION: u32 = 2; //MINOR_VERSION should not larger than 0FFFFFFFF @@ -44,17 +44,17 @@ pub const TCS_TEMPLATE_SIZE: usize = 72; pub const TCS_POLICY_BIND: u32 = 0x0000_0000; /* If set, the TCS is bound to the application thread */ pub const TCS_POLICY_UNBIND: u32 = 0x0000_0001; -pub const MAX_SAVE_BUF_SIZE: u32 = 2632; pub const TCS_NUM_MIN: u32 = 1; pub const SSA_NUM_MIN: u32 = 2; pub const SSA_FRAME_SIZE_MIN: u32 = 1; -pub const SSA_FRAME_SIZE_MAX: u32 = 2; -pub const STACK_SIZE_MIN: u32 = 0x0000_2000; /* 8 KB */ -pub const STACK_SIZE_MAX: u32 = 0x0004_0000; /* 256 KB */ -pub const HEAP_SIZE_MIN: u32 = 0x0000_1000; /* 4 KB */ -pub const HEAP_SIZE_MAX: u32 = 0x0100_0000; /* 16 MB */ -pub const RSRV_SIZE_MIN: u32 = 0x0000_0000; /* 0 KB */ -pub const RSRV_SIZE_MAX: u32 = 0x0000_0000; /* 0 KB */ +pub const SSA_FRAME_SIZE_MAX: u32 = 4; +pub const STACK_SIZE_MIN: u64 = 0x0000_2000; //8 KB +pub const STACK_SIZE_MAX: u64 = 0x0004_0000; //256 KB +pub const HEAP_SIZE_MIN: u64 = 0x0000_1000; //4 KB +pub const HEAP_SIZE_MAX: u64 = 0x0100_0000; //16 MB +pub const RSRV_SIZE_MIN: u64 = 0x0000_0000; //0 KB +pub const RSRV_SIZE_MAX: u64 = 0x0000_0000; //0 KB +pub const USER_REGION_SIZE: u64 = 0x0000_0000; //0 KB pub const DEFAULT_MISC_SELECT: u32 = 0; pub const DEFAULT_MISC_MASK: u32 = 0xFFFF_FFFF; pub const ISVFAMILYID_MAX: u64 = 0xFFFF_FFFF_FFFF_FFFF; diff --git a/sgx_types/src/types/dcap.rs b/sgx_types/src/types/dcap.rs index 748d21337..25c858ecc 100644 --- a/sgx_types/src/types/dcap.rs +++ b/sgx_types/src/types/dcap.rs @@ -159,6 +159,17 @@ impl_enum! { } } +/* intel DCAP 1.17 */ +impl_enum! { + #[repr(u32)] + #[derive(Clone, Copy, Debug, Eq, PartialEq)] + pub enum QplCacheType { + Certificate = 1, + Collateral = 2, + MultiCerts = 4, + } +} + impl_enum! { #[repr(u32)] #[derive(Clone, Copy, Debug, Eq, PartialEq)] @@ -375,10 +386,11 @@ impl_enum! { } // -// qve_header.h +// sgx_qve_header.h // pub const ROOT_KEY_ID_SIZE: usize = 48; pub const PLATFORM_INSTANCE_ID_SIZE: usize = 16; +pub const MAX_SA_LIST_SIZE: usize = 160; /* intel DCAP 1.7 */ impl_enum! { @@ -417,11 +429,13 @@ impl_copy_clone! { pub dynamic_platform: PckCertFlag, pub cached_keys: PckCertFlag, pub smt_enabled: PckCertFlag, + /* intel DCAP 1.15 */ + pub sa_list: [c_char; MAX_SA_LIST_SIZE] } } impl_struct_default! { - QlQvSupplemental; //176 + QlQvSupplemental; //336 } impl_asref_array! { @@ -432,6 +446,14 @@ impl_struct_ContiguousMemory! { QlQvSupplemental; } +/* intel DCAP 1.15 */ +#[repr(C)] +pub struct CTeeSuppDataDescriptor { + pub major_version: u16, + pub data_size: u32, + pub p_data: *mut u8, +} + impl_enum! { #[repr(u32)] #[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)] diff --git a/sgx_types/src/types/mod.rs b/sgx_types/src/types/mod.rs index 57d132be5..9332a6447 100644 --- a/sgx_types/src/types/mod.rs +++ b/sgx_types/src/types/mod.rs @@ -73,7 +73,8 @@ impl_bitflags! { const EINITTOKENKEY = 0x0000_0000_0000_0020; const CET = 0x0000_0000_0000_0040; const KSS = 0x0000_0000_0000_0080; - const NON_SECURITY = 0x0000_0000_0000_0004 | 0x0000_0000_0000_0010 | 0x0000_0000_0000_0020; + const AEXNOTIFY = 0x0000_0000_0000_0400; + const NON_SECURITY = 0x00FF_FFFF_FFFF_FFC0 | 0x0000_0000_0000_0004 | 0x0000_0000_0000_0010 | 0x0000_0000_0000_0020; const DEFAULT_MASK = !(0x00FF_FFFF_FFFF_FFC0 | 0x0000_0000_0000_0004 | 0x0000_0000_0000_0010 | 0x0000_0000_0000_0020); } } @@ -84,7 +85,8 @@ pub const XFRM_AVX: u64 = 0x0000_0000_0000_0006; // AVX pub const XFRM_AVX512: u64 = 0x0000_0000_0000_00E6; // AVX-512 - not supported pub const XFRM_MPX: u64 = 0x0000_0000_0000_0018; // MPX - not supported pub const XFRM_PKRU: u64 = 0x0000_0000_0000_0200; // PKRU state -pub const XFRM_RESERVED: u64 = !(XFRM_LEGACY | XFRM_AVX | XFRM_AVX512 | XFRM_PKRU); +pub const XFRM_AMX: u64 = 0x0000_0000_0006_0000; // AMX XFRM, including XTILEDATA(0x40000) and XTILECFG(0x20000) +pub const XFRM_RESERVED: u64 = !(XFRM_LEGACY | XFRM_AVX | XFRM_AVX512 | XFRM_PKRU | XFRM_AMX); impl_bitflags! { #[repr(C)] diff --git a/sgx_types/src/types/report2.rs b/sgx_types/src/types/report2.rs index 495f7b7f3..f52dd1752 100644 --- a/sgx_types/src/types/report2.rs +++ b/sgx_types/src/types/report2.rs @@ -107,6 +107,7 @@ pub const LEGACY_REPORT_TYPE: u8 = 0x0; // SGX Legacy Report Type pub const TEE_REPORT2_TYPE: u8 = 0x81; // TEE Report Type2 pub const TEE_REPORT2_SUBTYPE: u8 = 0x0; // SUBTYPE for Report Type2 is 0 pub const TEE_REPORT2_VERSION: u8 = 0x0; // VERSION for Report Type2 is 0 +pub const TEE_REPORT2_VERSION_SERVICETD: u8 = 0x1; // VERSION for Report Type2 which mr_servicetd is used impl_struct! { #[repr(C)] diff --git a/sgx_types/src/types/switchless.rs b/sgx_types/src/types/switchless.rs index e57e55bf1..60c346d83 100644 --- a/sgx_types/src/types/switchless.rs +++ b/sgx_types/src/types/switchless.rs @@ -77,11 +77,11 @@ pub const SL_MAX_TASKS_MAX_QWORDS: u32 = 8; #[repr(C)] #[derive(Clone, Copy, Debug)] pub struct SwitchlessConfig { - pub pool_size_qwords: u32, - pub uworkers: u32, - pub tworkers: u32, - pub retries_before_fallback: u32, - pub retries_before_sleep: u32, + pub pool_size_qwords: u64, + pub uworkers: u64, + pub tworkers: u64, + pub retries_before_fallback: u64, + pub retries_before_sleep: u64, pub callback: [Option; 4], } diff --git a/sgx_types/src/types/tdx.rs b/sgx_types/src/types/tdx.rs index de3b5f5d2..fb2504ea5 100644 --- a/sgx_types/src/types/tdx.rs +++ b/sgx_types/src/types/tdx.rs @@ -20,6 +20,9 @@ use super::*; use core::mem; use core::slice; +/* intel DCAP 1.17 */ +pub type CTdxQlQvCollateral = CQlQveCollateral; + /* intel DCAP 1.14 */ // // sgx_quote_4.h @@ -48,8 +51,8 @@ impl_unsafe_marker_for! { TeeTcbSvn } -pub const TD_INFO_RESERVED_BYTES: usize = 112; -pub const TD_TEE_TCB_INFO_RESERVED_BYTES: usize = 111; +pub const TD_INFO_RESERVED_BYTES_V1: usize = 112; +pub const TD_TEE_TCB_INFO_RESERVED_BYTES_V1: usize = 111; #[derive(Clone, Copy, Debug)] #[repr(C)] @@ -61,7 +64,7 @@ pub struct TeeInfo { pub mr_owner: TeeMeasurement, pub mr_owner_config: TeeMeasurement, pub rt_mr: [TeeMeasurement; 4], - pub reserved: [u8; TD_INFO_RESERVED_BYTES], + pub reserved: [u8; TD_INFO_RESERVED_BYTES_V1], } #[derive(Clone, Copy, Debug)] @@ -72,7 +75,7 @@ pub struct TeeTcbInfo { pub mr_seam: TeeMeasurement, pub mr_seam_signer: TeeMeasurement, pub attributes: TeeAttributes, - pub reserved: [u8; TD_TEE_TCB_INFO_RESERVED_BYTES], + pub reserved: [u8; TD_TEE_TCB_INFO_RESERVED_BYTES_V1], } #[derive(Clone, Copy, Debug)] @@ -141,6 +144,7 @@ impl_struct_ContiguousMemory! { TeeTcbInfo; QeReportCertificationData; EcdsaSigDataV4; + Quote4Header; Quote4; } @@ -203,3 +207,204 @@ impl Quote4 { ) } } + +/* intel DCAP 1.18 */ +// +// sgx_quote_5.h +// + +pub const TD_INFO_RESERVED_BYTES_V15: usize = 64; +pub const TD_TEE_TCB_INFO_RESERVED_BYTES_V15: usize = 95; + +#[derive(Clone, Copy, Debug)] +#[repr(C)] +pub struct TeeInfoV15 { + pub attributes: TeeAttributes, + pub xfam: TeeAttributes, + pub mr_td: TeeMeasurement, + pub mr_config_id: TeeMeasurement, + pub mr_owner: TeeMeasurement, + pub mr_owner_config: TeeMeasurement, + pub rt_mr: [TeeMeasurement; 4], + pub mr_servicetd: TeeMeasurement, + pub reserved: [u8; TD_INFO_RESERVED_BYTES_V15], +} + +#[derive(Clone, Copy, Debug)] +#[repr(C, packed)] +pub struct TeeTcbInfoV15 { + pub valid: [u8; 8], + pub tee_tcb_svn: TeeTcbSvn, + pub mr_seam: TeeMeasurement, + pub mr_seam_signer: TeeMeasurement, + pub attributes: TeeAttributes, + pub tee_tcb_svn2: TeeTcbSvn, + pub reserved: [u8; TD_TEE_TCB_INFO_RESERVED_BYTES_V15], +} + +pub type Quote5Header = Quote4Header; + +#[derive(Clone, Copy, Debug, Default)] +#[repr(C, packed)] +pub struct Report2BodyV15 { + pub tee_tcb_svn: TeeTcbSvn, + pub mr_seam: TeeMeasurement, + pub mrsigner_seam: TeeMeasurement, + pub seam_attributes: TeeAttributes, + pub td_attributes: TeeAttributes, + pub xfam: TeeAttributes, + pub mr_td: TeeMeasurement, + pub mr_config_id: TeeMeasurement, + pub mr_owner: TeeMeasurement, + pub mr_owner_config: TeeMeasurement, + pub rt_mr: [TeeMeasurement; 4], + pub report_data: TeeReportData, + pub tee_tcb_svn2: TeeTcbSvn, + pub mr_servicetd: TeeMeasurement, +} + +#[derive(Clone, Copy, Debug)] +#[repr(C, packed)] +pub struct Quote5 { + pub header: Quote5Header, + pub quote_type: u16, + pub size: u32, + pub body: [u8; 0], +} + +impl_struct_default! { + TeeInfoV15; //512 + TeeTcbInfoV15; //239 +} + +impl_struct_ContiguousMemory! { + TeeInfoV15; + TeeTcbInfoV15; + Report2BodyV15; + Quote5; +} + +impl_asref_array! { + TeeInfoV15; + TeeTcbInfoV15; + Report2BodyV15; +} + +impl Quote5 { + /// # Safety + pub unsafe fn as_slice_unchecked(&self) -> &[u8] { + slice::from_raw_parts( + self as *const _ as *const u8, + mem::size_of::() + self.size as usize, + ) + } +} + +/* intel DCAP 1.15 */ +// +// tdx_attes.h +// +pub const TDX_UUID_SIZE: usize = 16; +pub const TDX_REPORT_DATA_SIZE: usize = 64; +pub const TDX_REPORT_SIZE: usize = 1024; + +impl_struct! { + #[repr(C)] + #[derive(Debug, Eq, PartialEq)] + pub struct TdxUuid { + pub d: [u8; TDX_UUID_SIZE], + } +} + +impl_asref_array! { + TdxUuid; +} +impl_asmut_array! { + TdxUuid; +} +impl_from_array! { + TdxUuid; +} +impl_unsafe_marker_for! { + BytewiseEquality, + TdxUuid +} + +impl_copy_clone! { + #[repr(C)] + #[derive(Debug)] + pub struct TdxReportData { + pub d: [u8; TDX_REPORT_DATA_SIZE], + } +} +impl_copy_clone! { + #[repr(C)] + #[derive(Debug)] + pub struct TdxReport { + pub d: [u8; TDX_REPORT_SIZE], + } +} + +impl_struct_default! { + TdxReportData; //64 + TdxReport; //1024 +} + +impl_struct_ContiguousMemory! { + TdxReportData; + TdxReport; +} + +impl_asref_array! { + TdxReportData; + TdxReport; +} + +impl_asmut_array! { + TdxReportData; +} +impl_from_array! { + TdxReportData; +} + +impl_unsafe_marker_for! { + BytewiseEquality, + TdxReportData +} + +#[derive(Clone, Copy, Debug)] +#[repr(C, packed)] +pub struct TdxRtmrEvent { + pub version: u32, + pub rtmr_index: u64, + pub extend_data: [u8; 48], + pub event_type: u32, + pub event_data_size: u32, + pub event_data: [u8; 0], +} + +impl_struct_default! { + TdxRtmrEvent; //68 +} + +impl_struct_ContiguousMemory! { + TdxRtmrEvent; +} + +impl TdxRtmrEvent { + /// # Safety + pub unsafe fn as_slice_unchecked(&self) -> &[u8] { + slice::from_raw_parts( + self as *const _ as *const u8, + mem::size_of::() + self.event_data_size as usize, + ) + } + + /// # Safety + pub unsafe fn event_data_slice_unchecked(&self) -> &[u8] { + slice::from_raw_parts( + &self.event_data as *const _ as *const u8, + self.event_data_size as usize, + ) + } +} diff --git a/sgx_unwind/src/lib.rs b/sgx_unwind/src/lib.rs index 9c825d34e..6ff513429 100644 --- a/sgx_unwind/src/lib.rs +++ b/sgx_unwind/src/lib.rs @@ -19,7 +19,6 @@ #![cfg_attr(target_vendor = "teaclave", feature(rustc_private))] #![unstable(feature = "panic_unwind", issue = "32837")] #![feature(staged_api)] -#![feature(c_unwind)] #![allow(internal_features)] #![allow(clippy::upper_case_acronyms)] diff --git a/sgx_urts/src/enclave/mod.rs b/sgx_urts/src/enclave/mod.rs index 19b3b96e0..b9a014585 100644 --- a/sgx_urts/src/enclave/mod.rs +++ b/sgx_urts/src/enclave/mod.rs @@ -181,8 +181,8 @@ impl SgxEnclave { pub fn create_with_switchless>( path: P, debug: bool, - uworkers: u32, - tworkers: u32, + uworkers: u64, + tworkers: u64, ) -> SgxResult { let config = SwitchlessConfig { uworkers, diff --git a/teaclave-patches.bundle b/teaclave-patches.bundle new file mode 100644 index 000000000..c0a411628 Binary files /dev/null and b/teaclave-patches.bundle differ diff --git a/tools/docker/02_binutils.sh b/tools/docker/02_binutils.sh index 26b13e2a6..2ad40137a 100755 --- a/tools/docker/02_binutils.sh +++ b/tools/docker/02_binutils.sh @@ -20,5 +20,5 @@ cd /root && \ wget https://download.01.org/intel-sgx/sgx-linux/$SGX_SDK_RELEASE_VERSION/as.ld.objdump.r4.tar.gz && \ tar xzf as.ld.objdump.r4.tar.gz && \ -cp -r external/toolset/$BINUTILS_DIST/* /usr/bin/ && \ +cp -r external/toolset/$TOOLSET_DIST/* /usr/bin/ && \ rm -rf ./external ./as.ld.objdump.r4.tar.gz diff --git a/tools/docker/Dockerfile.centos8 b/tools/docker/Dockerfile.centos8 index a46d3c113..d7d19fec4 100644 --- a/tools/docker/Dockerfile.centos8 +++ b/tools/docker/Dockerfile.centos8 @@ -71,18 +71,19 @@ RUN yum install epel-release -y && \ http://downloads.sourceforge.net/ltp/lcov-1.14-1.noarch.rpm && \ alternatives --set python /usr/bin/python2 -ENV SGX_SDK_RELEASE_VERSION 2.17 -ENV SGX_DCAP_RELEASE_VERSION 1.14 -ENV SGX_SDK_CODE_VERSION 2.17.1 -ENV SGX_DCAP_CODE_VERSION 1.14 -ENV SGX_SDK_BIN_VERSION 2.17.101.1 -ENV SGX_SDK_PKGS_VERSION 2.17.100.3 -ENV SGX_DCAP_PKGS_VERSION 1.14.100.3 +ENV SGX_SDK_RELEASE_VERSION 2.21 +ENV SGX_DCAP_RELEASE_VERSION 1.18 +ENV SGX_SDK_CODE_VERSION 2.21 +ENV SGX_DCAP_CODE_VERSION 1.18 +ENV SGX_SDK_BIN_VERSION 2.21.100.1 +ENV SGX_SDK_PKGS_VERSION 2.21.100.1 +ENV SGX_DCAP_PKGS_VERSION 1.18.100.1 ENV SGX_SDK_VERSION ${SGX_SDK_PKGS_VERSION} ENV SGX_DCAP_VERSION ${SGX_DCAP_PKGS_VERSION} ENV RUST_TOOLCHAIN nightly-2023-11-17 ENV OS_NAME centos ENV BINUTILS_DIST centos8 +ENV TOOLSET_DIST centos8 ENV SGX_SDK_URL "https://download.01.org/intel-sgx/sgx-linux/${SGX_SDK_CODE_VERSION}/distro/${OS_NAME}-stream/sgx_linux_x64_sdk_${SGX_SDK_BIN_VERSION}.bin" ENV PSW_REPO_URL "https://download.01.org/intel-sgx/sgx-linux/${SGX_SDK_RELEASE_VERSION}/distro/${OS_NAME}-stream/sgx_rpm_local_repo.tgz" diff --git a/tools/docker/Dockerfile.ubuntu18.04 b/tools/docker/Dockerfile.ubuntu18.04 index a8d912bde..48e8be618 100644 --- a/tools/docker/Dockerfile.ubuntu18.04 +++ b/tools/docker/Dockerfile.ubuntu18.04 @@ -78,18 +78,19 @@ RUN apt-get update && DEBIAN_FRONTEND="noninteractive" apt-get install -y --no-i rm -rf /var/lib/apt/lists/* ENV CODENAME bionic -ENV SGX_SDK_RELEASE_VERSION 2.17 -ENV SGX_DCAP_RELEASE_VERSION 1.14 -ENV SGX_SDK_CODE_VERSION 2.17.1 -ENV SGX_DCAP_CODE_VERSION 1.14 -ENV SGX_SDK_BIN_VERSION 2.17.101.1 -ENV SGX_SDK_PKGS_VERSION 2.17.100.3 -ENV SGX_DCAP_PKGS_VERSION 1.14.100.3 +ENV SGX_SDK_RELEASE_VERSION 2.21 +ENV SGX_DCAP_RELEASE_VERSION 1.18 +ENV SGX_SDK_CODE_VERSION 2.21 +ENV SGX_DCAP_CODE_VERSION 1.18 +ENV SGX_SDK_BIN_VERSION 2.21.100.1 +ENV SGX_SDK_PKGS_VERSION 2.21.100.1 +ENV SGX_DCAP_PKGS_VERSION 1.18.100.1 ENV SGX_SDK_VERSION ${SGX_SDK_PKGS_VERSION}-bionic1 ENV SGX_DCAP_VERSION ${SGX_DCAP_PKGS_VERSION}-bionic1 ENV RUST_TOOLCHAIN nightly-2023-11-17 ENV OS_NAME ubuntu ENV BINUTILS_DIST ubuntu18.04 +ENV TOOLSET_DIST ubuntu20.04 ENV SGX_SDK_URL "https://download.01.org/intel-sgx/sgx-linux/${SGX_SDK_CODE_VERSION}/distro/${BINUTILS_DIST}-server/sgx_linux_x64_sdk_${SGX_SDK_BIN_VERSION}.bin" ENV LD_LIBRARY_PATH=/usr/lib:/usr/local/lib diff --git a/tools/docker/Dockerfile.ubuntu20.04 b/tools/docker/Dockerfile.ubuntu20.04 index a0c7bd6b6..dd5643d93 100644 --- a/tools/docker/Dockerfile.ubuntu20.04 +++ b/tools/docker/Dockerfile.ubuntu20.04 @@ -77,18 +77,19 @@ RUN apt-get update && DEBIAN_FRONTEND="noninteractive" apt-get install -y --no-i rm -rf /var/lib/apt/lists/* ENV CODENAME focal -ENV SGX_SDK_RELEASE_VERSION 2.17 -ENV SGX_DCAP_RELEASE_VERSION 1.14 -ENV SGX_SDK_CODE_VERSION 2.17.1 -ENV SGX_DCAP_CODE_VERSION 1.14 -ENV SGX_SDK_BIN_VERSION 2.17.101.1 -ENV SGX_SDK_PKGS_VERSION 2.17.100.3 -ENV SGX_DCAP_PKGS_VERSION 1.14.100.3 +ENV SGX_SDK_RELEASE_VERSION 2.21 +ENV SGX_DCAP_RELEASE_VERSION 1.18 +ENV SGX_SDK_CODE_VERSION 2.21 +ENV SGX_DCAP_CODE_VERSION 1.18 +ENV SGX_SDK_BIN_VERSION 2.21.100.1 +ENV SGX_SDK_PKGS_VERSION 2.21.100.1 +ENV SGX_DCAP_PKGS_VERSION 1.18.100.1 ENV SGX_SDK_VERSION ${SGX_SDK_PKGS_VERSION}-focal1 ENV SGX_DCAP_VERSION ${SGX_DCAP_PKGS_VERSION}-focal1 ENV RUST_TOOLCHAIN nightly-2023-11-17 ENV OS_NAME ubuntu ENV BINUTILS_DIST ubuntu20.04 +ENV TOOLSET_DIST ubuntu20.04 ENV SGX_SDK_URL "https://download.01.org/intel-sgx/sgx-linux/${SGX_SDK_CODE_VERSION}/distro/${BINUTILS_DIST}-server/sgx_linux_x64_sdk_${SGX_SDK_BIN_VERSION}.bin" ENV LD_LIBRARY_PATH=/usr/lib:/usr/local/lib diff --git a/tools/docker/Dockerfile.ubuntu22.04 b/tools/docker/Dockerfile.ubuntu22.04 new file mode 100644 index 000000000..9cedb9247 --- /dev/null +++ b/tools/docker/Dockerfile.ubuntu22.04 @@ -0,0 +1,118 @@ +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. + +FROM ubuntu:22.04 + +LABEL authors="The Teaclave Authors" + +SHELL ["/bin/bash", "-c"] + +RUN apt-get update && DEBIAN_FRONTEND="noninteractive" apt-get install -y --no-install-recommends \ + apt-utils \ + alien \ + astyle \ + autoconf \ + automake \ + bison \ + build-essential \ + ca-certificates \ + cmake \ + curl \ + debhelper \ + dpkg-dev \ + expect \ + g++ \ + gawk \ + flex \ + gdb \ + git-core \ + jq \ + kmod \ + lcov \ + libboost-system-dev \ + libboost-thread-dev \ + libclang-dev \ + libcurl4-openssl-dev \ + libfuse-dev \ + libjsoncpp-dev \ + liblog4cpp5-dev \ + libprotobuf-dev \ + libssl-dev \ + libtool \ + libxml2-dev \ + nano \ + ocaml \ + ocamlbuild \ + pkg-config \ + protobuf-compiler \ + python3 \ + python3-pip \ + sudo \ + unzip \ + uuid-dev \ + vim \ + wget \ + zip \ + gnupg2 \ + aptitude \ + rsync \ + apt-transport-https \ + software-properties-common \ + && \ + apt-get clean && \ + rm -rf /var/lib/apt/lists/* + +ENV CODENAME jammy +ENV SGX_SDK_RELEASE_VERSION 2.21 +ENV SGX_DCAP_RELEASE_VERSION 1.18 +ENV SGX_SDK_CODE_VERSION 2.21 +ENV SGX_DCAP_CODE_VERSION 1.18 +ENV SGX_SDK_BIN_VERSION 2.21.100.1 +ENV SGX_SDK_PKGS_VERSION 2.21.100.1 +ENV SGX_DCAP_PKGS_VERSION 1.18.100.1 +ENV SGX_SDK_VERSION ${SGX_SDK_PKGS_VERSION}-jammy1 +ENV SGX_DCAP_VERSION ${SGX_DCAP_PKGS_VERSION}-jammy1 +ENV RUST_TOOLCHAIN nightly-2022-10-22 +ENV OS_NAME ubuntu +ENV BINUTILS_DIST ubuntu22.04 +ENV TOOLSET_DIST ubuntu20.04 +ENV SGX_SDK_URL "https://download.01.org/intel-sgx/sgx-linux/${SGX_SDK_CODE_VERSION}/distro/${BINUTILS_DIST}-server/sgx_linux_x64_sdk_${SGX_SDK_BIN_VERSION}.bin" + +ENV LD_LIBRARY_PATH=/usr/lib:/usr/local/lib +ENV LD_RUN_PATH=/usr/lib:/usr/local/lib + +ADD 02_binutils.sh /root +RUN bash /root/02_binutils.sh + +ADD 03_sdk.sh /root +RUN bash /root/03_sdk.sh + +ADD 04_psw.sh /root +RUN bash /root/04_psw.sh + +ADD 05_optlibs.sh /root +RUN bash /root/05_optlibs.sh + +ADD 06_rust.sh /root +RUN bash /root/06_rust.sh + +RUN rm -rf /root/02_binutils.sh /root/03_sdk.sh /root/04_psw.sh /root/05_optlibs.sh /root/06_rust.sh + +ADD start_aesm.sh /opt/intel/sgx-aesm-service +RUN echo '/opt/intel/sgx-aesm-service/start_aesm.sh' >> /root/.bashrc + +WORKDIR /root