diff --git a/board/batocera/allwinner/a733/DDK_LICENSE_EVIDENCE.md b/board/batocera/allwinner/a733/DDK_LICENSE_EVIDENCE.md new file mode 100644 index 00000000000..66a9b912f43 --- /dev/null +++ b/board/batocera/allwinner/a733/DDK_LICENSE_EVIDENCE.md @@ -0,0 +1,79 @@ +# PowerVR DDK License Evidence + +This file records the provenance and licensing basis for the PowerVR BXM-4-64 DDK +userspace libraries bundled in `fsoverlay/usr/local/lib/` and `fsoverlay/usr/lib/`. + +## Package Details + +| Field | Value | +|-------|-------| +| Package | `xserver-xorg-img-bxm` | +| Version | `1.21.1-2` | +| Architecture | `arm64` | +| DDK Version | `24.2.6603887` | +| BVNC | `36.56.104.183` | +| **Section** | **`free`** | +| **Maintainer** | **`Allwinnertech`** | +| Source repo | Radxa a733-bullseye apt repository | + +## What "Section: free" Means + +In Debian packaging, `Section: free` means the package is compliant with the +[Debian Free Software Guidelines (DFSG)](https://www.debian.org/social_contract#guidelines) — +software that can be freely used, modified, and redistributed. This classification +is set by the package maintainer (Allwinnertech, the SoC vendor) in the package +control file. + +**This is the SoC vendor itself declaring their DDK to be freely distributable.** + +## Contrast: Other PVR DDK Packages + +The Batocera upstream `img-gpu-powervr` package for StarFive/JH7110 explicitly states: +``` +IMG_GPU_POWERVR_LICENSE = Strictly Confidential +IMG_GPU_POWERVR_REDISTRIBUTE = NO +``` + +Our package has the opposite declaration. + +## Secondary Evidence: Public GitHub Distribution + +The same DDK binaries (DDK 24.2, BVNC 36.56.104.183, arm64) are also distributed +openly on GitHub by the Deepin Linux project: + +- Repository: `https://github.com/deepin-community/img-gpu-bin` +- Path: `bin/ddk242/36.56.104.183/arm64/` +- Files distributed publicly without any access restrictions + +This represents a second independent party (Deepin/UOS, a major Chinese Linux +distribution) distributing the same binaries publicly, consistent with Allwinnertech's +"free" classification. + +## Files Included + +From `xserver-xorg-img-bxm_1.21.1-2_arm64.deb`: + +**`/usr/local/lib/`** +- `libEGL.so.1.0.0` +- `libGLESv2.so.2.0.0` +- `libGLESv1_CM.so.1.1.0` +- `libgbm.so.1.0.0` +- `libglapi.so.0.0.0` +- `libvulkan.so.1.3.280` +- `libpvr_mesa_wsi.so` +- `dri/pvr_dri.so` +- `dri/sunxi-drm_dri.so` +- `dri/swrast_dri.so` + +**`/usr/lib/`** +- `libGLESv2_PVR_MESA.so.24.2.6603887` +- `libGLESv1_CM_PVR_MESA.so.24.2.6603887` +- `libsrv_um.so.24.2.6603887` +- `libglslcompiler.so.24.2.6603887` +- `libpvr_dri_support.so.24.2.6603887` +- `libPVROCL.so.24.2.6603887` +- `libPVRScopeServices.so.24.2.6603887` +- `libsutu_display.so.24.2.6603887` +- `libufwriter.so.24.2.6603887` +- `libusc.so.24.2.6603887` +- `libVK_IMG.so.24.2.6603887` diff --git a/board/batocera/allwinner/a733/cubie-a7s/boot/boot0_sdcard.fex b/board/batocera/allwinner/a733/cubie-a7s/boot/boot0_sdcard.fex new file mode 100644 index 00000000000..9de20d05e02 Binary files /dev/null and b/board/batocera/allwinner/a733/cubie-a7s/boot/boot0_sdcard.fex differ diff --git a/board/batocera/allwinner/a733/cubie-a7s/boot/boot_package.fex b/board/batocera/allwinner/a733/cubie-a7s/boot/boot_package.fex new file mode 100644 index 00000000000..8e4ae703ee5 Binary files /dev/null and b/board/batocera/allwinner/a733/cubie-a7s/boot/boot_package.fex differ diff --git a/board/batocera/allwinner/a733/cubie-a7s/boot/extlinux.conf b/board/batocera/allwinner/a733/cubie-a7s/boot/extlinux.conf new file mode 100644 index 00000000000..d52a22ead5d --- /dev/null +++ b/board/batocera/allwinner/a733/cubie-a7s/boot/extlinux.conf @@ -0,0 +1,7 @@ +LABEL batocera.linux +LINUX /boot/Image +INITRD /boot/initrd.lz4 +# DTS: board/batocera/allwinner/a733/dts/sun60i-a733-cubie-a7s.dts (injected via linux_patches) +FDT /boot/sun60i-a733-cubie-a7s.dtb +# earlycon address 0x02500000 = Allwinner UART0; verify against A733 TRM if serial is silent +APPEND label=BATOCERA earlycon=uart8250,mmio32,0x02500000 keep_bootcon clk_ignore_unused loglevel=4 console=ttyS0,115200 console=tty1 cma=128M usbcore.autosuspend=-1 drm.edid_firmware=DP-1:edid/smartglasses.bin diff --git a/board/batocera/allwinner/a733/cubie-a7s/create-boot-script.sh b/board/batocera/allwinner/a733/cubie-a7s/create-boot-script.sh new file mode 100644 index 00000000000..bae2e06329f --- /dev/null +++ b/board/batocera/allwinner/a733/cubie-a7s/create-boot-script.sh @@ -0,0 +1,47 @@ +#!/bin/bash + +# HOST_DIR = host toolchain dir +# BOARD_DIR = board-specific dir (this file's directory) +# BUILD_DIR = base build dir +# BINARIES_DIR = images output dir +# TARGET_DIR = target rootfs dir +# BATOCERA_BINARIES_DIR = batocera binaries sub-directory + +HOST_DIR=$1 +BOARD_DIR=$2 +BUILD_DIR=$3 +BINARIES_DIR=$4 +TARGET_DIR=$5 +BATOCERA_BINARIES_DIR=$6 + +mkdir -p "${BATOCERA_BINARIES_DIR}/boot/boot" || exit 1 +mkdir -p "${BATOCERA_BINARIES_DIR}/boot/extlinux" || exit 1 + +"${HOST_DIR}/bin/mkimage" \ + -A arm64 -O linux -T kernel -C none \ + -a 0x41000000 -e 0x41000000 \ + -n linux \ + -d "${BINARIES_DIR}/Image" \ + "${BATOCERA_BINARIES_DIR}/boot/boot/uImage" || exit 1 + +cp "${BINARIES_DIR}/Image" "${BATOCERA_BINARIES_DIR}/boot/boot/Image" || exit 1 +cp "${BINARIES_DIR}/initrd.lz4" "${BATOCERA_BINARIES_DIR}/boot/boot/initrd.lz4" || exit 1 +cp "${BINARIES_DIR}/uInitrd" "${BATOCERA_BINARIES_DIR}/boot/boot/uInitrd" || exit 1 +cp "${BINARIES_DIR}/rootfs.squashfs" "${BATOCERA_BINARIES_DIR}/boot/boot/batocera.update" || exit 1 +cp "${BINARIES_DIR}/rufomaculata" "${BATOCERA_BINARIES_DIR}/boot/boot/rufomaculata.update" || exit 1 + +# TODO: verify DTB filename matches what the BSP kernel produces for Cubie A7S +# If sun60i-a733-cubie-a7s.dtb does not exist, use sun60i-a733-cubie-a7a.dtb as a +# temporary stand-in and update extlinux.conf to match. +DTB_NAME="sun60i-a733-cubie-a7s.dtb" +if [ ! -f "${BINARIES_DIR}/${DTB_NAME}" ]; then + echo "WARNING: ${DTB_NAME} not found, falling back to sun60i-a733-cubie-a7a.dtb" + DTB_NAME="sun60i-a733-cubie-a7a.dtb" +fi +cp "${BINARIES_DIR}/${DTB_NAME}" "${BATOCERA_BINARIES_DIR}/boot/boot/${DTB_NAME}" || exit 1 + +cp "${BOARD_DIR}/boot/extlinux.conf" "${BATOCERA_BINARIES_DIR}/boot/extlinux/" || exit 1 +cp "${BOARD_DIR}/boot/boot0_sdcard.fex" "${BATOCERA_BINARIES_DIR}/boot/boot0_sdcard.fex" || exit 1 +cp "${BOARD_DIR}/boot/boot_package.fex" "${BATOCERA_BINARIES_DIR}/boot/boot_package.fex" || exit 1 + +exit 0 diff --git a/board/batocera/allwinner/a733/cubie-a7s/genimage.cfg b/board/batocera/allwinner/a733/cubie-a7s/genimage.cfg new file mode 100644 index 00000000000..8a26545295e --- /dev/null +++ b/board/batocera/allwinner/a733/cubie-a7s/genimage.cfg @@ -0,0 +1,48 @@ +image boot.vfat { + vfat { + extraargs = "-F 32 -n BATOCERA" + @files + } + size = 6G +} + +image userdata.ext4 { + ext4 { + label = "SHARE" + use-mke2fs = "true" + extraargs = "-m 0" + } + size = "512M" + mountpoint = "/userdata" +} + +image batocera-a733-cubie-a7s.img { + hdimage { + align = "512" + partition-table-type = "gpt" + } + + # Allwinner A733 (sun60iw2) boot chain: + # BROM → boot0 (DRAM init / SPL) → boot_package (U-Boot) → kernel + # + # boot0 and boot_package are NOT listed as GPT partitions — they are + # written directly into the image at raw byte offsets by dd in the + # post-image script after genimage runs. This matches Nick Alilovic's + # Armbian A733 approach and ensures the FAT32 boot partition is + # GPT partition 1 (which is what U-Boot's distro_bootcmd scans first). + # + # Raw offsets (written by post-image script): + # boot0: 0x20000 (128KB, sector 256) — eGON.BT0 magic + # boot_package: 0xC00000 (12MB, sector 24576) — sunxi-package magic + + partition boot { + partition-type-uuid = "EBD0A0A2-B9E5-4433-87C0-68B6B72699C7" + image = "boot.vfat" + offset = 20M + } + + partition userdata { + partition-type-uuid = "0FC63DAF-8483-4772-8E79-3D69D8477DE4" + image = "userdata.ext4" + } +} diff --git a/board/batocera/allwinner/a733/dts/sun60i-a733-cubie-a7s.dts b/board/batocera/allwinner/a733/dts/sun60i-a733-cubie-a7s.dts new file mode 100644 index 00000000000..b918050947c --- /dev/null +++ b/board/batocera/allwinner/a733/dts/sun60i-a733-cubie-a7s.dts @@ -0,0 +1,2060 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) + +/dts-v1/; + +#include "sun60iw2p1.dtsi" +#define TYPEC_DP 1 +/{ + board = "A733", "A733-CUBIE-A7S-AXP318"; + compatible = "radxa,cubie-a7s", "arm,sun60iw2p1", "allwinner,sun60i-a733"; + aliases { + arisc-config = &arisc_config; + pmu0 = &pmu0; + bat_supply = &bat_power_supply; + phy_switcher = &phy_switcher; + }; + + reg_usb0_vbus: usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-enable-ramp-delay = <1000>; + gpio = <&r_pio PL 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb1_vbus: usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-enable-ramp-delay = <1000>; + gpio = <&r_pio PM 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + wifi_power_en: wifi_power_en { + compatible = "regulator-fixed"; + regulator-name = "wifi_power_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <1000>; + gpio = <&r_pio PM 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + }; + + wifi_chip_en: wifi_chip_en { + compatible = "regulator-fixed"; + regulator-name = "wifi_chip_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <1000>; + gpio = <&r_pio PM 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + }; + + eeprom_wp: eeprom-wp { + compatible = "regulator-fixed"; + regulator-name = "eeprom_wp"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <1000>; + gpio = <&pio PC 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + }; + + arisc_config: arisc_config { + s_uart_config{ + pins = "PL2", "PL3"; + function = <3>, <3>; + status = "disabled"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + label = "radxa:green:sys"; + gpios = <&r_pio PM 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + led-1 { + label = "radxa:blue:user"; + gpios = <&pio PJ 26 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + fan0: pwm-fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-levels = <0 50 102 170 255>; + fan-supply = <®_dc1sw1>; + pwms = <&pwm1 9 25000 0>; + }; + + phy_switcher: phy_switcher@10 { + compatible = "allwinner,sunxi-phy-switcher"; + reg = <0x0 0x10 0x0 0x0>; + // hotplug = <&pio PH 4 GPIO_ACTIVE_HIGH>; + aux_p = <&r_pio PL 10 GPIO_ACTIVE_HIGH>; + aux_n = <&r_pio PL 11 GPIO_ACTIVE_HIGH>; + phys = <&combo0_dp>, <&combo0_usb>; + phy-names = "dp-phy", "usb-phy"; + dp_configure_delay = <20>; + status = "okay"; + + mode-switch; + orientation-switch; + svid = <0xff01>; + port { + #address-cells = <1>; + #size-cells = <0>; + usbdp_orientation_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc2_orien_sw>; + }; + usbdp_dp_altmode_mux: endpoint@1 { + reg = <1>; + remote-endpoint = <&dp_altmode_mux>; + }; + }; + }; +}; + +&ccu { + clk-init-gate = <1>; +}; + +&pio { + gpio-line-names = + /* PA */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PB */ + "PIN_7", "PIN_11", "PIN_29", "PIN_31", + "PIN_36", "PIN_12", "PIN_35", "PIN_38", + "PIN_37", "PIN_8", "PIN_10", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PC */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PD */ + "", "", "", "", + "", "", "", "", + "", "", "PIN_24", "PIN_23", + "PIN_19", "PIN_21", "PIN_26", "", + "PIN_28", "PIN_27", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PE */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PF */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PG */ + "PIN_40", "PIN_41", "PIN_42", "PIN_43", + "PIN_44", "PIN_45", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PH */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PI */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PJ */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "PIN_5", "PIN_3", + "PIN_16", "PIN_18", "", "", + "", "", "", "", + /* PK */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; + + uart0_pins_active: uart0_pins@0 { + pins = "", ""; + function = "uart0"; + drive-strength = <10>; + }; + + uart0_pins_sleep: uart0_pins@1 { + pins = "", ""; + function = "gpio_in"; + drive-strength = <10>; + }; + + uart1_pins_active: uart1_pins@0 { + pins = "PG6", "PG7", "PG8", "PG9"; + function = "uart1"; + drive-strength = <10>; + }; + + uart1_pins_sleep: uart1_pins@1 { + pins = "PG6", "PG7", "PG8", "PG9"; + function = "io_disabled"; + drive-strength = <10>; + }; + + uart2_pins_active: uart2_pins@0 { + pins = "PB0", "PB1", "PB2", "PB3"; + function = "uart2"; + drive-strength = <10>; + }; + + uart2_pins_sleep: uart2_pins@1 { + pins = "PB0", "PB1", "PB2", "PB3"; + function = "io_disabled"; + drive-strength = <10>; + }; + + uart3_pins_active: uart3_pins@0 { + pins = "PI1", "PI12"; + function = "uart3"; + drive-strength = <10>; + }; + + uart3_pins_sleep: uart3_pins@1 { + pins = "PI11", "PI12"; + function = "io_disabled"; + drive-strength = <10>; + }; + + uart5_pins_active: uart5_pins@0 { + pins = "", ""; + function = "uart5"; + drive-strength = <10>; + }; + + uart5_pins_sleep: uart5_pins@1 { + pins = "", ""; + function = "io_disabled"; + drive-strength = <10>; + }; + + uart6_pins_active: uart6_pins@0 { + pins = "PI6", "PI7"; + function = "uart6"; + drive-strength = <10>; + }; + + uart6_pins_sleep: uart6_pins@1 { + pins = "PI6", "PI7"; + function = "io_disabled"; + drive-strength = <10>; + }; + + uart7_pins_active: uart7_pins@0 { + pins = "PB11", "PB12", "PB13", "PB14"; + function = "uart7"; + drive-strength = <10>; + }; + + uart7_pins_sleep: uart7_pins@1 { + pins = "PB11", "PB12", "PB13", "PB14"; + function = "io_disabled"; + drive-strength = <10>; + }; + + pwm0_4_pins_active: pwm0@0 { + pins = "PD22"; + function = "pwm0_4"; + drive-strength = <10>; + }; + + pwm0_4_pins_sleep: pwm0@1 { + pins = "PD22"; + function = "gpio_in"; + bias-pull-down; + }; + + pwm1_8_pins_active: pwm1@0 { + pins = "PJ26"; + function = "pwm1_8"; + drive-strength = <10>; + }; + + pwm1_8_pins_sleep: pwm1@1 { + pins = "PJ26"; + function = "gpio_in"; + bias-pull-down; + }; + + pwm1_9_pins_active: pwm1@0 { + pins = "PJ27"; + function = "pwm1_9"; + drive-strength = <10>; + }; + + pwm1_9_pins_sleep: pwm1@1 { + pins = "PJ27"; + function = "gpio_in"; + bias-pull-down; + }; + + pwm1_6_pins_active: pwm6@0 { + pins = "PI15"; + function = "pwm1_6"; + drive-strength = <10>; + }; + + pwm1_6_pins_sleep: pwm6@1 { + pins = "PI15"; + function = "gpio_in"; + bias-pull-down; + }; + + twi0_pins_default: twi0@0 { + pins = "PG8", "PG9"; + function = "twi0"; + drive-strength = <10>; + bias-pull-up; + }; + + twi0_pins_sleep: twi0@1 { + pins = "PG8", "PG9"; + function = "gpio_in"; + }; + + twi2_pins_default: twi2@0 { + pins = "PD16", "PD17"; + function = "twi2"; + drive-strength = <10>; + bias-pull-up; + }; + + twi2_pins_sleep: twi2@1 { + pins = "PD16", "PD17"; + function = "gpio_in"; + }; + + twi5_pins_default: twi5@0 { + pins = "PI11", "PI12"; + function = "twi5"; + drive-strength = <10>; + bias-pull-up; + }; + + twi5_pins_sleep: twi5@1 { + pins = "PI11", "PI12"; + function = "gpio_in"; + }; + + twi7_pins_default: twi4@0 { + pins = "PJ22", "PJ23"; + function = "twi7"; + drive-strength = <10>; + bias-pull-up; + }; + + twi7_pins_sleep: twi4@1 { + pins = "PJ22", "PJ23"; + function = "gpio_in"; + }; + + twi11_pins_default: twi11@0 { + pins = "PI4", "PI5"; + function = "twi11"; + drive-strength = <10>; + bias-pull-up; + }; + + twi11_pins_sleep: twi11@1 { + pins = "PI4", "PI5"; + function = "gpio_in"; + }; + + /* i2s0 pins */ + i2s0_pins_a: i2s0@0 { + pins = "PB4"; + function = "i2s0_mclk"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s0_pins_b: i2s0@1 { + pins = "PB5"; + function = "i2s0_bclk"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s0_pins_c: i2s0@2 { + pins = "PB6"; + function = "i2s0_lrck"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s0_pins_e: i2s0@4 { + pins = "PB7"; + function = "i2s0_dout0"; + allwinner,drive = <1>; + bias-pull-down; + }; + + i2s0_pins_d: i2s0@3 { + pins = "PB8"; + function = "i2s0_din0"; + allwinner,drive = <1>; + bias-pull-down; + }; + + i2s0_pins_f: i2s0@5 { + pins = "PB4", "PB5", "PB6", "PB7", "PB8"; + function = "io_disabled"; + allwinner,drive = <1>; + bias-disable; + }; + + /* i2s1 pins */ + i2s1_pins_a: i2s1@0 { + pins = "PG10"; + function = "i2s1_mclk"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s1_pins_b: i2s1@1 { + pins = "PG11"; + function = "i2s1_bclk"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s1_pins_c: i2s1@2 { + pins = "PG12"; + function = "i2s1_lrck"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s1_pins_d: i2s1@3 { + pins = "PG13"; + function = "i2s1_din1"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s1_pins_e: i2s1@4 { + pins = "PG14"; + function = "i2s1_dout1"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s1_pins_f: i2s1@5 { + pins = "PG10", "PG11", "PG12", "PG13", "PG14"; + function = "io_disabled"; + allwinner,drive = <1>; + bias-disable; + }; + + /* i2s2 pins */ + i2s2_pins_b: i2s2@1 { + pins = "PH3"; + function = "i2s2_bclk"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s2_pins_c: i2s2@2 { + pins = "PH4"; + function = "i2s2_lrck"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s2_pins_d: i2s2@3 { + pins = "PH6"; + function = "i2s2_din0"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s2_pins_e: i2s2@4 { + pins = "PH5"; + function = "i2s2_dout0"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s2_pins_f: i2s2@5 { + pins = "PH3", "PH4", "PH5", "PH6"; + function = "io_disabled"; + allwinner,drive = <1>; + bias-disable; + }; + + /* i2s4 pins */ + i2s4_pins_a: i2s4@0 { + pins = "PJ17"; + function = "i2s4_mclk"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s4_pins_b: i2s4@1 { + pins = "PJ16"; + function = "i2s4_bclk"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s4_pins_c: i2s4@2 { + pins = "PJ18"; + function = "i2s4_lrck"; + allwinner,drive = <1>; + bias-disable; + }; + + i2s4_pins_d: i2s4@3 { + pins = "PJ19"; + function = "i2s4_din0"; + allwinner,drive = <1>; + bias-pull-down; + }; + + i2s4_pins_f: i2s4@5 { + pins = "PJ16", "PJ17", "PJ18", "PJ19"; + function = "io_disabled"; + allwinner,drive = <1>; + bias-disable; + }; + + owa_pins_a: owa@0 { + pins = "PI10"; + function = "owa0"; + allwinner,drive = <1>; + bias-disable; + }; + + owa_pins_b: owa@1 { + pins = "PI10"; + function = "io_disabled"; + allwinner,drive = <1>; + bias-disable; + }; + + gmac0_pins_default: gmac0@0 { + pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", + "PH8", "PH9", "PH10", "PH11", "PH12","PH13", "PH14", "PH15"; + function = "rgmii0"; + allwinner,drive = <1>; + bias-pull-up; + }; + + gmac0_pins_sleep: gmac0@1 { + pins = "PH0", "PH1", "PH2", "PH3", "PH4", "PH5", "PH6", "PH7", + "PH8", "PH9", "PH10", "PH11", "PH12","PH13", "PH14", "PH15"; + function = "io_disabled"; + }; + + spi0_pins_default: spi0@0 { + pins = "PC12", "PC2", "PC4"; /* clk, mosi, miso */ + function = "spi0"; + allwinner,drive = <1>; + //drive-strength = <20>; + }; + + spi0_pins_cs: spi0@1 { + pins = "PC3"; /* cs */ + function = "spi0"; + allwinner,drive = <1>; + //drive-strength = <20>; + bias-pull-up; + }; + + spi0_pins_sleep: spi0@2 { + pins = "PC12", "PC2", "PC4", "PC3"; + function = "io_disabled"; + }; + + ledc_pins_a: ledc@0 { + pins = "PE4"; + function = "ledc"; + drive-strength = <10>; + }; + + ledc_pins_b: ledc@1 { + pins = "PE4"; + function = "gpio_in"; + }; +}; + +&r_pio { + gpio-line-names = + /* PL */ + "", "", "", "", + "", "PIN_22", "PIN_13", "PIN_15", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PM */ + "", "", "", "PIN_32", + "PIN_33", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + /* PN */ + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; + + s_twi0_pins_default: s_twi0@0 { + pins = "PL0", "PL1"; + function = "s_twi0"; + drive-strength = <10>; + bias-pull-up; + }; + + s_twi0_pins_sleep: s_twi0@1 { + pins = "PL0", "PL1"; + function = "gpio_in"; + }; + + s_twi1_pins_default: s_twi1@0 { + pins = "PL12", "PL13"; + function = "s_twi1"; + drive-strength = <30>; + //bias-pull-up; + }; + + s_twi1_pins_sleep: s_twi1@1 { + pins = "PL12", "PL13"; + function = "gpio_in"; + }; + + s_twi2_pins_default: s_twi2@0 { + pins = "PL4", "PL5"; + function = "s_twi2"; + drive-strength = <10>; + bias-pull-up; + }; + + s_twi2_pins_sleep: s_twi2@1 { + pins = "PL4", "PL5"; + function = "gpio_in"; + }; + + s_irrx_pins_default: s_irrx@0 { + pins = "PL4"; + function = "s_ir_rx"; + }; + + s_irrx_pins_sleep: s_irrx@1 { + pins = "PL4"; + function = "gpio_in"; + }; + + s_pwm0_7_pins_active:s_pwm0@0 { + pins = "PL9"; + function = "s_pwm0_7"; + drive-strength = <10>; + }; + + s_pwm0_7_pins_sleep:s_pwm0@1 { + pins = "PL9"; + function = "gpio_in"; + bias-pull-down; + }; +}; + +&soc { + auto_print@54321 { + reg = <0x0 0x54321 0x0 0x0>; + device_type = "auto_print"; + status = "okay"; + }; + + gpio_leds { + compatible = "allwinner,sunxi-gpio-leds"; + supply-num = <1>; + gpio1-supply = <®_dcdc1>; + gpio-pins = <&pio PJ 26 GPIO_ACTIVE_HIGH>; + pin-names = "standby_led"; + init-status = ; + /* disabled: conflicts with gpio-leds/led-1 heartbeat on PJ 26 */ + status = "disabled"; + }; + +}; + +&msgbox { + status = "disabled"; +}; + +&hwspinlock { + status = "disabled"; +}; + +&uart0 { + /* allwinner,uart-v100 is not matched by any compiled driver (AW_UART handles + * older sun8i/50i/55i strings; AW_UART_NG not enabled). Add snps,dw-apb-uart + * so CONFIG_SERIAL_8250_DW binds and creates /dev/ttyS0. reg-shift=2 and + * reg-io-width=4 match earlycon mmio32 — standard for Allwinner 32-bit UARTs. */ + compatible = "allwinner,uart-v100", "snps,dw-apb-uart"; + reg-shift = <2>; + reg-io-width = <4>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart0_pins_active>; + pinctrl-1 = <&uart0_pins_sleep>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart2_pins_active>; + pinctrl-1 = <&uart2_pins_sleep>; + status = "disabled"; +}; + +&uart3 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart3_pins_active>; + pinctrl-1 = <&uart3_pins_sleep>; + status = "disabled"; +}; + +&uart5 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart5_pins_active>; + pinctrl-1 = <&uart5_pins_sleep>; + status = "disabled"; +}; + +&uart6 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart6_pins_active>; + pinctrl-1 = <&uart6_pins_sleep>; + status = "disabled"; +}; + +&uart7 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart7_pins_active>; + pinctrl-1 = <&uart7_pins_sleep>; + status = "disabled"; +}; + +&pwm0_4 { + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&pwm0_4_pins_active>; + pinctrl-1 = <&pwm0_4_pins_sleep>; + status = "okay"; +}; + +&pwm1_6 { + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&pwm1_6_pins_active>; + pinctrl-1 = <&pwm1_6_pins_sleep>; + status = "okay"; +}; + +&pwm1_8 { + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&pwm1_8_pins_active>; + pinctrl-1 = <&pwm1_8_pins_sleep>; + status = "okay"; +}; + +&pwm1_9 { + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&pwm1_9_pins_active>; + pinctrl-1 = <&pwm1_9_pins_sleep>; + status = "okay"; +}; + +&s_pwm0_7 { + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&s_pwm0_7_pins_active>; + pinctrl-1 = <&s_pwm0_7_pins_sleep>; + status = "okay"; +}; + +&soc{ + +}; + +/* + * CPU DVFS OPP tables — voltages from BSP sun60iw2p1-cpu-vf.dtsi vf0000 + * grade (worst-case, safe for all silicon). + * DCDC5 → LITTLE cluster (cpu0-5), DCDC3 → BIG cluster (cpu6-7). + */ +/ { + a733_cluster0_opp: cluster0-opp-table-a733 { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { opp-hz = /bits/ 64 <408000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1416000000 { opp-hz = /bits/ 64 <1416000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1608000000 { opp-hz = /bits/ 64 <1608000000>; opp-microvolt = <900000>; clock-latency-ns = <244144>; }; + opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1000000>; clock-latency-ns = <244144>; }; + }; + + a733_cluster1_opp: cluster1-opp-table-a733 { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { opp-hz = /bits/ 64 <408000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-720000000 { opp-hz = /bits/ 64 <720000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1512000000 { opp-hz = /bits/ 64 <1512000000>; opp-microvolt = <800000>; clock-latency-ns = <244144>; }; + opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <950000>; clock-latency-ns = <244144>; }; + opp-2000000000 { opp-hz = /bits/ 64 <2000000000>; opp-microvolt = <1050000>; clock-latency-ns = <244144>; }; + }; +}; + +/* Point all CPU nodes at the clean OPP tables above */ +&cpu0 { operating-points-v2 = <&a733_cluster0_opp>; }; +&cpu1 { operating-points-v2 = <&a733_cluster0_opp>; }; +&cpu2 { operating-points-v2 = <&a733_cluster0_opp>; }; +&cpu3 { operating-points-v2 = <&a733_cluster0_opp>; }; +&cpu4 { operating-points-v2 = <&a733_cluster0_opp>; }; +&cpu5 { operating-points-v2 = <&a733_cluster0_opp>; }; +&cpu6 { operating-points-v2 = <&a733_cluster1_opp>; }; +&cpu7 { operating-points-v2 = <&a733_cluster1_opp>; }; + +&cpul_target { + temperature = <60000>; + hysteresis = <2000>; +}; + +&cpul_threshold{ + type = "active"; + temperature = <60000>; + hysteresis = <2000>; +}; + +&cpul_thermal_zone { + cooling-maps { + map0 { + trip = <&cpul_target>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + + map1 { + trip = <&cpul_threshold>; + cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; +}; + +&cpub_target { + temperature = <60000>; + hysteresis = <2000>; +}; + +&cpub_threshold{ + type = "active"; + temperature = <60000>; + hysteresis = <2000>; +}; + +&cpub_thermal_zone { + cooling-maps { + map0 { + trip = <&cpub_target>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + + map1 { + trip = <&cpub_threshold>; + cooling-device = <&fan0 2 THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; +}; + +&sdc2 { + non-removable; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + no-sdio; + no-sd; + ctl-spec-caps = <0x328>; + cap-mmc-highspeed; + sunxi-power-save-mode; + sunxi-dis-signal-vol-sw; + mmc-bootpart-noacc; + cap-hsq; + /*cqe-on;*/ + ctl-cmdq-md = <0x2>; + max-frequency = <200000000>; + /*vmmc-supply = <®_cldo3>;*/ + /*emmc io vol 3.3v*/ + /*vqmmc-supply = <®_aldo1>;*/ + /*emmc io vol 1.8v*/ + /*vqmmc-supply = <®_cldo1>;*/ + vmmc-supply = <®_dc1sw2>; + vqmmc33sw-supply = <®_dc1sw2>; + vdmmc33sw-supply = <®_dc1sw2>; + vqmmc18sw-supply = <®_cldo5>; + vdmmc18sw-supply = <®_cldo5>; + status = "okay"; +}; + +&sdc1 { + status = "disabled"; +}; + +&sdc0 { + bus-width = <4>; + cd-gpios = <&pio PF 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; + /*non-removable;*/ + /*broken-cd;*/ + /*cd-inverted*/ + /*data3-detect;*/ + /*card-pwr-gpios = <&pio PH 14 1 1 2 0xffffffff>;*/ + cd-used-24M; + cd-set-debounce = <0x1>; + cap-sd-highspeed; + no-1-8-v; + no-sdio; + no-mmc; + sunxi-power-save-mode; + sunxi-dis-signal-vol-sw; + max-frequency = <200000000>; + ctl-spec-caps = <0x428>; + vmmc-supply = <®_dc1sw2>; + vqmmc33sw-supply = <®_dc1sw2>; + vdmmc33sw-supply = <®_dc1sw2>; + vqmmc18sw-supply = <®_cldo5>; + vdmmc18sw-supply = <®_cldo5>; + status = "okay"; +}; + +&ufs { + vcc-supply = <®_dldo6>; + vccq-supply = <®_dcdc8>; + vccq2-supply = <®_dcdc8>; + status = "okay"; +}; + +#ifdef TYPEC_DP +// &usbc0 { +// usb-role-switch; +// port { +// #address-cells = <1>; +// #size-cells = <0>; +// usbc0_role_switch: endpoint@0 { +// reg = <0>; +// remote-endpoint = <&usbc0_role_sw>; +// }; +// }; +// }; +#endif + +/* + * usb_port_type: usb mode. 0-device, 1-host, 2-otg. + * usb_detect_type: usb hotplug detect mode. 0-none, 1-vbus/id detect, 2-pmu detect, 3-tcpm detect. + * usb_detect_mode: 0-thread scan, 1-id gpio interrupt, 2-pmu notify. + * usb_id_gpio: gpio for id detect. + * usb_det_vbus_gpio: gpio for id detect. gpio or "axp_ctrl". + * usb_wakeup_suspend：0-SUPER_STANDBY, 1-USB_STANDBY. + */ +&usbc0 { + device_type = "usbc0"; + usb_port_type = <0x0>; +// #ifdef TYPEC_DP +// usb_detect_type = <0x3>; +// #else +// usb_detect_type = <0x1>; +// #endif + usb_detect_type = <0x2>; + usb_detect_mode = <0x2>; + usb_id_gpio; + //enable-active-high; + usb_det_vbus_gpio = "axp_ctrl"; + //enable-active-high; + detvbus_io-supply = <®_cldo1>; + usb_regulator_io = "nocare"; + usb_wakeup_suspend = <0>; + usb_luns = <3>; + usb_serial_unique = <0>; + usb_serial_number = "20080411"; + rndis_wceis = <1>; + status = "okay"; +}; + +&udc { + phy_range = <0x188>; + status = "okay"; +}; + +&ehci0 { + phy_range = <0x188>; + status = "okay"; +}; + +&ohci0 { + phy_range = <0x188>; + status = "okay"; +}; + +&usbc1 { + device_type = "usbc1"; + usb_regulator_io = "nocare"; + usb_wakeup_suspend = <0>; + status = "okay"; +}; + +&ehci1 { + phy_range = <0x188>; + drvvbus-supply = <®_usb1_vbus>; + status = "okay"; +}; + +&ohci1 { + phy_range = <0x188>; + drvvbus-supply = <®_usb1_vbus>; + status = "okay"; +}; + +&usbc2 { + device_type = "usbc2"; + drvvbus-supply = <®_usb0_vbus>; + status = "okay"; +}; + +&xhci2 { + dr_mode = "otg"; //dr_mode option: host, peripheral, otg + role-switch-default-mode = "host"; + phy-names = "usb2-phy", "usb3-phy"; + status = "okay"; + +#ifdef TYPEC_DP + phys = <&u2phy>, <&combo0_usb>; + usb-role-switch; + port { + #address-cells = <1>; + #size-cells = <0>; + dwc3_0_role_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc2_role_sw>; + }; + }; +#else + phys = <&u2phy>, <&combo1_usb>; +#endif + }; + +&u2phy { + status = "okay"; +}; + +&serdes { + serdes1v8-supply = <®_cldo5>; + status = "okay"; + combophy0: combo-phy0@6c01000 { + lane_invert = <1 1 1 1>; +#ifdef TYPEC_DP + lane_remap = <0 1 2 3>; +#else + lane_remap = <2 3 0 1>; +#endif + typec_remap = <2 3 0 1>; + }; +}; + +&pcie_rc { + pcie1v8-supply = <®_dc1sw1>; + pcie3v3-supply = <®_bldo2>; + power-gpios = <&pio PD 20 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio PD 22 GPIO_ACTIVE_HIGH>; + wake-gpios = <&pio PD 21 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&twi0 { + clock-frequency = <400000>; + pinctrl-0 = <&twi0_pins_default>; + pinctrl-1 = <&twi0_pins_sleep>; + pinctrl-names = "default", "sleep"; + /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ + twi_drv_used = <0>; + no_suspend = <1>; + twi-supply = <®_aldo1>; + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + //num-addresses = <1>; + status = "okay"; + }; +}; + +&s_twi0 { + clock-frequency = <400000>; + pinctrl-0 = <&s_twi0_pins_default>; + pinctrl-1 = <&s_twi0_pins_sleep>; + pinctrl-names = "default", "sleep"; + /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ + twi_drv_used = <1>; + //twi-supply = <®_aldo1>; + no_suspend = <1>; + status = "okay"; + + pmu1: pmu@34 { + compatible = "x-powers,axp515"; + reg = <0x34>; + status = "disabled"; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&nmi_intc>; + x-powers,drive-vbus-en; + pmu_irq_wakeup = <1>; + pmu_hot_shutdown = <1>; + pmu_thermal_threshold = <120>; + + wakeup-source; + + powerkey0: powerkey@0 { + status = "disabled"; + compatible = "x-powers,axp515-pek"; + }; + + usb_power_supply: usb_power_supply { + compatible = "x-powers,axp515-usb-power-supply"; + status = "disabled"; + + pmu_usbpc_vol = <4600>; + pmu_usbpc_cur = <500>; + pmu_usbad_vol = <4500>; + pmu_usbad_cur = <2500>; + pmu_usb_typec_used = <1>; + wakeup_usb_in; + wakeup_usb_out; + wakeup_typec_in; + wakeup_typec_out; + + det_battery_supply = <&bat_power_supply>; + }; + + bat_power_supply: bat-power-supply { + compatible = "x-powers,axp515-bat-power-supply"; + status = "disabled"; + pmu_chg_ic_temp = <0>; + + pmu_battery_rdc= <88>; + pmu_battery_cap = <7085>; + pmu_runtime_chgcur = <1000>; + pmu_suspend_chgcur = <1500>; + pmu_shutdown_chgcur = <1500>; + pmu_init_chgvol = <4350>; + pmu_battery_warning_level1 = <15>; + pmu_battery_warning_level2 = <0>; + pmu_chgled_func = <0>; + pmu_chgled_type = <0>; + pmu_bat_para1 = <0>; + pmu_bat_para2 = <0>; + pmu_bat_para3 = <0>; + pmu_bat_para4 = <0>; + pmu_bat_para5 = <1>; + pmu_bat_para6 = <2>; + pmu_bat_para7 = <2>; + pmu_bat_para8 = <2>; + pmu_bat_para9 = <3>; + pmu_bat_para10 = <7>; + pmu_bat_para11 = <12>; + pmu_bat_para12 = <15>; + pmu_bat_para13 = <20>; + pmu_bat_para14 = <25>; + pmu_bat_para15 = <32>; + pmu_bat_para16 = <37>; + pmu_bat_para17 = <43>; + pmu_bat_para18 = <51>; + pmu_bat_para19 = <57>; + pmu_bat_para20 = <61>; + pmu_bat_para21 = <65>; + pmu_bat_para22 = <70>; + pmu_bat_para23 = <73>; + pmu_bat_para24 = <78>; + pmu_bat_para25 = <81>; + pmu_bat_para26 = <85>; + pmu_bat_para27 = <88>; + pmu_bat_para28 = <92>; + pmu_bat_para29 = <93>; + pmu_bat_para30 = <97>; + pmu_bat_para31 = <100>; + pmu_bat_para32 = <100>; + + pmu_bat_temp_enable = <1>; + pmu_jetia_en = <0>; + pmu_bat_charge_ltf = <2079>; //-5 + pmu_bat_charge_htf = <180>; //60 + pmu_bat_shutdown_ltf = <2616>; //-10 + pmu_bat_shutdown_htf = <157>; //65 + pmu_jetia_cool = <1664>; //0 + pmu_jetia_warm = <248>; //50 + pmu_jcool_ifall = <1>;//50% + pmu_jwarm_ifall = <1>;//50% + pmu_bat_temp_para1 = <5450>; //Murata -25 + pmu_bat_temp_para2 = <3315>; //-15 + pmu_bat_temp_para3 = <2616>; //-10 + pmu_bat_temp_para4 = <2079>; //-5 + pmu_bat_temp_para5 = <1664>;//0 + pmu_bat_temp_para6 = <1340>; //5 + pmu_bat_temp_para7 = <1086>; //10 + pmu_bat_temp_para8 = <727>; //20 + pmu_bat_temp_para9 = <498>; //30 + pmu_bat_temp_para10 = <348>; //40 + pmu_bat_temp_para11 = <293>; //45 + pmu_bat_temp_para12 = <248>; //50 + pmu_bat_temp_para13 = <211>; //55 + pmu_bat_temp_para14 = <180>; //60 + pmu_bat_temp_para15 = <133>; //70 + pmu_bat_temp_para16 = <100>; //80 + + wakeup_bat_out; + wakeup_new_soc; + /* wakeup_bat_in; */ + /* wakeup_bat_charging; */ + /* wakeup_bat_charge_over; */ + /* wakeup_low_warning1; */ + /* wakeup_low_warning2; */ + wakeup_bat_untemp_chg; + wakeup_bat_ovtemp_chg; + }; + + regulator1: regulators@1 { + compatible = "x-powers,axp515-regulator"; + status = "disabled"; + reg_drivevbus: drivevbus { + regulator-name = "axp515-drivevbus"; + regulator-enable-ramp-delay = <1000>; + }; + }; + + virtual-drivevbus { + compatible = "xpower-vregulator,drivevbus"; + drivevbus-supply = <®_drivevbus>; + }; + }; + + pmu0: pmu@36 { + compatible = "x-powers,axp8191"; + reg = <0x36>; + status = "okay"; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&nmi_intc>; + pmu_irq_wakeup = <1>; + pmu_hot_shutdown = <1>; + + powerkey1: powerkey@1 { + compatible = "x-powers,axp2101-pek"; + status = "okay"; + pmu_powkey_off_en = <1>; + pmu_powkey_off_func = <1>; + pmu_powkey_off_time = <8000>; + pmu_powkey_long_time = <1500>; + pmu_powkey_on_time = <1000>; + wakeup_rising; + wakeup_falling; + }; + + regulator0: regulators@0 { + reg_dcdc1: dcdc1 { + regulator-name = "axp8191-dcdc1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3800000>; + regulator-enable-ramp-delay = <1000>; + regulator-ramp-delay = <250>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc2: dcdc2 { + regulator-name = "axp8191-dcdc2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1540000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc3: dcdc3 { + regulator-name = "axp8191-dcdc3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1540000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc4: dcdc4 { + regulator-name = "axp8191-dcdc4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1540000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc5: dcdc5 { + regulator-name = "axp8191-dcdc5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1540000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc6: dcdc6 { + regulator-name = "axp8191-dcdc6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2760000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc7: dcdc7 { + regulator-name = "axp8191-dcdc7"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1840000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc8: dcdc8 { + regulator-name = "axp8191-dcdc8"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dcdc9: dcdc9 { + regulator-name = "axp8191-dcdc9"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-ramp-delay = <250>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_rtcldo: rtcldo { + /* RTC_LDO is a fixed, always-on regulator */ + regulator-name = "axp8191-rtcldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + reg_aldo1: aldo1 { + regulator-name = "axp8191-aldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_aldo2: aldo2 { + regulator-name = "axp8191-aldo2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_aldo3: aldo3 { + regulator-name = "axp8191-aldo3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_aldo4: aldo4 { + regulator-name = "axp8191-aldo4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_aldo5: aldo5 { + regulator-name = "axp8191-aldo5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_aldo6: aldo6 { + regulator-name = "axp8191-aldo6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_bldo1: bldo1 { + regulator-name = "axp8191-bldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_bldo2: bldo2 { + regulator-name = "axp8191-bldo2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_bldo3: bldo3 { + regulator-name = "axp8191-bldo3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_bldo4: bldo4 { + regulator-name = "axp8191-bldo4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_bldo5: bldo5 { + regulator-name = "axp8191-bldo5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_cldo1: cldo1 { + regulator-name = "axp8191-cldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_cldo2: cldo2 { + regulator-name = "axp8191-cldo2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_cldo3: cldo3 { + regulator-name = "axp8191-cldo3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_cldo4: cldo4 { + regulator-name = "axp8191-cldo4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3500000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_cldo5: cldo5 { + regulator-name = "axp8191-cldo5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dldo1: dldo1 { + regulator-name = "axp8191-dldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_dldo2: dldo2 { + regulator-name = "axp8191-dldo2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_dldo3: dldo3 { + regulator-name = "axp8191-dldo3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_dldo4: dldo4 { + regulator-name = "axp8191-dldo4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_dldo5: dldo5 { + regulator-name = "axp8191-dldo5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_dldo6: dldo6 { + regulator-name = "axp8191-dldo6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_eldo1: eldo1 { + regulator-name = "axp8191-eldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_eldo2: eldo2 { + regulator-name = "axp8191-eldo2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-boot-on; + regulator-always-on; + }; + reg_eldo3: eldo3 { + regulator-name = "axp8191-eldo3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_eldo4: eldo4 { + regulator-name = "axp8191-eldo4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_eldo5: eldo5 { + regulator-name = "axp8191-eldo5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + reg_eldo6: eldo6 { + regulator-name = "axp8191-eldo6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + }; + reg_dc1sw1: dc1sw1 { + regulator-name = "axp8191-dc1sw1"; + swin-supply = <®_dcdc1>; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + reg_dc1sw2: dc1sw2 { + regulator-name = "axp8191-dc1sw2"; + swin-supply = <®_dcdc1>; + /* add always-on */ + regulator-always-on; + }; + }; + + virtual-dcdc1 { + compatible = "xpower-vregulator,dcdc1"; + dcdc1-supply = <®_dcdc1>; + }; + virtual-dcdc2 { + compatible = "xpower-vregulator,dcdc2"; + dcdc2-supply = <®_dcdc2>; + }; + virtual-dcdc3 { + compatible = "xpower-vregulator,dcdc3"; + dcdc3-supply = <®_dcdc3>; + }; + virtual-dcdc4 { + compatible = "xpower-vregulator,dcdc4"; + dcdc4-supply = <®_dcdc4>; + }; + virtual-dcdc5 { + compatible = "xpower-vregulator,dcdc5"; + dcdc5-supply = <®_dcdc5>; + }; + virtual-dcdc6 { + compatible = "xpower-vregulator,dcdc6"; + dcdc6-supply = <®_dcdc6>; + }; + virtual-dcdc7 { + compatible = "xpower-vregulator,dcdc7"; + dcdc7-supply = <®_dcdc7>; + }; + virtual-dcdc8 { + compatible = "xpower-vregulator,dcdc8"; + dcdc8-supply = <®_dcdc8>; + }; + virtual-dcdc9 { + compatible = "xpower-vregulator,dcdc9"; + dcdc9-supply = <®_dcdc9>; + }; + virtual-rtcldo { + compatible = "xpower-vregulator,rtcldo"; + rtcldo-supply = <®_rtcldo>; + }; + virtual-aldo1 { + compatible = "xpower-vregulator,aldo1"; + aldo1-supply = <®_aldo1>; + }; + virtual-aldo2 { + compatible = "xpower-vregulator,aldo2"; + aldo2-supply = <®_aldo2>; + }; + virtual-aldo3 { + compatible = "xpower-vregulator,aldo3"; + aldo3-supply = <®_aldo3>; + }; + virtual-aldo4 { + compatible = "xpower-vregulator,aldo4"; + aldo4-supply = <®_aldo4>; + }; + virtual-aldo5 { + compatible = "xpower-vregulator,aldo5"; + aldo5-supply = <®_aldo5>; + }; + virtual-aldo6 { + compatible = "xpower-vregulator,aldo6"; + aldo6-supply = <®_aldo6>; + }; + virtual-dldo1 { + compatible = "xpower-vregulator,dldo1"; + dldo1-supply = <®_dldo1>; + }; + virtual-dldo2 { + compatible = "xpower-vregulator,dldo2"; + dldo2-supply = <®_dldo2>; + }; + virtual-dldo3 { + compatible = "xpower-vregulator,dldo3"; + dldo3-supply = <®_dldo3>; + }; + virtual-dldo4 { + compatible = "xpower-vregulator,dldo4"; + dldo4-supply = <®_dldo4>; + }; + virtual-dldo5 { + compatible = "xpower-vregulator,dldo5"; + dldo5-supply = <®_dldo5>; + }; + virtual-dldo6 { + compatible = "xpower-vregulator,dldo6"; + dldo6-supply = <®_dldo6>; + }; + virtual-eldo1 { + compatible = "xpower-vregulator,eldo1"; + eldo1-supply = <®_eldo1>; + }; + virtual-eldo2 { + compatible = "xpower-vregulator,eldo2"; + eldo2-supply = <®_eldo2>; + }; + virtual-eldo3 { + compatible = "xpower-vregulator,eldo3"; + eldo3-supply = <®_eldo3>; + }; + virtual-eldo4 { + compatible = "xpower-vregulator,eldo4"; + eldo4-supply = <®_eldo4>; + }; + virtual-eldo5 { + compatible = "xpower-vregulator,eldo5"; + eldo5-supply = <®_eldo5>; + }; + virtual-eldo6 { + compatible = "xpower-vregulator,eldo6"; + eldo6-supply = <®_eldo6>; + }; + virtual-dc1sw1 { + compatible = "xpower-vregulator,dc1sw1"; + dc1sw-supply = <®_dc1sw1>; + }; + virtual-dc1sw2 { + compatible = "xpower-vregulator,dc1sw2"; + dc1sw-supply = <®_dc1sw2>; + }; + }; +}; + +&s_twi1 { + clock-frequency = <400000>; + pinctrl-0 = <&s_twi1_pins_default>; + pinctrl-1 = <&s_twi1_pins_sleep>; + pinctrl-names = "default", "sleep"; + /* For stability and backwards compatibility, we recommend setting ‘twi_drv_used’ to 1 */ + twi_drv_used = <1>; + no_suspend = <1>; + status = "okay"; + + husb311: husb311@4e { + compatible = "hynetek,husb311"; + reg = <0x4e>; + interrupt-parent = <&r_pio>; + interrupts = ; + husb311,intr_gpio = <&r_pio PL 3 GPIO_ACTIVE_LOW>; + vbus-supply = <®_usb0_vbus>; + /* aw,vbus-wakeup-quirk; */ + /* aw,port-reset-quirk; */ + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc2_role_sw: endpoint@0 { + remote-endpoint = <&dwc3_0_role_switch>; + }; + }; + }; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "source"; + op-sink-microwatt = <1000000>; + typec-power-opmode = "default"; + slow-charger-loop; + source-pdos = < PDO_FIXED(5000, 500, (0x1<<29)|(0x1<<25)) + PDO_VAR(5000, 5000, 1200) >; + sink-pdos = < PDO_FIXED(5000, 500, (0x1<<29)|(0x1<<25)) + PDO_VAR(5000, 5000, 2000) + /* PDO_VAR(9000, 9000, 2000) + PDO_VAR(12000, 12000, 3000) + PDO_VAR(15000, 15000, 3000) + PDO_VAR(20000, 20000, 2250)*/ + >; + /* fixme */ + sink-vdos = <0xd1002e99 0x00 0x03110000>; + sink-vdos-v1 = <0xd1002e99 0x00 0x03110000>; + + altmodes { + #address-cells = <1>; + #size-cells = <0>; + + altmode@0 { + reg = <0>; + svid = <0xff01>; + vdo = <0xffffffff>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc2_orien_sw: endpoint@0 { + remote-endpoint = <&usbdp_orientation_switch>; + }; + }; + port@1 { + reg = <1>; + dp_altmode_mux: endpoint@1 { + remote-endpoint = <&usbdp_dp_altmode_mux>; + }; + }; + }; + }; + }; +}; + +&de { + assigned-clock-rates = <600000000>; + chn_cfg_mode = <2>; + status = "okay"; +}; + +&vo0 { + status = "okay"; +}; + +&vo1 { + status = "okay"; +}; + +&tv0 { + status = "okay"; +}; + +&tv1 { + status = "okay"; +}; + +&edp0 { + #sound-dai-cells = <0>; /* audio driver match method arg */ + compatible = "allwinner,drm-dp"; + phys = <&combo0_dp>, <&aux_hpd_phy>; + phy-names = "dp-phy", "aux-phy"; + sys = <&vo1>; + + edp_colordepth = <8>; /* 6/8/10/12/16 */ + edp_color_fmt = <0>; + edp_ssc_en = <0>; + edp_ssc_mode = <0>; + + edp_lane_rate = <1>; + edp_lane_cnt = <4>; + extcon = <&serdes>; + + status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; + edp_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + edp0_in_tcon4: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon4_out_edp0>; + }; + }; + edp_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc5>; +}; + +&dsufreq { + dsu-supply = <®_dcdc5>; +}; + +&cpu6 { + cpu-supply = <®_dcdc3>; +}; + +&npu { + npu-supply = <®_dcdc2>; + status = "okay"; +}; + +&addr_mgt { + compatible = "allwinner,sunxi-addr_mgt"; + type_addr_wifi = <0x0>; + type_addr_bt = <0x0>; + type_addr_eth = <0x0>; + status = "okay"; +}; + +&i2s3_plat { + tdm-num = <3>; + tx-pin = <0 1 2 3>; + tx-pin0-map0 = <0x76543210>; + tx-pin0-map1 = <0xFEDCBA98>; + tx-pin1-map0 = <0x76543210>; + tx-pin1-map1 = <0xFEDCBA98>; + tx-pin2-map0 = <0x76543210>; + tx-pin2-map1 = <0xFEDCBA98>; + tx-pin3-map0 = <0x76543210>; + tx-pin3-map1 = <0xFEDCBA98>; + rx-pin = <0>; + + tx-hub-en; + rx-sync-en; + /* av: */ + /* av not need dai-type */ + status = "okay"; +}; + +&i2s3_mach { + soundcard-mach,format = "i2s"; + soundcard-mach,frame-master = <&i2s3_cpu>; + soundcard-mach,bitclock-master = <&i2s3_cpu>; + /* soundcard-mach,frame-inversion; */ + /* soundcard-mach,bitclock-inversion; */ + soundcard-mach,slot-num = <2>; + soundcard-mach,slot-width = <32>; + soundcard-mach,playback-only; + soundcard-mach,name = "allwinner-edp"; + status = "okay"; + i2s3_cpu: soundcard-mach,cpu { + sound-dai = <&i2s3_plat>; + /* av: */ + soundcard-mach,pll-fs = <4>; + soundcard-mach,mclk-fs = <512>; + }; + i2s3_codec: soundcard-mach,codec { + /* av: */ + sound-dai = <&edp0>; + }; +}; + +&gmac0_phy0 { + compatible = "ethernet-phy-id7b74.4412"; + reset-gpios = <&pio PH 16 GPIO_ACTIVE_LOW>; +}; + +&gmac0 { + phy-mode = "rgmii"; + pinctrl-0 = <&gmac0_pins_default>; + pinctrl-1 = <&gmac0_pins_sleep>; + pinctrl-names = "default", "sleep"; + aw,soc-phy-clk-en; + /delete-property/ aw,rgmii-clk-ext; + tx-delay = <12>; + rx-delay = <10>; + dwmac3v3-supply = <®_dc1sw2>; + phy3v3-supply = <®_dc1sw1>; + status = "okay"; +}; + +&lradc { + key_cnt = <5>; + key0 = <210 115>; + key1 = <410 114>; + key2 = <590 139>; + key3 = <750 28>; + key4 = <880 172>; + status = "okay"; +}; + +&gpadc0 { + channel_num = <8>; + channel_select = <0x0f>; + channel_data_select = <0x0>; + channel_compare_select = <0x0>; + channel_cld_select = <0x0>; + channel_chd_select = <0x0>; + channel0_compare_lowdata = <1700000>; + channel0_compare_higdata = <1200000>; + channel1_compare_lowdata = <460000>; + channel1_compare_higdata = <1200000>; + status = "okay"; +}; + +&s_irrx { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&s_irrx_pins_default>; + pinctrl-1 = <&s_irrx_pins_sleep>; + status = "okay"; +}; + +&gpu { + gpu-supply = <®_dcdc4>; +}; + +&sid { + sid-supply = <®_dldo1>; + voltage = <1800>; +}; + +&hdmi0 { + dcdc2-supply = <®_dcdc2>; + cldo2-supply = <®_cldo2>; + hdmi_power0 = "dcdc2"; + hdmi_power1 = "cldo2"; + hdmi_power_cnt = <2>; + hdmi_hdcp1x_enable = <1>; + hdmi_hdcp2x_enable = <1>; + hdmi_cec_enable = <1>; + hdmi_clock_source = <0>; + hdmi_resistor_select = <1>; + hdmi_ddc_index = <20>; + priority = <6>; + snps_phy = < + 25000 185625 0x0007 0x8160 0x8188 + 185625 185625 0x0007 0x8160 0x8198 + 185625 340000 0x0004 0x8040 0x8E85 + 340000 600000 0x0000 0x80c0 0x82F6>; + status = "okay"; +}; + +&hdmi_codec { + extcon = <&hdmi0>; + status = "okay"; +}; diff --git a/board/batocera/allwinner/a733/dts/sun60iw2p1-cpu-vf.dtsi b/board/batocera/allwinner/a733/dts/sun60iw2p1-cpu-vf.dtsi new file mode 100644 index 00000000000..fe4e60ffff0 --- /dev/null +++ b/board/batocera/allwinner/a733/dts/sun60iw2p1-cpu-vf.dtsi @@ -0,0 +1,2512 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/{ + vf_mapping_table: vf_mapping_table { + vf-version = "V0.91"; + table = < + 0x00 0x0000 + 0x01 0x0100 + 0x11 0x0101 + 0x02 0x0200 + 0x12 0x0201 + 0x03 0x0300 + 0x04 0x0400 + 0x05 0x0500 + 0x06 0x0600 + 0x07 0x0700 + 0x08 0x0800 + 0x14 0x0401 + 0x15 0x0501 + >; + }; + + cluster0_opp_table: cluster0-opp-table { + compatible = "allwinner,sun50i-operating-points"; + opp-shared; + + opp@408000000 { + opp-hz = /bits/ 64 <408000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@720000000 { + opp-hz = /bits/ 64 <720000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@792000000 { + opp-hz = /bits/ 64 <792000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1008000000 { + opp-hz = /bits/ 64 <1008000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1104000000 { + opp-hz = /bits/ 64 <1104000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1200000000 { + opp-hz = /bits/ 64 <1200000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <850000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1296000000 { + opp-hz = /bits/ 64 <1296000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <900000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1392000000 { + opp-hz = /bits/ 64 <1392000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <950000>; + opp-microvolt-vf0200 = <850000>; + opp-microvolt-vf0300 = <860000>; + opp-microvolt-vf0400 = <840000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <840000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <860000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1416000000 { + opp-hz = /bits/ 64 <1416000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1512000000 { + opp-hz = /bits/ 64 <1512000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <1000000>; + opp-microvolt-vf0200 = <900000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <880000>; + opp-microvolt-vf0500 = <820000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <820000>; + opp-microvolt-vf0800 = <900000>; + opp-microvolt-vf0401 = <820000>; + opp-microvolt-vf0501 = <820000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1608000000 { + opp-hz = /bits/ 64 <1608000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <900000>; + opp-microvolt-vf0100 = <1050000>; + opp-microvolt-vf0200 = <950000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <920000>; + opp-microvolt-vf0500 = <860000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <860000>; + opp-microvolt-vf0800 = <950000>; + opp-microvolt-vf0401 = <860000>; + opp-microvolt-vf0501 = <840000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1704000000 { + opp-hz = /bits/ 64 <1704000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <1000000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <960000>; + opp-microvolt-vf0500 = <900000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <900000>; + opp-microvolt-vf0501 = <860000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1800000000 { + opp-hz = /bits/ 64 <1800000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <1000000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <1050000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <1000000>; + opp-microvolt-vf0500 = <950000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <950000>; + opp-microvolt-vf0501 = <900000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@416000000 { + opp-hz = /bits/ 64 <416000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@728000000 { + opp-hz = /bits/ 64 <728000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@780000000 { + opp-hz = /bits/ 64 <780000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1014000000 { + opp-hz = /bits/ 64 <1014000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1092000000 { + opp-hz = /bits/ 64 <1092000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1196000000 { + opp-hz = /bits/ 64 <1196000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <850000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1300000000 { + opp-hz = /bits/ 64 <1300000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <900000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1404000000 { + opp-hz = /bits/ 64 <1404000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <950000>; + opp-microvolt-26m-vf0200 = <850000>; + opp-microvolt-26m-vf0300 = <860000>; + opp-microvolt-26m-vf0400 = <840000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <840000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <860000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1508000000 { + opp-hz = /bits/ 64 <1508000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <1000000>; + opp-microvolt-26m-vf0200 = <900000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <880000>; + opp-microvolt-26m-vf0500 = <820000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <820000>; + opp-microvolt-26m-vf0800 = <900000>; + opp-microvolt-26m-vf0401 = <820000>; + opp-microvolt-26m-vf0501 = <820000>; + }; + + opp@1586000000 { + opp-hz = /bits/ 64 <1586000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <900000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1612000000 { + opp-hz = /bits/ 64 <1612000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <1050000>; + opp-microvolt-26m-vf0200 = <950000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <920000>; + opp-microvolt-26m-vf0500 = <860000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <860000>; + opp-microvolt-26m-vf0800 = <950000>; + opp-microvolt-26m-vf0401 = <860000>; + opp-microvolt-26m-vf0501 = <840000>; + }; + + opp@1716000000 { + opp-hz = /bits/ 64 <1716000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <1000000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <960000>; + opp-microvolt-26m-vf0500 = <900000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <900000>; + opp-microvolt-26m-vf0501 = <860000>; + }; + + opp@1794000000 { + opp-hz = /bits/ 64 <1794000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <1000000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <1050000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <1000000>; + opp-microvolt-26m-vf0500 = <950000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <950000>; + opp-microvolt-26m-vf0501 = <900000>; + }; + }; + + cluster1_opp_table: cluster1-opp-table { + compatible = "allwinner,sun50i-operating-points"; + opp-shared; + + opp@408000000 { + opp-hz = /bits/ 64 <408000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@720000000 { + opp-hz = /bits/ 64 <720000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@792000000 { + opp-hz = /bits/ 64 <792000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1008000000 { + opp-hz = /bits/ 64 <1008000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1200000000 { + opp-hz = /bits/ 64 <1200000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1296000000 { + opp-hz = /bits/ 64 <1296000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1392000000 { + opp-hz = /bits/ 64 <1392000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <850000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <820000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <820000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1512000000 { + opp-hz = /bits/ 64 <1512000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <900000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <860000>; + opp-microvolt-vf0400 = <820000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <860000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1608000000 { + opp-hz = /bits/ 64 <1608000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <850000>; + opp-microvolt-vf0100 = <950000>; + opp-microvolt-vf0200 = <850000>; + opp-microvolt-vf0300 = <900000>; + opp-microvolt-vf0400 = <840000>; + opp-microvolt-vf0500 = <820000>; + opp-microvolt-vf0600 = <850000>; + opp-microvolt-vf0700 = <820000>; + opp-microvolt-vf0800 = <900000>; + opp-microvolt-vf0401 = <820000>; + opp-microvolt-vf0501 = <820000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1704000000 { + opp-hz = /bits/ 64 <1704000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <900000>; + opp-microvolt-vf0100 = <1000000>; + opp-microvolt-vf0200 = <900000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <870000>; + opp-microvolt-vf0500 = <850000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <850000>; + opp-microvolt-vf0800 = <950000>; + opp-microvolt-vf0401 = <850000>; + opp-microvolt-vf0501 = <840000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1800000000 { + opp-hz = /bits/ 64 <1800000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <950000>; + opp-microvolt-vf0100 = <1050000>; + opp-microvolt-vf0200 = <950000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <920000>; + opp-microvolt-vf0500 = <900000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <900000>; + opp-microvolt-vf0800 = <1000000>; + opp-microvolt-vf0401 = <900000>; + opp-microvolt-vf0501 = <870000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1896000000 { + opp-hz = /bits/ 64 <1896000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <1000000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <970000>; + opp-microvolt-vf0500 = <940000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <940000>; + opp-microvolt-vf0501 = <900000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1920000000 { + opp-hz = /bits/ 64 <1920000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <1000000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1944000000 { + opp-hz = /bits/ 64 <1944000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <1000000>; + opp-microvolt-vf0500 = <970000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <970000>; + opp-microvolt-vf0501 = <930000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1992000000 { + opp-hz = /bits/ 64 <1992000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <1050000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <1050000>; + opp-microvolt-vf0500 = <1000000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <1000000>; + opp-microvolt-vf0501 = <960000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@416000000 { + opp-hz = /bits/ 64 <416000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@728000000 { + opp-hz = /bits/ 64 <728000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@780000000 { + opp-hz = /bits/ 64 <780000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1014000000 { + opp-hz = /bits/ 64 <1014000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1196000000 { + opp-hz = /bits/ 64 <1196000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1300000000 { + opp-hz = /bits/ 64 <1300000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1404000000 { + opp-hz = /bits/ 64 <1404000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <850000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <820000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <820000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1508000000 { + opp-hz = /bits/ 64 <1508000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <900000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <860000>; + opp-microvolt-26m-vf0400 = <820000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <860000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1586000000 { + opp-hz = /bits/ 64 <1586000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <850000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1612000000 { + opp-hz = /bits/ 64 <1612000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <950000>; + opp-microvolt-26m-vf0200 = <850000>; + opp-microvolt-26m-vf0300 = <900000>; + opp-microvolt-26m-vf0400 = <840000>; + opp-microvolt-26m-vf0500 = <820000>; + opp-microvolt-26m-vf0600 = <850000>; + opp-microvolt-26m-vf0700 = <820000>; + opp-microvolt-26m-vf0800 = <900000>; + opp-microvolt-26m-vf0401 = <820000>; + opp-microvolt-26m-vf0501 = <820000>; + }; + + opp@1690000000 { + opp-hz = /bits/ 64 <1690000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <900000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1716000000 { + opp-hz = /bits/ 64 <1716000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <1000000>; + opp-microvolt-26m-vf0200 = <900000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <870000>; + opp-microvolt-26m-vf0500 = <850000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <850000>; + opp-microvolt-26m-vf0800 = <950000>; + opp-microvolt-26m-vf0401 = <850000>; + opp-microvolt-26m-vf0501 = <840000>; + }; + + opp@1794000000 { + opp-hz = /bits/ 64 <1794000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <950000>; + opp-microvolt-26m-vf0100 = <1050000>; + opp-microvolt-26m-vf0200 = <950000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <920000>; + opp-microvolt-26m-vf0500 = <900000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <900000>; + opp-microvolt-26m-vf0800 = <1000000>; + opp-microvolt-26m-vf0401 = <900000>; + opp-microvolt-26m-vf0501 = <870000>; + }; + + opp@1898000000 { + opp-hz = /bits/ 64 <1898000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <1000000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <1000000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <970000>; + opp-microvolt-26m-vf0500 = <940000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <940000>; + opp-microvolt-26m-vf0501 = <900000>; + }; + + opp@1950000000 { + opp-hz = /bits/ 64 <1950000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <1000000>; + opp-microvolt-26m-vf0500 = <970000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <970000>; + opp-microvolt-26m-vf0501 = <930000>; + }; + + opp@1976000000 { + opp-hz = /bits/ 64 <1976000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <1050000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@2002000000 { + opp-hz = /bits/ 64 <2002000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <1050000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <1050000>; + opp-microvolt-26m-vf0500 = <1000000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <1000000>; + opp-microvolt-26m-vf0501 = <960000>; + }; + }; + + dsu_opp_table: dsu-opp-table { + compatible = "allwinner,dsu-operating-points"; + + opp@288000000 { + opp-hz = /bits/ 64 <288000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@312000000 { + opp-hz = /bits/ 64 <312000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@528000000 { + opp-hz = /bits/ 64 <528000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@600000000 { + opp-hz = /bits/ 64 <600000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@744000000 { + opp-hz = /bits/ 64 <744000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@792000000 { + opp-hz = /bits/ 64 <792000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@840000000 { + opp-hz = /bits/ 64 <840000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@888000000 { + opp-hz = /bits/ 64 <888000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@912000000 { + opp-hz = /bits/ 64 <912000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <850000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@984000000 { + opp-hz = /bits/ 64 <984000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <900000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1032000000 { + opp-hz = /bits/ 64 <1032000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1056000000 { + opp-hz = /bits/ 64 <1056000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <950000>; + opp-microvolt-vf0200 = <850000>; + opp-microvolt-vf0300 = <860000>; + opp-microvolt-vf0400 = <840000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <840000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <860000>; + opp-microvolt-vf0401 = <800000>; + opp-microvolt-vf0501 = <800000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1152000000 { + opp-hz = /bits/ 64 <1152000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <900000>; + opp-microvolt-vf0100 = <1000000>; + opp-microvolt-vf0200 = <900000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <880000>; + opp-microvolt-vf0500 = <820000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <820000>; + opp-microvolt-vf0800 = <900000>; + opp-microvolt-vf0401 = <820000>; + opp-microvolt-vf0501 = <820000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1200000000 { + opp-hz = /bits/ 64 <1200000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <1050000>; + opp-microvolt-vf0200 = <950000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <920000>; + opp-microvolt-vf0500 = <860000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <860000>; + opp-microvolt-vf0800 = <950000>; + opp-microvolt-vf0401 = <860000>; + opp-microvolt-vf0501 = <840000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1224000000 { + opp-hz = /bits/ 64 <1224000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <1000000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <960000>; + opp-microvolt-vf0500 = <900000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <900000>; + opp-microvolt-vf0501 = <860000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1248000000 { + opp-hz = /bits/ 64 <1248000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <1050000>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <1000000>; + opp-microvolt-vf0500 = <950000>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <950000>; + opp-microvolt-vf0501 = <900000>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <1000000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <960000>; + opp-microvolt-26m-vf0500 = <900000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <900000>; + opp-microvolt-26m-vf0501 = <860000>; + }; + + opp@1296000000 { + opp-hz = /bits/ 64 <1296000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <1000000>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@546000000 { + opp-hz = /bits/ 64 <546000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@598000000 { + opp-hz = /bits/ 64 <598000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@780000000 { + opp-hz = /bits/ 64 <780000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@832000000 { + opp-hz = /bits/ 64 <832000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <800000>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@910000000 { + opp-hz = /bits/ 64 <910000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <850000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + opp-microvolt-26m-vf0400 = <800000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <800000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <800000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@988000000 { + opp-hz = /bits/ 64 <988000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <900000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1066000000 { + opp-hz = /bits/ 64 <1066000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0100 = <950000>; + opp-microvolt-26m-vf0200 = <850000>; + opp-microvolt-26m-vf0300 = <860000>; + opp-microvolt-26m-vf0400 = <840000>; + opp-microvolt-26m-vf0500 = <800000>; + opp-microvolt-26m-vf0600 = <840000>; + opp-microvolt-26m-vf0700 = <800000>; + opp-microvolt-26m-vf0800 = <860000>; + opp-microvolt-26m-vf0401 = <800000>; + opp-microvolt-26m-vf0501 = <800000>; + }; + + opp@1144000000 { + opp-hz = /bits/ 64 <1144000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <1000000>; + opp-microvolt-26m-vf0200 = <900000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <880000>; + opp-microvolt-26m-vf0500 = <820000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <820000>; + opp-microvolt-26m-vf0800 = <900000>; + opp-microvolt-26m-vf0401 = <820000>; + opp-microvolt-26m-vf0501 = <820000>; + }; + + opp@1196000000 { + opp-hz = /bits/ 64 <1196000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <900000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + opp@1222000000 { + opp-hz = /bits/ 64 <1222000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <1050000>; + opp-microvolt-26m-vf0200 = <950000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <920000>; + opp-microvolt-26m-vf0500 = <860000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <860000>; + opp-microvolt-26m-vf0800 = <950000>; + opp-microvolt-26m-vf0401 = <860000>; + opp-microvolt-26m-vf0501 = <840000>; + }; + + opp@1274000000 { + opp-hz = /bits/ 64 <1274000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <0>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <1050000>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <1000000>; + opp-microvolt-26m-vf0500 = <950000>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <950000>; + opp-microvolt-26m-vf0501 = <900000>; + }; + + opp@1352000000 { + opp-hz = /bits/ 64 <1352000000>; + clock-latency-ns = <244144>; + opp-microvolt-vf0000 = <0>; + opp-microvolt-vf0100 = <0>; + opp-microvolt-vf0200 = <0>; + opp-microvolt-vf0300 = <0>; + opp-microvolt-vf0400 = <0>; + opp-microvolt-vf0500 = <0>; + opp-microvolt-vf0600 = <0>; + opp-microvolt-vf0700 = <0>; + opp-microvolt-vf0800 = <0>; + opp-microvolt-vf0401 = <0>; + opp-microvolt-vf0501 = <0>; + opp-microvolt-26m-vf0000 = <1000000>; + opp-microvolt-26m-vf0100 = <0>; + opp-microvolt-26m-vf0200 = <0>; + opp-microvolt-26m-vf0300 = <0>; + opp-microvolt-26m-vf0400 = <0>; + opp-microvolt-26m-vf0500 = <0>; + opp-microvolt-26m-vf0600 = <0>; + opp-microvolt-26m-vf0700 = <0>; + opp-microvolt-26m-vf0800 = <0>; + opp-microvolt-26m-vf0401 = <0>; + opp-microvolt-26m-vf0501 = <0>; + }; + + }; + + npu_opp_table: npu-opp-table { + compatible = "allwinner,npu-operating-points"; + + npu_opp_table_492: opp-492 { + opp-hz = /bits/ 64 <492000000>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0201 = <800000>; + opp-microvolt-vf0202 = <800000>; + opp-microvolt-vf0203 = <800000>; + opp-microvolt-vf0204 = <800000>; + opp-microvolt-vf0205 = <800000>; + opp-microvolt-vf0206 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0201 = <800000>; + opp-microvolt-26m-vf0202 = <800000>; + opp-microvolt-26m-vf0203 = <800000>; + opp-microvolt-26m-vf0204 = <800000>; + opp-microvolt-26m-vf0205 = <800000>; + opp-microvolt-26m-vf0206 = <800000>; + opp-microvolt-26m-vf0300 = <800000>; + }; + + npu_opp_table_852: opp-852 { + opp-hz = /bits/ 64 <852000000>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0201 = <800000>; + opp-microvolt-vf0202 = <880000>; + opp-microvolt-vf0203 = <880000>; + opp-microvolt-vf0204 = <880000>; + opp-microvolt-26m-vf0000 = <800000>; + opp-microvolt-26m-vf0200 = <800000>; + opp-microvolt-26m-vf0201 = <800000>; + opp-microvolt-26m-vf0202 = <880000>; + opp-microvolt-26m-vf0203 = <880000>; + opp-microvolt-26m-vf0204 = <800000>; + }; + + npu_opp_table_1008: opp-1008 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt-vf0000 = <960000>; + opp-microvolt-vf0202 = <1030000>; + opp-microvolt-vf0203 = <1030000>; + opp-microvolt-vf0204 = <1000000>; + opp-microvolt-vf0205 = <960000>; + opp-microvolt-vf0206 = <900000>; + opp-microvolt-vf0300 = <900000>; + opp-microvolt-26m-vf0000 = <960000>; + opp-microvolt-26m-vf0202 = <1030000>; + opp-microvolt-26m-vf0203 = <1030000>; + opp-microvolt-26m-vf0204 = <1000000>; + opp-microvolt-26m-vf0205 = <960000>; + opp-microvolt-26m-vf0206 = <900000>; + opp-microvolt-26m-vf0300 = <900000>; + }; + + npu_opp_table_1120: opp-1120 { + opp-hz = /bits/ 64 <1120000000>; + opp-microvolt-vf0205 = <1080000>; + opp-microvolt-vf0206 = <1040000>; + opp-microvolt-vf0300 = <1040000>; + opp-microvolt-26m-vf0205 = <1080000>; + opp-microvolt-26m-vf0206 = <1040000>; + opp-microvolt-26m-vf0300 = <1040000>; + }; + }; + + ve_opp_table: ve-opp-table { + compatible = "allwinner,ve-operating-points"; + + opp-vf0000 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0100 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0101 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0200 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0201 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0300 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0400 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0500 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0600 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0700 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0800 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0401 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + opp-vf0501 { + opp-hz-0 = /bits/ 64 <624000000>; + opp-microvolt-0 = <800000>; + }; + }; +}; diff --git a/board/batocera/allwinner/a733/dts/sun60iw2p1.dtsi b/board/batocera/allwinner/a733/dts/sun60iw2p1.dtsi new file mode 100644 index 00000000000..628e30f53c6 --- /dev/null +++ b/board/batocera/allwinner/a733/dts/sun60iw2p1.dtsi @@ -0,0 +1,5079 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "sun60iw2p1-cpu-vf.dtsi" +/ { + model = "sun60iw2"; + interrupt-parent = <&wakeupgen>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial7 = &uart7; + serial8 = &uart8; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + sunxi-mmc0 = &sdc0; + sunxi-mmc2 = &sdc3; + twi0 = &twi0; + twi1 = &twi1; + twi2 = &twi2; + twi3 = &twi3; + twi4 = &twi4; + twi5 = &twi5; + twi6 = &twi6; + twi7 = &twi7; + twi8 = &twi8; + twi9 = &twi9; + twi10 = &twi10; + twi11 = &twi11; + twi12 = &twi12; + twi13 = &s_twi0; + twi14 = &s_twi1; + twi15 = &s_twi2; + pwm0 = &pwm0; + pwm1 = &pwm1; + pwm2 = &s_pwm0; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &r_spi; + gpadc0 = &gpadc0; + ir0 = &irrx; + ir1 = &s_irrx; + ir2 = &irtx; + }; + + reg_vdd_sys: vdd-sys { + compatible = "regulator-fixed"; + regulator-name = "vdd_sys"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-boot-on; + regulator-always-on; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + bl31 { + reg = <0x0 0x48000000 0x0 0x01000000>; + }; + }; + + chosen { + bootargs = "earlyprintk=sunxi-uart,0x2500000 loglevel=8 initcall_debug=0 console=ttyS0 init=/init"; + linux,initrd-start = <0x0 0x0>; + linux,initrd-end = <0x0 0x0>; + rng-seed; /* This random value should be provided by bootloader */ + kaslr-seed; /* This random value should be provided by bootloader */ + }; + + /* avoid panic when memory-node err(from uboot) */ + memory@40000000 { + device_type = "memory"; + reg = <0x00000000 0x40000000 0x00000000 0x20000000>; + }; + + firmware { + android { + compatible = "android,firmware"; + name = "android"; + boot_devices = "soc@3000000/4020000.sdmmc,soc@3000000/4022000.sdmmc,soc@3000000/4023000.sdmmc,soc@3000000/4520000.ufs,soc@3000000"; + vbmeta { + compatible = "android,vbmeta"; + parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,init_boot"; + }; + }; + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + arm_pmu { + compatible = "arm,armv8-pmuv3"; + interrupt-parent = <&gic>; + interrupts = ; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <430>; + clocks = <&cpupll_ccu CLK_PLL_CPU_L>; + operating-points-v2 = <&cluster0_opp_table>; + dynamic-power-coefficient = <162>; + #cooling-cells = <2>; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x100>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <430>; + clocks = <&cpupll_ccu CLK_PLL_CPU_L>; + operating-points-v2 = <&cluster0_opp_table>; + dynamic-power-coefficient = <162>; + #cooling-cells = <2>; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x200>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <430>; + clocks = <&cpupll_ccu CLK_PLL_CPU_L>; + operating-points-v2 = <&cluster0_opp_table>; + dynamic-power-coefficient = <162>; + #cooling-cells = <2>; + + cpu2_idle: thermal-idle { + #cooling-cells = <2>; + duration-us = <10000>; + exit-latency-us = <500>; + }; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x300>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <430>; + clocks = <&cpupll_ccu CLK_PLL_CPU_L>; + operating-points-v2 = <&cluster0_opp_table>; + dynamic-power-coefficient = <162>; + #cooling-cells = <2>; + + cpu3_idle: thermal-idle { + #cooling-cells = <2>; + duration-us = <10000>; + exit-latency-us = <500>; + }; + }; + + cpu4: cpu@400 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x400>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <430>; + clocks = <&cpupll_ccu CLK_PLL_CPU_L>; + operating-points-v2 = <&cluster0_opp_table>; + dynamic-power-coefficient = <162>; + #cooling-cells = <2>; + + cpu4_idle: thermal-idle { + #cooling-cells = <2>; + duration-us = <10000>; + exit-latency-us = <500>; + }; + }; + + cpu5: cpu@500 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x500>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <430>; + clocks = <&cpupll_ccu CLK_PLL_CPU_L>; + operating-points-v2 = <&cluster0_opp_table>; + dynamic-power-coefficient = <162>; + #cooling-cells = <2>; + + cpu5_idle: thermal-idle { + #cooling-cells = <2>; + duration-us = <10000>; + exit-latency-us = <500>; + }; + }; + + cpu6: cpu@600 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x0 0x600>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; + clocks = <&cpupll_ccu CLK_PLL_CPU_B>; + operating-points-v2 = <&cluster1_opp_table>; + dynamic-power-coefficient = <598>; + #cooling-cells = <2>; + + cpu6_idle: thermal-idle { + #cooling-cells = <2>; + duration-us = <10000>; + exit-latency-us = <500>; + }; + }; + + cpu7: cpu@700 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x0 0x700>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; + capacity-dmips-mhz = <1024>; + clocks = <&cpupll_ccu CLK_PLL_CPU_B>; + operating-points-v2 = <&cluster1_opp_table>; + dynamic-power-coefficient = <598>; + #cooling-cells = <2>; + + cpu7_idle: thermal-idle { + #cooling-cells = <2>; + duration-us = <10000>; + exit-latency-us = <500>; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + core4 { + cpu = <&cpu4>; + }; + core5 { + cpu = <&cpu5>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu6>; + }; + core1 { + cpu = <&cpu7>; + }; + }; + }; + + idle-states { + entry-method = "arm,psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + entry-latency-us = <46>; + exit-latency-us = <59>; + min-residency-us = <3570>; + local-timer-stop; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1010000>; + entry-latency-us = <47>; + exit-latency-us = <74>; + min-residency-us = <5000>; + local-timer-stop; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + arm_pmu { + compatible = "arm,armv8-pmuv3"; + interrupt-parent = <&gic>; + interrupts = ; /* GIC-600 */ + //interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + }; + + dcxo19_2M: dcxo19_2M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <19200000>; + clock-output-names = "dcxo19_2M"; + }; + + dcxo24M: dcxo24M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "dcxo24M"; + }; + + dcxo26M: dcxo26M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <26000000>; + clock-output-names = "dcxo26M"; + }; + + sys24M: sys24M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "sys24M"; + }; + + rc_16m: rc16m_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <16000000>; + clock-accuracy = <300000000>; + clock-output-names = "rc-16m"; + }; + + ext_32k: ext32k_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "ext-32k"; + }; + + gic: interrupt-controller@3400000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0x03400000 0 0x10000>, /* GIC Dist */ + <0x0 0x03460000 0 0xFF004>; /* GIC Re */ + interrupt-parent = <&gic>; + }; + + wakeupgen: interrupt-controller@0 { + compatible = "allwinner,sunxi-wakeupgen"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-parent = <&gic>; + }; + + + timer_arch { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + clock-frequency = <24000000>; + interrupt-parent = <&gic>; + arm,no-tick-in-suspend; + }; + + nmi_intc: intc-nmi@7010320 { + compatible = "allwinner,sun8i-nmi"; + interrupt-parent = <&gic>; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0x07010320 0 0xc>; + interrupts = ; + }; + + mmu_aw: iommu@3900000 { + compatible = "allwinner,iommu-v20"; + reg = <0x0 0x03900000 0x0 0x20000>; + interrupts = , + ; + interrupt-names = "iommu-irq1","iommu-irq2"; + clocks = <&ccu CLK_IOMMU0_SYS_H>, + <&ccu CLK_IOMMU0_SYS_P>, + <&ccu CLK_IOMMU0_SYS_MBUS>, + <&ccu CLK_IOMMU1_SYS_H>, + <&ccu CLK_IOMMU1_SYS_P>, + <&ccu CLK_IOMMU1_SYS_MBUS> + ; + clock-names = "iommu0-sys-hclk", + "iommu0-sys-pclk", + "iommu0-sys-mclk", + "iommu1-sys-hclk", + "iommu1-sys-pclk", + "iommu1-sys-mclk" + ; + resets = <&ccu RST_BUS_IOMMU0_SY>, <&ccu RST_BUS_IOMMU1_SY>; + /* clock-frequency = <24000000>; */ + #iommu-cells = <2>; + version=<0x16>; + tlb_prefetch = <0x3007f>; + tlb_invalid_mode = <0x1>; + ptw_invalid_mode = <0x1>; + masters = "USB", "CSI", "ISP", "VE_ENC", "dummy04", "dummy05", + "VE_DEC0", "VE_DEC1", "DE0","DI","G2D","EINK", "DEBUG_MODE"; + + usb_iommu { + iommu-master; + id=<0>; + }; + + csi_iommu { + iommu-master; + id=<1>; + power-domains = <&pd SUN60IW2_PCK_VI>; + }; + + isp_iommu { + iommu-master; + id=<2>; + power-domains = <&pd SUN60IW2_PCK_VI>; + }; + + ve_enc_iommu { + iommu-master; + id=<3>; + power-domains = <&pd SUN60IW2_PCK_VE_ENC>; + }; + + dummy04 { + iommu-master; + id=<4>; + skip; + }; + dummy05 { + iommu-master; + id=<5>; + skip; + }; + + ve_dec0_iommu { + iommu-master; + id=<6>; + power-domains = <&pd SUN60IW2_PCK_VE_DEC>; + }; + + ve_dec1_iommu { + iommu-master; + id=<7>; + power-domains = <&pd SUN60IW2_PCK_VE_DEC>; + }; + + de0_iommu { + iommu-master; + id=<8>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + + di_iommu { + iommu-master; + id=<9>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + + g2d_iommu { + iommu-master; + id=<10>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + + eink_iommu { + iommu-master; + id=<11>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + }; + + dsufreq: dsufreq@0 { + compatible = "allwinner,dsufreq"; + reg = <0x0 0x08860000 0x0 0x1000>; + clocks = <&cpupll_ccu CLK_PLL_CPU_DSU>; + operating-points-v2 = <&dsu_opp_table>; + }; + + + thermal_zones: thermal-zones { + cpul_thermal_zone: cpul_thermal_zone { + polling-delay-passive = <100>; + polling-delay = <1000>; + thermal-sensors = <&ths 3>; + sustainable-power = <756>; + + cpul_trips: trips { + cpul_threshold: trip-point@0 { + temperature = <70000>; + type = "passive"; + hysteresis = <2000>; + }; + cpul_target: trip-point@1 { + temperature = <90000>; + type = "passive"; + hysteresis = <2000>; + }; + cpul_crit: cpu_crit@0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + + cooling-maps { + map0 { + trip = <&cpul_target>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; + }; + + cpub_thermal_zone: cpub_thermal_zone { + polling-delay-passive = <100>; + polling-delay = <1000>; + thermal-sensors = <&ths 0>; + sustainable-power = <914>; + + cpub_trips: trips { + cpub_threshold: trip-point@0 { + temperature = <70000>; + type = "passive"; + hysteresis = <2000>; + }; + cpub_target: trip-point@1 { + temperature = <90000>; + type = "passive"; + hysteresis = <2000>; + }; + cpub_crit: cpu_crit@0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + + cooling-maps { + map0 { + trip = <&cpub_target>; + cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + contribution = <1024>; + }; + }; + }; + + cpul_idle_zone: cpul_idle_zone { + polling-delay-passive = <100>; + polling-delay = <1000>; + thermal-sensors = <&ths 5>; + + cpul_idle_trips: trips { + cpul_thres: trip-point@0 { + temperature = <90000>; + type = "passive"; + hysteresis = <2000>; + }; + cpul_overshot: trip-point@1{ + temperature = <100000>; + type = "passive"; + hysteresis = <2000>; + }; + }; + + cooling-maps { + map0 { + trip = <&cpul_overshot>; + cooling-device = <&cpu2_idle 0 50>, + <&cpu3_idle 0 50>, + <&cpu4_idle 0 50>, + <&cpu5_idle 0 50>; + contribution = <1024>; + }; + }; + }; + + cpub_idle_zone: cpub_idle_zone { + polling-delay-passive = <100>; + polling-delay = <1000>; + thermal-sensors = <&ths 6>; + + cpub_idle_trips: trips { + cpub_thres: trip-point@0 { + temperature = <90000>; + type = "passive"; + hysteresis = <2000>; + }; + cpub_overshot: trip-point@1{ + temperature = <100000>; + type = "passive"; + hysteresis = <2000>; + }; + }; + + cooling-maps { + map0 { + trip = <&cpub_overshot>; + cooling-device = <&cpu6_idle 0 100>, + <&cpu7_idle 0 100>; + contribution = <1024>; + }; + }; + }; + + gpu_thermal_zone: gpu_thermal_zone { + polling-delay-passive = <100>; + polling-delay = <1000>; + thermal-sensors = <&ths 4>; + sustainable-power = <2400>; + + gpu_trips: trips { + gpu_threshold: trip-point@0 { + temperature = <60000>; + type = "passive"; + hysteresis = <0>; + }; + gpu_target: trip-point@1 { + temperature = <90000>; + type = "passive"; + hysteresis = <0>; + }; + gpu_crit: gpu_crit@0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + + cooling-maps { + map0 { + trip = <&gpu_threshold>; + cooling-device = <&gpu + 0 + 0>; + contribution = <1024>; + }; + map1 { + trip = <&gpu_target>; + cooling-device = <&gpu + 0 + 3>; + contribution = <1024>; + }; + map2 { + trip = <&gpu_crit>; + cooling-device = <&gpu + 3 + 3>; + contribution = <1024>; + }; + + }; + }; + + npu_thermal_zone: npu_thermal_zone { + polling-delay-passive = <100>; + polling-delay = <1000>; + thermal-sensors = <&ths 2>; + + npu_trips: trips { + npu_crit: npu_crit@0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + ddr_thermal_zone: ddr_thermal_zone { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + + ddr_trips: trips { + ddr_crit: ddr_crit@0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + skin_zone { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 7>; + + skin_trips: trips { + skin_crit: skin_crit@0 { + temperature = <50000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + }; + + pck: pck-600@7060000 { + compatible = "allwinner,sun60iw2-pck", "syscon", "simple-mfd"; + reg = <0x0 0x07060000 0x0 0xB000>; + + pd: power-controller { + compatible = "allwinner,sun60iw2-pck-600"; + clocks = <&r_ccu CLK_R_PPU>; + clock-names = "pck"; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + pd_vi@SUN60IW2_PCK_VI { + reg = ; + }; + pd_ve_dec@SUN60IW2_PCK_VE_DEC { + reg = ; + }; + pd_ve_enc@SUN60IW2_PCK_VE_ENC { + reg = ; + }; + /* + pd_gpu_top@SUN60IW2_PCK_GPU_TOP { + reg = ; + }; + pd_gpu_core@SUN60IW2_PCK_GPU_CORE { + reg = ; + }; + */ + + pd_pcie@SUN60IW2_PCK_PCIE { + reg = ; + }; + + pd_npu@SUN60IW2_PCK_NPU { + reg = ; + }; + + pd_usb2@SUN60IW2_PCK_USB2 { + reg = ; + }; + + pd_de_sys@SUN60IW2_PCK_DE_SYS { + reg = ; + }; + + pd_vo@SUN60IW2_PCK_VO { + reg = ; + }; + + pd_vo1@SUN60IW2_PCK_VO1 { + reg = ; + }; + }; + }; + + + dram: dram { + compatible = "allwinner,dram"; + clocks = <&ccu CLK_PLL_DDR>; + clock-names = "pll_ddr"; + }; + + ddr_clk: clk_ddr { + compatible = "allwinner,sun60iw2_clock_ddr"; + reg = <0x0 0x02002000 0x0 0x1000>; + clocks = <&ccu CLK_PLL_DDR>; + clock-names = "pll_ddr"; + #clock-cells = <0>; + }; + + dram_opp_table: opp_table { + compatible = "operating-points-v2"; + opp@150000000 { + opp-hz = /bits/ 64 <150000000>; + clock-latency-ns = <150000>; + opp-microvolt = <900000>; + }; + }; + + sunxi_dmcfreq: dmcfreq@3120000 { + compatible = "allwinner,sun60iw2-dmc", "syscon"; + reg = <0x0 0x0a020000 0x0 0x2000>, + <0x0 0x02020000 0x0 0x4000>, + <0x0 0x0a100000 0x0 0x11000>; + interrupts = ; + clocks = <&ddr_clk>, <&ccu CLK_NSI>; + clock-names = "dram", "bus"; + operating-points-v2 = <&dram_opp_table>; + upthreshold = <50>; + downdifferential = <20>; + holdtime = <25>; + vddcore-supply = <®_vdd_sys>; + normalvoltage = <900000>; + boostvoltage = <900000>; + }; + + soc: soc@3000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + ve: ve@1c0e000 { + compatible = "allwinner,sunxi-cedar-ve"; + reg = <0x0 0x01c0e000 0x0 0x3000>, + <0x0 0x03000000 0x0 0x10>; + interrupts = ; + clocks = <&ccu CLK_PLL_VE0>, + <&ccu CLK_VE_AHB_GATE>, + <&ccu CLK_DEC_MBUS_GATE>, + <&ccu CLK_VE_DEC_MBUS>, + <&ccu CLK_BUS_VE_DEC>, + <&ccu CLK_VE_DEC>; + clock-names = "pll_ve", + "ahb_gate", + "mbus_gate", + "mbus_ve", + "bus_ve", + "ve"; + resets = <&ccu RST_BUS_VE_DEC>; + reset-names = "reset_ve"; + operating-points-v2 = <&ve_opp_table>; + iommus = <&mmu_aw 6 1>; + nsi = <&nsi0 7>; + power-domains = <&pd SUN60IW2_PCK_VE_DEC>; + }; + ve1: ve1@1c0e000 { + compatible = "allwinner,sunxi-cedar-ve1"; + iommus = <&mmu_aw 7 1>; + nsi = <&nsi0 8>; + }; + ve2: ve2@1c10000 { + compatible = "allwinner,sunxi-cedar-ve2"; + reg = <0x0 0x01c10000 0x0 0x1000>, + <0x0 0x03000000 0x0 0x10>; + interrupts = ; + clocks = <&ccu CLK_PLL_VE1>, + <&ccu CLK_VE_ENC_AHB_GATE>, + <&ccu CLK_MBUS_VE_GATE>, + <&ccu CLK_MBUS_VE>, + <&ccu CLK_BUS_VE_ENC>, + <&ccu CLK_VE_ENC0>; + clock-names = "pll_ve", + "ahb_gate", + "mbus_gate", + "mbus_ve", + "bus_ve", + "ve"; + resets = <&ccu RST_BUS_VE_ENC0>; + reset-names = "reset_ve"; + operating-points-v2 = <&ve_opp_table>; + iommus = <&mmu_aw 3 1>; + nsi = <&nsi0 9>; + power-domains = <&pd SUN60IW2_PCK_VE_ENC>; + ve_top_reg_offset = <0x800>; + }; + rtc_ccu: rtc_ccu@7090000 { + compatible = "allwinner,sun60iw2-rtc-ccu"; + reg = <0x0 0x07090000 0x0 0x400>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + cpupll_ccu: cpupll_ccu@8870000 { + compatible = "allwinner,sun60iw2-cpupll"; + reg = <0x0 0x08870000 0x0 0x3034>; + clocks = <&rtc_ccu CLK_DCXO>; + clock-names = "dcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + ccu: ccu@2002000 { + compatible = "allwinner,sun60iw2-ccu"; + reg = <0x0 0x02002000 0x0 0x2000>; + clocks = <&dcxo24M>, <&rtc_ccu CLK_OSC32K>, <&rc_16m>; + clock-names = "hosc", "losc", "iosc"; + #clock-cells = <1>; + #reset-cells = <1>; + /* + * for example + * sdm_info: sdm_info { + * pll-video0 { + * sdm-enable = <1>; // required + * sdm-factor = <4>; // required + * freq-mod = ; // optional: default TR_N + * sdm-freq = ; // optional: default FREQ_31_5 + * }; + * }; + */ + }; + + r_ccu: r_ccu@7010000 { + compatible = "allwinner,sun60iw2-r-ccu"; + reg = <0x0 0x07010000 0x0 0x340>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + dump_reg:dump_reg@44000 { + compatible = "allwinner,sunxi-dump-reg"; + reg = <0x0 0x00044000 0x0 0x0004>; + }; + + soc_timer0: timer@3009000{ + compatible = "allwinner,sun50i-timer"; + device_type = "soc_timer"; + reg = <0x0 0x03009000 0x0 0x400>; + interrupt-parent = <&gic>; + interrupts = ; + clock-names = "parent", "bus", "timer0-mod", "timer1-mod"; + clocks = <&sys24M>, <&ccu CLK_BUS_TIMER>, <&ccu CLK_TIMER0>, <&ccu CLK_TIMER1>; + resets = <&ccu RST_BUS_TIMER0>; + }; + + + rtc: rtc@7090000 { + compatible = "allwinner,rtc-v201"; + device_type = "rtc"; + wakeup-source; + reg = <0x0 0x07090000 0x0 0x320>; + interrupts = ; + clocks = <&r_ccu CLK_RTC>, <&rtc_ccu CLK_RTC_1K>, <&rtc_ccu CLK_RTC_SPI>; + clock-names = "r-ahb-rtc", "rtc-1k", "rtc-spi"; + resets = <&r_ccu RST_BUS_RTC>; + gpr_cur_pos = <6>; + gpr_bootcount_pos = <7>; + }; + + pio: pinctrl@2000000 { + //#address-cells = <1>; + //#size-cells = <0>; + compatible = "allwinner,sun60iw2-pinctrl"; + reg = <0x0 0x02000000 0x0 0x600>; + interrupts = , + , + , + , + , + , + , + , + , + ; + clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + + sdc0_pins_f: sdc0@5 { + pins = "PF2"; + function = "sdc0"; + drive-strength = <30>; + bias-pull-up; + power-source = <3300>; + }; + + sdc0_pins_g: sdc0@6 { + pins = "PF2"; + function = "sdc0"; + drive-strength = <30>; + bias-pull-up; + power-source = <1800>; + }; + + sdc0_pins_a: sdc0@0 { + pins = "PF0", "PF1", + "PF3", "PF4", "PF5"; + function = "sdc0"; + drive-strength = <10>; + bias-pull-up; + power-source = <3300>; + }; + + sdc0_pins_b: sdc0@1 { + pins = "PF0", "PF1", + "PF3", "PF4", "PF5"; + function = "sdc0"; + drive-strength = <10>; + bias-pull-up; + power-source = <1800>; + }; + + sdc0_pins_c: sdc0@2 { + pins = "PF0", "PF1", "PF2", + "PF3", "PF4", "PF5"; + function = "gpio_in"; + power-source = <3300>; + }; + + /* TODO: add jtag pin */ + sdc0_pins_d: sdc0@3 { + pins = "PF2", "PF4"; + function = "uart0"; + drive-strength = <10>; + bias-pull-up; + power-source = <3300>; + }; + + sdc0_pins_e: sdc0@4 { + pins = "PF0", "PF1", "PF3", + "PF5"; + function = "jtag"; + drive-strength = <10>; + bias-pull-up; + power-source = <3300>; + }; + + sdc1_pins_a: sdc1@0 { + pins = "PG1", "PG2", + "PG3", "PG4", "PG5"; + function = "sdc1"; + drive-strength = <10>; + bias-pull-up; + }; + + sdc1_pins_b: sdc1@1 { + pins = "PG0", "PG1", "PG2", + "PG3", "PG4", "PG5"; + function = "gpio_in"; + }; + + sdc1_pins_c: sdc1@2 { + pins = "PG0"; + function = "sdc1"; + drive-strength = <20>; + bias-pull-up; + }; + + sdc2_pins_a: sdc2@0 { + pins = "PC6", + "PC8", "PC9", "PC10", "PC11", + "PC13", "PC14", "PC15", "PC16"; + function = "sdc2"; + drive-strength = <20>; + bias-pull-up; + }; + + sdc2_pins_b: sdc2@1 { + pins = "PC0", "PC1", "PC5", "PC6", + "PC8", "PC9", "PC10", "PC11", + "PC13", "PC14", "PC15", "PC16"; + function = "gpio_in"; + }; + + sdc2_pins_c: sdc2@2 { + pins = "PC0"; + function = "sdc2"; + drive-strength = <40>; + bias-pull-down; + }; + + sdc2_pins_d: sdc2@3 { + pins = "PC5", "PC1"; + function = "sdc2"; + drive-strength = <40>; + bias-pull-up; + }; + + sdc3_pins_a: sdc3@0 { + pins = "PC6", + "PC8", "PC9", "PC10", "PC11", + "PC13", "PC14", "PC15", "PC16"; + function = "sdc3"; + drive-strength = <20>; + bias-pull-up; + }; + + sdc3_pins_b: sdc3@1 { + pins = "PC0", "PC1", "PC5", "PC6", + "PC8", "PC9", "PC10", "PC11", + "PC13", "PC14", "PC15", "PC16"; + function = "gpio_in"; + }; + + sdc3_pins_c: sdc3@2 { + pins = "PC0"; + function = "sdc3"; + drive-strength = <40>; + bias-pull-down; + }; + + sdc3_pins_d: sdc3@3 { + pins = "PC5", "PC1"; + function = "sdc3"; + drive-strength = <40>; + bias-pull-up; + }; + + csi_mclk0_pins_a: csi_mclk0@0 { + pins = "PE0"; + function = "mcsi0"; + drive-strength = <20>; + }; + + csi_mclk0_pins_b: csi_mclk0@1 { + pins = "PE0"; + function = "gpio_in"; + }; + + csi_mclk1_pins_a: csi_mclk1@0 { + pins = "PE5"; + function = "mcsi1"; + drive-strength = <20>; + }; + + csi_mclk1_pins_b: csi_mclk1@1 { + pins = "PE5"; + function = "gpio_in"; + }; + + csi_mclk2_pins_a: csi_mclk2@0 { + pins = "PE9"; + function = "mcsi2"; + drive-strength = <20>; + }; + + csi_mclk2_pins_b: csi_mclk2@1 { + pins = "PE9"; + function = "gpio_in"; + }; + + ncsi0_8bit_pins_a: ncsi0_8bit@0 { + pins = "PE0", "PE1", "PE2", + "PE3", "PE4", "PE6", "PE7", + "PE8", "PE9", "PE10"; + function = "ncsi0"; + drive-strength = <20>; + }; + + ncsi0_8bit_pins_b: ncsi0_8bit@1 { + pins = "PE0", "PE1", "PE2", + "PE3", "PE4", "PE6", "PE7", + "PE8", "PE9", "PE10"; + function = "gpio_in"; + }; + + ncsi1_8bit_pins_a: ncsi1_8bit@0 { + pins = "PK0", "PK1", "PK2", + "PK19", "PK18", "PK17", "PK16", + "PK15", "PK14", "PK13", "PK12"; + function = "ncsi1"; + drive-strength = <20>; + }; + + ncsi1_8bit_pins_b: ncsi1_8bit@1 { + pins = "PK0", "PK1", "PK2", + "PK19", "PK18", "PK17", "PK16", + "PK15", "PK14", "PK13", "PK12"; + function = "gpio_in"; + }; + + ncsi1_16bit_pins_a: ncsi1_16bit@0 { + pins = "PK0", "PK1", "PK2", + "PK19", "PK18", "PK17", "PK16", + "PK15", "PK14", "PK13", "PK12", + "PK11", "PK10", "PK9", "PK8", + "PK7", "PK6", "PK5", "PK4"; + function = "ncsi1"; + drive-strength = <20>; + }; + + ncsi1_16bit_pins_b: ncsi1_16bit@1 { + pins = "PK0", "PK1", "PK2", + "PK19", "PK18", "PK17", "PK16", + "PK15", "PK14", "PK13", "PK12", + "PK11", "PK10", "PK9", "PK8", + "PK7", "PK6", "PK5", "PK4"; + function = "gpio_in"; + }; + + mipia_pins_a: mipia@0 { + pins = "PK0", "PK1", "PK2", "PK3", "PK4", + "PK5", "PK6", "PK7", "PK8", "PK9"; + function = "mcsia"; + drive-strength = <10>; + + }; + + mipia_pins_b: mipia@1 { + pins = "PK0", "PK1", "PK2", "PK3", "PK4", + "PK5", "PK6", "PK7", "PK8", "PK9"; + function = "gpio_in"; + }; + + mipib_pins_a: mipib@0 { + pins = "PK10", "PK11", "PK12", "PK13", "PK14", + "PK15", "PK16", "PK17", "PK18", "PK19"; + function = "mcsib"; + drive-strength = <10>; + }; + + mipib_pins_b: mipib@1 { + pins = "PK10", "PK11", "PK12", "PK13", "PK14", + "PK15", "PK16", "PK17", "PK18", "PK19"; + function = "gpio_in"; + + }; + + mipic_pins_a: mipic@0 { + pins = "PK20", "PK21", "PK22", + "PK23", "PK24", "PK25"; + function = "mcsic"; + drive-strength = <10>; + + }; + + mipic_pins_b: mipic@1 { + pins = "PK20", "PK21", "PK22", + "PK23", "PK24", "PK25"; + function = "gpio_in"; + }; + + dsi0_4lane_pins_a: dsi0_4lane@0 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; + function = "dsi0"; + drive-strength = <30>; + bias-disable; + }; + + dsi0_4lane_pins_b: dsi0_4lane@1 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; + function = "io_disabled"; + bias-disable; + }; + + dsi1_4lane_pins_a: dsi1_4lane@0 { + pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; + function = "dsi1"; + drive-strength = <30>; + bias-disable; + }; + + dsi1_4lane_pins_b: dsi1_4lane@1 { + pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; + function = "io_disabled"; + bias-disable; + }; + + lvds0_pins_a: lvds0@0 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; + function = "lvds0"; + drive-strength = <30>; + }; + + lvds0_pins_b: lvds0@1 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; + function = "gpio_in"; + }; + + lvds1_pins_a: lvds1@0 { + pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; + function = "lvds1"; + drive-strength = <30>; + }; + + lvds1_pins_b: lvds1@1 { + pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; + function = "gpio_in"; + }; + + lvds2_pins_a: lvds2@0 { + pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; + function = "lvds2"; + drive-strength = <30>; + }; + + lvds2_pins_b: lvds2@1 { + pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; + function = "gpio_in"; + }; + + lvds3_pins_a: lvds3@0 { + pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; + function = "lvds3"; + drive-strength = <30>; + }; + + lvds3_pins_b: lvds3@1 { + pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; + function = "gpio_in"; + }; + + rgb0_24pins_a: rgb0@0 { + pins = "PG0", "PG1", "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PG2", "PG3", "PD6", "PD7", "PD8", "PD9", \ + "PD10", "PD11", "PG4", "PG5", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ + "PD20", "PD21"; + function = "lcd0"; + drive-strength = <10>; + }; + + rgb0_24pins_b: rgb0@1 { + pins = "PG0", "PG1", "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PG2", "PG3", "PD6", "PD7", "PD8", "PD9", \ + "PD10", "PD11", "PG4", "PG5", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ + "PD20", "PD21"; + function = "gpio_in"; + }; + + rgb1_24pins_a: rgb1@0 { + pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", \ + "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", \ + "PJ25", "PJ26", "PJ27"; + function = "lcd1"; + drive-strength = <10>; + }; + + rgb1_24pins_b: rgb1@1 { + pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", "PJ10", "PJ11", "PJ12", \ + "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", \ + "PJ25", "PJ26", "PJ27"; + function = "gpio_in"; + }; + + test_pins_a: test_pins@0 { + pins = "PB9", "PB10"; + function = "test"; + drive-strength = <10>; + bias-pull-up; + }; + + test_pins_b: test_pins@1 { + pins = "PB9", "PB10"; + function = "gpio_in"; + }; + }; + + r_pio: pinctrl@7025000 { + #address-cells = <1>; + compatible = "allwinner,sun60iw2-r-pinctrl"; + reg = <0x0 0x07025000 0x0 0x410>; + interrupts = , /* GPIOL */ + ; + clocks = <&r_ccu CLK_R_APBS0>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + wdt: watchdog@2050000 { + compatible = "allwinner,wdt-v103"; + reg = <0x0 0x02050000 0x0 0x20>; + interrupts = ; + }; + + dma: dma-controller@4601000 { + compatible = "allwinner,dma-v106"; + reg = <0x0 0x04601000 0x0 0x2000>; + interrupts = ; + clocks = <&ccu CLK_DMA0>, <&ccu CLK_MBUS_DMA0>; + clock-names = "bus", "mbus"; + dma-channels = <16>; + dma-requests = <64>; + resets = <&ccu RST_BUS_DMA0>; + #dma-cells = <1>; + }; + + sid: sid@3006000 { + compatible = "allwinner,sunxi-sid"; + reg = <0x0 0x03006000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + non-secure-maxoffset = <0x7C>; + non-secure-maxlen = <0x20>; + + secure_status { + reg = <0x0 0>; + offset = <0xa0>; + size = <0x4>; + }; + chipid { + reg = <0x0 0>; + offset = <0x200>; + size = <0x10>; + }; + rotpk { + reg = <0x0 0>; + offset = <0x140>; + size = <0x20>; + }; + ufs_cal_word_l { + offset = <0x260>; + mask = <0xfffffff>; + shift = <0>; + }; + ufs_cal_word_h { + offset = <0x264>; + mask = <0xfffffff>; + shift = <0>; + }; + dvfs_ori { + offset = <0x24C>; + mask = <0xff>; + shift = <8>; + }; + dvfs_bak { + offset = <0x24C>; + mask = <0xff>; + shift = <16>; + }; + }; + + sram_ctrl: sram_ctrl@3000000 { + compatible = "allwinner,sram_ctrl"; + reg = <0x0 0x03000000 0 0x184>; + soc_ver { + offset = <0x24>; + mask = <0x7>; + shift = <0>; + }; + }; + + ths: ths@2522000 { + compatible = "allwinner,sun60iw2p1-ths"; + reg = <0x0 0x02522000 0x0 0x500>; + clocks = <&ccu CLK_THS0>,<&ccu CLK_GPADC0_24M>; + clock-names = "bus","gpadc"; + resets = <&ccu RST_BUS_THS0>; + #thermal-sensor-cells = <1>; + }; + + nsi0: nsi-controller@2020000 { + compatible = "allwinner,sunxi-nsi-v2"; + interrupts = ; + reg = <0x0 0x02020000 0x0 0x10000>, + <0x0 0x0A030000 0x0 0x20000>; + clocks = <&ccu CLK_PLL_DDR>, <&ccu CLK_MBUS> , <&ccu CLK_NSI>, + <&ccu CLK_PLL_PERI0_600M>, <&ccu CLK_GIC>, <&ccu CLK_NSI_CFG>, + <&ccu CLK_PLL_PERI0_600M>, <&ccu CLK_DRAM0>; + clock-names = "pll", "bus", "nsi", "nsi-p","gic", "nsi-cfg", "bus-p", "cpu_direct"; + resets = <&ccu RST_BUS_NSI>, <&ccu RST_BUS_NSI_CFG>; + reset-names = "bus_nsi", "bus_nsi_cfg"; + clock-frequency = <600000000>,<600000000>; + #nsi-cells = <1>; + clk_path_type = <1>; + topology_type = <2>; + channel_type = <2>; + master_clks = <6 2>,<10 4>,<18 2>,<19 2>,<20 2>,<32 2>,<33 2>; + ia_pmu_data_unit = <16>; + ra_pmu_data_unit = <64>; + ta_pmu_data_unit = <64>; + cpu_pmu_data_unit = <64>; + sub_node_id_mapping; + + cpu0{ + id = <19>; + cpu_direct_reg = <0x0A030000 0x2000>; + cpu_direct_mux = <0x8000200 0x0 0>; + }; + cpu1{ + id = <20>; + cpu_direct_reg = <0x0A034000 0x2000>; + cpu_direct_mux = <0x8000200 0x0 0>; + }; + + npu{ + id = <18>; + power-domains = <&pd SUN60IW2_PCK_NPU>; + }; + + usb_pcie{ + id=<13>; + power-domains = <&pd SUN60IW2_PCK_PCIE>; + }; + + gpu{ + id = <6>; + power-domains = <&pd SUN60IW2_PCK_GPU_TOP>; + }; + + iommu0{ + id = <14>; + mode = <0>; + pri = <3>; + select = <1>; + }; + + iommu1{ + id = <15>; + mode = <0>; + pri = <3>; + select = <1>; + }; + + de { + id = <2>; + mode = <0>; + pri = <2>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + + eink { + id = <3>; + mode = <0>; + pri = <1>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + + di { + id = <4>; + mode = <0>; + pri = <1>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + + g2d { + id = <5>; + mode = <0>; + pri = <1>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + }; + + ve0 { + id = <7>; + mode = <0>; + pri = <1>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_VE_DEC>; + }; + + ve1 { + id = <8>; + mode = <0>; + pri = <1>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_VE_DEC>; + }; + + ve2 { + id = <9>; + mode = <0>; + pri = <1>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_VE_ENC>; + }; + + + isp { + id = <16>; + mode = <0>; + pri = <2>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_VI>; + }; + + csi { + id = <17>; + mode = <0>; + pri = <2>; + select = <1>; + power-domains = <&pd SUN60IW2_PCK_VI>; + }; + }; + + pinctrl_test: pinctrl_test@2000000 { + reg = <0x0 0x0 0x0 0x0>; + compatible = "allwinner,sunxi-pinctrl-test"; + device_type = "pinctrl-test"; + pinctrl-0 = <&test_pins_a>; + pinctrl-1 = <&test_pins_b>; + pinctrl-names = "default", "sleep"; + test-gpios = <&r_pio PM 4 GPIO_ACTIVE_LOW>; + suspend-gpios = <&r_pio PM 5 GPIO_ACTIVE_LOW>; + wakeup-source; + interrupt-parent = <&pio>; + interrupts = ; + }; + + uart0: uart@2500000 { + compatible = "allwinner,uart-v100"; + reg = <0x0 0x02500000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <64>; + clocks = <&ccu CLK_UART0>; + resets = <&ccu RST_BUS_UART0>; + uart0_port = <0>; + uart0_type = <2>; + status = "disabled"; + }; + + uart1: uart@2501000 { + compatible = "allwinner,uart-v100"; + device_type = "uart1"; + reg = <0x0 0x02501000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <256>; + clocks = <&ccu CLK_UART1>; + resets = <&ccu RST_BUS_UART1>; + uart1_port = <1>; + uart1_type = <4>; + dmas = <&dma 15>,<&dma 15>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + uart2: uart@2502000 { + compatible = "allwinner,uart-v100"; + device_type = "uart2"; + reg = <0x0 0x02502000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <256>; + clocks = <&ccu CLK_UART2>; + resets = <&ccu RST_BUS_UART2>; + uart2_port = <2>; + uart2_type = <4>; + dmas = <&dma 16>,<&dma 16>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + uart3: uart@2503000 { + compatible = "allwinner,uart-v100"; + device_type = "uart3"; + reg = <0x0 0x02503000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <256>; + clocks = <&ccu CLK_UART3>; + resets = <&ccu RST_BUS_UART3>; + uart3_port = <3>; + uart3_type = <4>; + dmas = <&dma 17>,<&dma 17>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + uart4: uart@2504000 { + compatible = "allwinner,uart-v100"; + device_type = "uart4"; + reg = <0x0 0x02504000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <256>; + clocks = <&ccu CLK_UART4>; + resets = <&ccu RST_BUS_UART4>; + uart4_port = <4>; + uart4_type = <4>; + dmas = <&dma 18>,<&dma 18>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + uart5: uart@2505000 { + compatible = "allwinner,uart-v100"; + device_type = "uart5"; + reg = <0x0 0x02505000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <256>; + clocks = <&ccu CLK_UART5>; + resets = <&ccu RST_BUS_UART5>; + uart5_port = <5>; + uart5_type = <4>; + dmas = <&dma 19>,<&dma 19>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + uart6: uart@2506000 { + compatible = "allwinner,uart-v100"; + device_type = "uart6"; + reg = <0x0 0x02506000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <256>; + clocks = <&ccu CLK_UART6>; + resets = <&ccu RST_BUS_UART6>; + uart6_port = <6>; + uart6_type = <4>; + dmas = <&dma 20>,<&dma 20>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + uart7: uart@7080000 { + compatible = "allwinner,uart-v100"; + device_type = "uart7"; + reg = <0x0 0x07080000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <64>; + clocks = <&r_ccu CLK_R_UART0>; + resets = <&r_ccu RST_BUS_R_UART0>; + uart7_port = <7>; + uart7_type = <2>; + dmas = <&dma 50>,<&dma 50>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + uart8: uart@7081000 { + compatible = "allwinner,uart-v100"; + device_type = "uart8"; + reg = <0x0 0x07081000 0x0 0x400>; + interrupts = ; + sunxi,uart-fifosize = <64>; + clocks = <&r_ccu CLK_R_UART0>; + resets = <&r_ccu RST_BUS_R_UART1>; + uart8_port = <8>; + uart8_type = <2>; + dmas = <&dma 51>,<&dma 51>; + dma-names = "fake_tx","fake_rx"; + //dma-names = "tx","rx"; + status = "disabled"; + }; + + twi0: twi@2510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi0"; + reg = <0x0 0x02510000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI0>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI0>; + dmas = <&dma 37>, <&dma 37>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi1: twi@2511000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi1"; + reg = <0x0 0x02511000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI1>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI1>; + dmas = <&dma 38>, <&dma 38>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi2: twi@2512000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi2"; + reg = <0x0 0x02512000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI2>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI2>; + dmas = <&dma 39>, <&dma 39>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi3: twi@2513000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi3"; + reg = <0x0 0x02513000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI3>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI3>; + dmas = <&dma 40>, <&dma 40>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi4: twi@2514000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi4"; + reg = <0x0 0x02514000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI4>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI4>; + dmas = <&dma 41>, <&dma 41>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi5: twi@2515000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi5"; + reg = <0x0 0x02515000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI5>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI5>; + dmas = <&dma 42>, <&dma 42>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi6: twi@2516000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi6"; + reg = <0x0 0x02516000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI6>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI6>; + dmas = <&dma 43>, <&dma 43>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi7: twi@2517000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi7"; + reg = <0x0 0x02517000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI7>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI7>; + dmas = <&dma 44>, <&dma 44>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi8: twi@2518000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi8"; + reg = <0x0 0x02518000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI8>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI8>; + dmas = <&dma 45>, <&dma 45>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi9: twi@2519000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi9"; + reg = <0x0 0x02519000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI9>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI9>; + dmas = <&dma 58>, <&dma 58>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi10: twi@251A000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi10"; + reg = <0x0 0x0251A000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI10>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI10>; + dmas = <&dma 59>, <&dma 59>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi11: twi@251B000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi11"; + reg = <0x0 0x0251B000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI11>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI11>; + dmas = <&dma 60>, <&dma 60>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + twi12: twi@251C000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "twi12"; + reg = <0x0 0x0251C000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_TWI12>; + clock-names = "bus"; + resets = <&ccu RST_BUS_TWI12>; + dmas = <&dma 61>, <&dma 61>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + s_twi0: twi@7083000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "s_twi0"; + reg = <0x0 0x07083000 0x0 0x400>; + interrupts = ; + clocks = <&r_ccu CLK_R_TWI0>; + clock-names = "bus"; + resets = <&r_ccu RST_BUS_R_TWI0>; + dmas = <&dma 47>, <&dma 47>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + s_twi1: twi@7084000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "s_twi1"; + reg = <0x0 0x07084000 0x0 0x400>; + interrupts = ; + clocks = <&r_ccu CLK_R_TWI1>; + clock-names = "bus"; + resets = <&r_ccu RST_BUS_R_TWI1>; + dmas = <&dma 48>, <&dma 48>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + s_twi2: twi@7085000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-twi-v101"; + device_type = "s_twi2"; + reg = <0x0 0x07085000 0x0 0x400>; + interrupts = ; + clocks = <&r_ccu CLK_R_TWI2>; + clock-names = "bus"; + resets = <&r_ccu RST_BUS_R_TWI2>; + dmas = <&dma 49>, <&dma 49>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + pwm0: pwm@2527000 { + #pwm-cells = <0x3>; + compatible = "allwinner,sunxi-pwm-v203"; + reg = <0x0 0x02527000 0x0 0x400>; + clocks = <&ccu CLK_PWM0>; + interrupts = ; + resets = <&ccu RST_BUS_PWM0>; + pwm-number = <10>; + pwm-base = <0x0>; + sunxi-pwms = <&pwm0_0>, <&pwm0_1>, <&pwm0_2>, <&pwm0_3>, <&pwm0_4>, + <&pwm0_5>, <&pwm0_6>, <&pwm0_7>, <&pwm0_8>, <&pwm0_9>; + status = "okay"; + }; + + pwm0_0: pwm0@2527010 { + compatible = "allwinner,sunxi-pwm0"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527010 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_1: pwm0@2527011 { + compatible = "allwinner,sunxi-pwm1"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527011 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_2: pwm0@2527012 { + compatible = "allwinner,sunxi-pwm2"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527012 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_3: pwm0@2527013 { + compatible = "allwinner,sunxi-pwm3"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527013 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_4: pwm0@2527014 { + compatible = "allwinner,sunxi-pwm4"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527014 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_5: pwm0@2527015 { + compatible = "allwinner,sunxi-pwm5"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527015 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_6: pwm0@2527016 { + compatible = "allwinner,sunxi-pwm6"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527016 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_7: pwm0@2527017 { + compatible = "allwinner,sunxi-pwm7"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527017 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_8: pwm0@2527018 { + compatible = "allwinner,sunxi-pwm8"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527018 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm0_9: pwm0@2527019 { + compatible = "allwinner,sunxi-pwm9"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02527019 0x0 0x4>; + reg_base = <0x02527000>; + status = "disabled"; + }; + + pwm1: pwm@2528000 { + #pwm-cells = <0x3>; + compatible = "allwinner,sunxi-pwm-v203"; + reg = <0x0 0x02528000 0x0 0x400>; + clocks = <&ccu CLK_PWM1>; + interrupts = ; + resets = <&ccu RST_BUS_PWM1>; + pwm-number = <10>; + pwm-base = <0xa>; + sunxi-pwms = <&pwm1_0>, <&pwm1_1>, <&pwm1_2>, <&pwm1_3>, + <&pwm1_4>, <&pwm1_5>, <&pwm1_6>, <&pwm1_7>, <&pwm1_8>, <&pwm1_9>; + status = "okay"; + }; + + pwm1_0: pwm1@2528010 { + compatible = "allwinner,sunxi-pwm10"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528010 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_1: pwm1@2528011 { + compatible = "allwinner,sunxi-pwm11"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528011 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_2: pwm1@2528012 { + compatible = "allwinner,sunxi-pwm12"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528012 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_3: pwm1@2528013 { + compatible = "allwinner,sunxi-pwm13"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528013 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_4: pwm1@2528014 { + compatible = "allwinner,sunxi-pwm14"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528014 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_5: pwm1@2528015 { + compatible = "allwinner,sunxi-pwm15"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528015 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_6: pwm1@2528016 { + compatible = "allwinner,sunxi-pwm16"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528016 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_7: pwm1@2528017 { + compatible = "allwinner,sunxi-pwm17"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528017 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_8: pwm1@2528018 { + compatible = "allwinner,sunxi-pwm18"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528018 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + pwm1_9: pwm1@2528019 { + compatible = "allwinner,sunxi-pwm19"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x02528019 0x0 0x4>; + reg_base = <0x02528000>; + status = "disabled"; + }; + + s_pwm0: pwm@7023000 { + #pwm-cells = <0x3>; + compatible = "allwinner,sunxi-pwm-v204"; + reg = <0x0 0x07023000 0x0 0x400>; + clocks = <&r_ccu CLK_R_PWM>,<&r_ccu CLK_R_BUS_PWM>; + interrupts = ; + clock-names = "clk_pwm","clk_bus_pwm"; + resets = <&r_ccu RST_BUS_R_PWM>; + pwm-number = <10>; + pwm-base = <0x14>; + sunxi-pwms = <&s_pwm0_0>, <&s_pwm0_1>, <&s_pwm0_2>, <&s_pwm0_3>, + <&s_pwm0_4>, <&s_pwm0_5>, <&s_pwm0_6>, <&s_pwm0_7>, <&s_pwm0_8>, <&s_pwm0_9>; + status = "okay"; + }; + + s_pwm0_0: s_pwm0@7023010 { + compatible = "allwinner,sunxi-pwm20"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023010 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_1: s_pwm0@7023011 { + compatible = "allwinner,sunxi-pwm21"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023011 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_2: s_pwm0@7023012 { + compatible = "allwinner,sunxi-pwm22"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023012 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_3: s_pwm0@7023013 { + compatible = "allwinner,sunxi-pwm23"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023013 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_4: s_pwm0@7023014 { + compatible = "allwinner,sunxi-pwm24"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023014 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_5: s_pwm0@7023015 { + compatible = "allwinner,sunxi-pwm25"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023015 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_6: s_pwm0@7023016 { + compatible = "allwinner,sunxi-pwm26"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023016 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_7: s_pwm0@7023017 { + compatible = "allwinner,sunxi-pwm27"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023017 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_8: s_pwm0@7023018 { + compatible = "allwinner,sunxi-pwm28"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023018 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + s_pwm0_9: s_pwm0@7023019 { + compatible = "allwinner,sunxi-pwm29"; + pinctrl-names = "active", "sleep"; + reg = <0x0 0x07023019 0x0 0x4>; + reg_base = <0x07023000>; + status = "disabled"; + }; + + lradc: lradc@2524000 { + compatible = "allwinner,keyboard_1350mv"; + reg = <0x0 0x02524000 0x0 0x100>; + interrupts = ; + clocks = <&ccu CLK_LRADC>; + resets = <&ccu RST_BUS_LRADC>; + status = "okay"; + }; + + gpadc0: gpadc@2521000 { + compatible = "allwinner,sunxi-gpadc-v101"; + reg = <0x0 0x02521000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_GPADC0>, <&ccu CLK_GPADC0_24M>; + clock-names = "bus", "hosc"; + resets = <&ccu RST_BUS_GPADC0>; + status = "disabled"; + }; + + irrx: irrx@2526000 { + compatible = "allwinner,irrx"; + reg = <0x0 0x02526000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_IRRX_GATE>, <&sys24M>, <&ccu CLK_IRRX>; + clock-names = "bus", "pclk", "mclk"; + resets = <&ccu RST_BUS_IRRX>; + status = "disabled"; + }; + + s_irrx: irrx@7040000 { + compatible = "allwinner,irrx"; + reg = <0x0 0x07040000 0x0 0x400>; + interrupts = ; + clocks = <&r_ccu CLK_R_BUS_IRRX>, <&ccu CLK_PLL_REF>, <&r_ccu CLK_R_IRRX>; + clock-names = "bus", "pclk", "mclk"; + resets = <&r_ccu RST_BUS_R_IRRX>; + status = "disabled"; + }; + + irtx: irtx@2525000 { + compatible = "allwinner,irtx"; + reg = <0x0 0x02525000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_IRTX_GATE>, <&sys24M>, <&ccu CLK_IRTX>; + clock-names = "bus", "pclk", "mclk"; + resets = <&ccu RST_BUS_IRTX>; + status = "disabled"; + }; + + ledc: ledc@2520000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-leds"; + reg = <0x0 0x02520000 0x0 0x400>; + interrupts = ; + clocks = <&ccu CLK_LEDC>, <&ccu CLK_BUS_LEDC>; + clock-names = "clk_ledc", "clk_cpuapb"; + resets = <&ccu RST_BUS_LEDC>; + reset-names = "ledc_reset"; + dmas = <&dma 46>; + dma-names = "tx"; + status = "disabled"; + }; + + npu: npu@3600000 { + compatible = "allwinner,npu"; + reg = <0x0 0x03600000 0x0 0x1000>; + device_type = "npu"; + dev_name = "npu"; + interrupts = ; + interrupt-names = "npu"; + clocks = <&ccu CLK_NPU>, <&ccu CLK_PLL_NPU>, <&ccu CLK_BUS_NPU>, <&ccu CLK_MBUS_NPU_GATE>, <&ccu CLK_NPU_AHB_GATE>; + clock-names = "clk_npu", "clk_parent", "clk_bus", "clk_mbus_gate", "clk_ahb_gate"; + operating-points-v2 = <&npu_opp_table>; + resets = <&ccu RST_BUS_NPU_CORE>, <&ccu RST_BUS_NPU_AXI>, <&ccu RST_BUS_NPU_AHB>; + reset-names = "npu_rst", "npu_axi_rst", "npu_ahb_rst"; + power-domains = <&pd SUN60IW2_PCK_NPU>; + npu-vf = <1008>; + status = "disable"; + }; + + hwspinlock: hwspinlock@3005000 { + compatible = "allwinner,sunxi-hwspinlock"; + reg = <0x0 0x3005000 0x0 0x1000>; + #hwlock-cells = <1>; + clocks = <&ccu CLK_SPINLOCK>; + clock-names = "clk_hwspinlock_bus"; + resets = <&ccu RST_BUS_SPINLOCK>; + reset-names = "rst"; + num-locks = <32>; + status = "disabled"; + }; + + /* + * channel0~3 : arm -> cpus + */ + msgbox: msgbox@3004000 { + compatible = "allwinner,sun60iw2-msgbox"; + #mbox-cells = <1>; + reg = <0x0 0x03004000 0x0 0x1000>, + <0x0 0x07094000 0x0 0x1000>; + interrupts = , + ; + clocks = <&ccu CLK_MSGBOX0>; + clock-names = "msgbox"; + resets = <&ccu RST_BUS_MSGBOX0>; + reset-names = "rst"; + local_id = <0>; + status = "disabled"; + }; + + a55_rproc: a55_rproc@0 { + compatible = "allwinner,arm64-rproc"; + status = "disabled"; + }; + + cryptoengine: ce@4603000 { + compatible = "allwinner,sunxi-ce"; + device_name = "ce"; + reg = <0x0 0x04603000 0x0 0xa0>, /* non-secure space */ + <0x0 0x04603800 0x0 0xa0>; /* secure space */ + interrupts = , /*non-secure*/ + ; /* secure*/ + clock-frequency = <400000000>; /* 400MHz */ + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_MBUS_CE>, + <&ccu CLK_PLL_PERI0_400M>, <&ccu CLK_CE_SYS>; + clock-names = "bus_ce", "ce_clk", "mbus_ce", "clk_src", "ce_sys_clk"; + resets = <&ccu RST_BUS_CE>; + status = "okay"; + }; + + usbc0: usbc0@10 { + device_type = "usbc0"; + compatible = "allwinner,sunxi-otg-manager"; + reg = <0x0 0x10 0x0 0x1000>; + usb_port_type = <2>; + usb_detect_type = <1>; + usb_detect_mode = <0>; + usb_id_gpio; + usb_det_vbus_gpio; + usb_regulator_io = "nocare"; + usb_wakeup_suspend = <0>; + usb_luns = <3>; + usb_serial_unique = <0>; + usb_serial_number = "20080411"; + rndis_wceis = <1>; + status = "disabled"; + }; + + udc:udc-controller@4100000 { + compatible = "allwinner,sunxi-udc"; + reg = <0x0 0x04100000 0x0 0x1000>, /* udc base */ + <0x0 0x00000000 0x0 0x100>; /* sram base */ + interrupts = ; + clocks = <&ccu CLK_USB_REF>, <&ccu CLK_USB0_DEVICE>, <&ccu CLK_RES_DCAP_24M>, + <&ccu CLK_USB_SYS_AHB_GATE>, <&ccu CLK_MSI_LITE2>; + clock-names = "hosc", "bus_otg", "res_dcap", "usb_sys_ahb", "msi_lite"; + resets = <&ccu RST_USB_0_DEVICE>, <&ccu RST_USB_0_PHY_RSTN>; + reset-names = "otg", "phy"; + aw,dma_addr_extend; + aw,dma_wordaddr_bypass = <0x1>; + status = "disabled"; + }; + + ehci0:ehci0-controller@4101000 { + compatible = "allwinner,sunxi-ehci0"; + reg = <0x0 0x04101000 0x0 0xFFF>, /*hci0 base*/ + <0x0 0x00000000 0x0 0x100>, /*sram base*/ + <0x0 0x04100000 0x0 0x1000>; /*otg base*/ + interrupts = ; + clocks = <&ccu CLK_USB_REF>, <&ccu CLK_USB0_EHCI>, <&ccu CLK_RES_DCAP_24M>, + <&ccu CLK_USB_SYS_AHB_GATE>, <&ccu CLK_MSI_LITE2>; + clock-names = "hosc", "bus_hci", "res_dcap", "usb_sys_ahb", "msi_lite"; + resets = <&ccu RST_USB_0_EHCI>, <&ccu RST_USB_0_PHY_RSTN>; + reset-names = "hci", "phy"; + hci_ctrl_no = <0>; + status = "disabled"; + }; + + ohci0:ohci0-controller@4101400 { + compatible = "allwinner,sunxi-ohci0"; + reg = <0x0 0x04101400 0x0 0xFFF>, /*hci0 base*/ + <0x0 0x00000000 0x0 0x100>, /*sram base*/ + <0x0 0x04100000 0x0 0x1000>; /*otg base*/ + interrupts = ; + clocks = <&ccu CLK_USB_REF>, <&ccu CLK_USB0_OHCI>, <&ccu CLK_USB>, <&ccu CLK_RES_DCAP_24M>, + <&ccu CLK_USB_SYS_AHB_GATE>, <&ccu CLK_MSI_LITE2>; + clock-names = "hosc", "bus_hci", "ohci", "res_dcap", "usb_sys_ahb", "msi_lite"; + resets = <&ccu RST_USB_0_OHCI>, <&ccu RST_USB_0_PHY_RSTN>; + reset-names = "hci", "phy"; + hci_ctrl_no = <0>; + status = "disabled"; + }; + + usbc1: usbc1@11 { + device_type = "usbc1"; + reg = <0x0 0x11 0x0 0x1000>; + usb_regulator_io = "nocare"; + usb_wakeup_suspend = <0>; + status = "disabled"; + }; + + ehci1: ehci1-controller@4200000 { + compatible = "allwinner,sunxi-ehci1"; + reg = <0x0 0x04200000 0x0 0xFFF>, /*ehci1 base*/ + <0x0 0x00000000 0x0 0x100>, /*sram base*/ + <0x0 0x04100000 0x0 0x1000>; /*otg base*/ + interrupts = ; + clocks = <&ccu CLK_USB_REF>, <&ccu CLK_USB1_EHCI>, <&ccu CLK_RES_DCAP_24M>, + <&ccu CLK_USB_SYS_AHB_GATE>, <&ccu CLK_MSI_LITE2>; + clock-names = "hosc", "bus_hci", "res_dcap", "usb_sys_ahb", "msi_lite"; + resets = <&ccu RST_USB_1_EHCI>, <&ccu RST_USB_1_PHY_RSTN>; + reset-names = "hci", "phy"; + hci_ctrl_no = <1>; + status = "disabled"; + }; + + ohci1: ohci1-controller@4200400 { + compatible = "allwinner,sunxi-ohci1"; + reg = <0x0 0x04200400 0x0 0xFFF>, /*ohci1 base*/ + <0x0 0x00000000 0x0 0x100>, /*sram base*/ + <0x0 0x04100000 0x0 0x1000>; /*otg base*/ + interrupts = ; + clocks = <&ccu CLK_USB_REF>, <&ccu CLK_USB1_OHCI>, <&ccu CLK_USB1>, <&ccu CLK_RES_DCAP_24M>, + <&ccu CLK_USB_SYS_AHB_GATE>, <&ccu CLK_MSI_LITE2>; + clock-names = "hosc", "bus_hci", "ohci", "res_dcap", "usb_sys_ahb", "msi_lite"; + resets = <&ccu RST_USB_1_OHCI>, <&ccu RST_USB_1_PHY_RSTN>; + reset-names = "hci", "phy"; + hci_ctrl_no = <1>; + status = "disabled"; + }; + + usbc2:usbc2@12 { + device_type = "usbc2"; + compatible = "allwinner,sunxi-plat-dwc3"; + reg = <0x0 0x12 0x0 0x1000>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + aw,inv-sync-hdr-quirk; + status = "disabled"; + + xhci2: xhci2-controller@6a00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x06a00000 0x0 0x100000>; + interrupts = ; + dr_mode = "otg"; // dr_mode option: host, peripheral, otg + clocks = <&ccu CLK_USB2_MF>, <&ccu CLK_USB2_U2_REF>, <&ccu CLK_USB2_SUSPEND>; + clock-names = "bus_clk", "ref_clk", "suspend"; + assigned-clocks = <&ccu CLK_USB2_SUSPEND>; + assigned-clock-rates = <24000000>; + resets = <&ccu RST_USB_2>; + reset-names = "hci"; + power-domains = <&pd SUN60IW2_PCK_USB2>; + maximum-speed = "super-speed-plus"; + phy_type = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis_u3_susphy_quirk; + snps,dis_u2_susphy_quirk; + phys = <&u2phy>, <&combo0_usb>; + phy-names = "usb2-phy", "usb3-phy"; + status = "disabled"; + }; + }; + + u2phy: phy@6b00000 { + compatible = "allwinner,sunxi-plat-phy"; + reg = <0x0 0x06b00000 0x0 0x800>, /* Application Registers */ + <0x0 0x03000000 0x0 0x300>; /* SYSCFG Registers */ + reg-names = "u2_base", "res_base"; + clocks = <&ccu CLK_RES_DCAP_24M>; + clock-names = "res_dcap"; + aw,rext_mode = <2>; + aw,phy_tune_param = <0x143338D6>; + #phy-cells = <0>; + status = "disabled"; + }; + + vind0: vind@5800800 { + compatible = "allwinner,sunxi-vin-media", "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + device_id = <0>; + csi_top = <600000000>; + csi_isp = <540000000>; + reg = <0x0 0x05800800 0x0 0x200>, + <0x0 0x05800000 0x0 0x800>, + <0x0 0x05810000 0x0 0x100>; + interrupts = ; + clocks = <&ccu CLK_CSI>, <&ccu CLK_PLL_VIDEO0_4X>, + <&ccu CLK_CSI_MASTER0>, <&sys24M>, <&ccu CLK_PLL_VIDEO0_3X>, + <&ccu CLK_CSI_MASTER1>, <&sys24M>, <&ccu CLK_PLL_VIDEO0_3X>, + <&ccu CLK_CSI_MASTER2>, <&sys24M>, <&ccu CLK_PLL_VIDEO0_3X>, + <&ccu CLK_ISP>, <&ccu CLK_PLL_VIDEO0_4X>, + <&ccu CLK_BUS_CSI>, <&ccu CLK_CSI_MBUS>, <&ccu CLK_ISP_MBUS>; + clock-names = "csi_top", "csi_top_src", + "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", + "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", + "csi_mclk2", "csi_mclk2_24m", "csi_mclk2_pll", + "csi_isp", "csi_isp_src", + "csi_bus", "csi_mbus", "csi_isp_mbus"; + resets = <&ccu RST_BUS_CSI>, <>; + reset-names = "csi_ret", "isp_ret"; + pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep", + "mclk2-default", "mclk2-sleep"; + pinctrl-0 = <&csi_mclk0_pins_a>; + pinctrl-1 = <&csi_mclk0_pins_b>; + pinctrl-2 = <&csi_mclk1_pins_a>; + pinctrl-3 = <&csi_mclk1_pins_b>; + pinctrl-4 = <&csi_mclk2_pins_a>; + pinctrl-5 = <&csi_mclk2_pins_b>; + power-domains = <&pd SUN60IW2_PCK_VI>; + status = "okay"; + + csi0: csi@5820000 { + compatible = "allwinner,sunxi-csi"; + reg = <0x0 0x05820000 0x0 0x1000>; + interrupts = ; + device_id = <0>; + status = "okay"; + }; + csi1: csi@5821000 { + compatible = "allwinner,sunxi-csi"; + reg = <0x0 0x05821000 0x0 0x1000>; + interrupts = ; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&ncsi0_8bit_pins_a>; + pinctrl-1 = <&ncsi0_8bit_pins_b>; + device_id = <1>; + status = "disabled"; + }; + csi2: csi@5822000 { + compatible = "allwinner,sunxi-csi"; + reg = <0x0 0x05822000 0x0 0x1000>; + interrupts = ; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&ncsi1_8bit_pins_a>; + pinctrl-1 = <&ncsi1_8bit_pins_b>; + device_id = <2>; + status = "disabled"; + }; + mipi0: mipi@5810100 { + compatible = "allwinner,sunxi-mipi"; + reg = <0x0 0x05810100 0x0 0x100>, + <0x0 0x05811000 0x0 0x400>; + interrupts = ; + pinctrl-names = "mipi0-default","mipi0-sleep"; + pinctrl-0 = <&mipia_pins_a>; + pinctrl-1 = <&mipia_pins_b>; + device_id = <0>; + status = "okay"; + }; + mipi1: mipi@5810200 { + compatible = "allwinner,sunxi-mipi"; + reg = <0x0 0x05810200 0x0 0x100>, + <0x0 0x05811400 0x0 0x400>; + pinctrl-names = "mipi1-default","mipi1-sleep"; + pinctrl-0 = <&mipib_pins_a>; + pinctrl-1 = <&mipib_pins_b>; + device_id = <1>; + status = "okay"; + }; + mipi2: mipi@5810300 { + compatible = "allwinner,sunxi-mipi"; + reg = <0x0 0x05810300 0x0 0x100>, + <0x0 0x05811800 0x0 0x400>; + pinctrl-names = "mipi2-default","mipi2-sleep"; + pinctrl-0 = <&mipic_pins_a>; + pinctrl-1 = <&mipic_pins_b>; + device_id = <2>; + status = "okay"; + }; + tdm0: tdm@5908000 { + compatible = "allwinner,sunxi-tdm"; + reg = <0x0 0x05908000 0x0 0x400>; + interrupts = ; + work_mode = <0x0>; + device_id = <0>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + isp00:isp@5900000 { + compatible = "allwinner,sunxi-isp"; + reg = <0x0 0x05900000 0x0 0x1300>; + interrupts = ; + work_mode = <0x0>; + device_id = <0>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + isp01:isp@58ffffc { + compatible = "allwinner,sunxi-isp"; + reg = <0x0 0x058ffffc 0x0 0x1304>; + interrupts = ; + work_mode = <0xff>; + device_id = <1>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + isp02:isp@58ffff8 { + compatible = "allwinner,sunxi-isp"; + reg = <0x0 0x058ffff8 0x0 0x1308>; + interrupts = ; + work_mode = <0xff>; + device_id = <2>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + isp03:isp@58ffff4 { + compatible = "allwinner,sunxi-isp"; + reg = <0x0 0x058ffff4 0x0 0x130c>; + interrupts = ; + work_mode = <0xff>; + device_id = <3>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + isp10:isp@4 { + compatible = "allwinner,sunxi-isp"; + device_id = <4>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + isp20:isp@5 { + compatible = "allwinner,sunxi-isp"; + device_id = <5>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + isp30:isp@6 { + compatible = "allwinner,sunxi-isp"; + device_id = <6>; + iommus = <&mmu_aw 2 0>; + status = "okay"; + }; + scaler00:scaler@5910000 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x05910000 0x0 0x400>; + interrupts = ; + work_mode = <0x0>; + device_id = <0>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler01:scaler@590fffc { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x0590fffc 0x0 0x404>; + work_mode = <0xff>; + device_id = <1>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler02:scaler@590fff8 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x0590fff8 0x0 0x408>; + work_mode = <0xff>; + device_id = <2>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler03:scaler@590fff4 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x0590fff4 0x0 0x40c>; + work_mode = <0xff>; + device_id = <3>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler10:scaler@5910400 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x05910400 0x0 0x400>; + interrupts = ; + work_mode = <0x0>; + device_id = <4>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler11:scaler@59103fc { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x059103fc 0x0 0x404>; + work_mode = <0xff>; + device_id = <5>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler12:scaler@59103f8 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x059103f8 0x0 0x408>; + work_mode = <0xff>; + device_id = <6>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler13:scaler@59103f4 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x059103f4 0x0 0x40c>; + work_mode = <0xff>; + device_id = <7>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler20:scaler@5910800 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x05910800 0x0 0x400>; + interrupts = ; + work_mode = <0x0>; + device_id = <8>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler21:scaler@59107fc { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x059107fc 0x0 0x404>; + work_mode = <0xff>; + device_id = <9>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler22:scaler@59107f8 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x059107f8 0x0 0x408>; + work_mode = <0xff>; + device_id = <10>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler23:scaler@59107f4 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x059107f4 0x0 0x40c>; + work_mode = <0xff>; + device_id = <11>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler30:scaler@5910c00 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x05910c00 0x0 0x400>; + interrupts = ; + work_mode = <0x0>; + device_id = <12>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler31:scaler@5910bfc { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x05910bfc 0x0 0x404>; + work_mode = <0xff>; + device_id = <13>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler32:scaler@5910bf8 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x05910bf8 0x0 0x408>; + work_mode = <0xff>; + device_id = <14>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler33:scaler@5910bf4 { + compatible = "allwinner,sunxi-scaler"; + reg = <0x0 0x05910bf4 0x0 0x40c>; + work_mode = <0xff>; + device_id = <15>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler40:scaler@16 { + compatible = "allwinner,sunxi-scaler"; + device_id = <16>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + scaler50:scaler@17 { + compatible = "allwinner,sunxi-scaler"; + device_id = <17>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + actuator0: actuator@2108180 { + compatible = "allwinner,sunxi-actuator"; + device_type = "actuator0"; + reg = <0x0 0x02108180 0x0 0x10>; + actuator0_name = "ad5820_act"; + actuator0_slave = <0x18>; + actuator0_af_pwdn = <>; + actuator0_afvdd = "afvcc-csi"; + actuator0_afvdd_vol = <2800000>; + status = "disabled"; + }; + flash0: flash@2108190 { + device_type = "flash0"; + compatible = "allwinner,sunxi-flash"; + reg = <0x0 0x02108190 0x0 0x10>; + flash0_type = <2>; + flash0_en = <>; + flash0_mode = <>; + flash0_flvdd = ""; + flash0_flvdd_vol = <>; + device_id = <0>; + status = "disabled"; + }; + sensor0: sensor@5812000 { + reg = <0x0 0x05812000 0x0 0x10>; + device_type = "sensor0"; + compatible = "allwinner,sunxi-sensor"; + sensor0_mname = "ov5640"; + sensor0_twi_cci_id = <2>; + sensor0_twi_addr = <0x78>; + sensor0_mclk_id = <0>; + sensor0_pos = "rear"; + sensor0_isp_used = <0>; + sensor0_fmt = <0>; + sensor0_stby_mode = <0>; + sensor0_vflip = <0>; + sensor0_hflip = <0>; + sensor0_iovdd-supply = <>; + sensor0_iovdd_vol = <>; + sensor0_avdd-supply = <>; + sensor0_avdd_vol = <>; + sensor0_dvdd-supply = <>; + sensor0_dvdd_vol = <>; + sensor0_power_en = <>; + sensor0_reset = <>; + sensor0_pwdn = <>; + sensor0_sm_vs = <>; + flash_handle = <&flash0>; + act_handle = <&actuator0>; + device_id = <0>; + status = "disabled"; + }; + sensor1: sensor@5812010 { + reg = <0x0 0x05812010 0x0 0x10>; + device_type = "sensor1"; + compatible = "allwinner,sunxi-sensor"; + sensor1_mname = "ov5647"; + sensor1_twi_cci_id = <3>; + sensor1_twi_addr = <0x6c>; + sensor1_mclk_id = <1>; + sensor1_pos = "front"; + sensor1_isp_used = <0>; + sensor1_fmt = <0>; + sensor1_stby_mode = <0>; + sensor1_vflip = <0>; + sensor1_hflip = <0>; + sensor1_iovdd-supply = <>; + sensor1_iovdd_vol = <>; + sensor1_avdd-supply = <>; + sensor1_avdd_vol = <>; + sensor1_dvdd-supply = <>; + sensor1_dvdd_vol = <>; + sensor1_power_en = <>; + sensor1_reset = <>; + sensor1_pwdn = <>; + sensor1_sm_vs = <>; + flash_handle = <>; + act_handle = <>; + device_id = <1>; + status = "disabled"; + }; + sensor2: sensor@5812020 { + reg = <0x0 0x05812020 0x0 0x10>; + device_type = "sensor2"; + compatible = "allwinner,sunxi-sensor"; + sensor2_mname = "imx386_mipi"; + sensor2_twi_cci_id = <3>; + sensor2_twi_addr = <0x6c>; + sensor2_mclk_id = <1>; + sensor2_pos = "rear"; + sensor2_isp_used = <0>; + sensor2_fmt = <0>; + sensor2_stby_mode = <0>; + sensor2_vflip = <0>; + sensor2_hflip = <0>; + sensor2_iovdd-supply = <>; + sensor2_iovdd_vol = <>; + sensor2_avdd-supply = <>; + sensor2_avdd_vol = <>; + sensor2_dvdd-supply = <>; + sensor2_dvdd_vol = <>; + sensor2_power_en = <>; + sensor2_reset = <>; + sensor2_pwdn = <>; + sensor2_sm_vs = <>; + flash_handle = <>; + act_handle = <>; + device_id = <2>; + status = "disabled"; + }; + sensor_list0:sensor_list@5812040 { + reg = <0x0 0x05812040 0x0 0x10>; + device_type = "sensor_list0"; + compatible = "allwinner,sunxi-sensor-list"; + csi_sel = <0>; + sensor00_mname = "ov5675_mipi_b"; + sensor00_twi_addr = <0x60>; + sensor00_type = <1>; + sensor00_hflip = <1>; + sensor00_vflip = <0>; + sensor00_act_used = <1>; + sensor00_act_name = "dw9714_act"; + sensor00_act_twi_addr = <0x18>; + sensor01_mname = "gc05a2_mipi_b"; + sensor01_twi_addr = <0x62>; + sensor01_type = <1>; + sensor01_hflip = <0>; + sensor01_vflip = <0>; + sensor01_act_used = <1>; + sensor01_act_name = "dw9714_act"; + sensor01_act_twi_addr = <0x18>; + sensor02_mname = "gc5035_mipi_b"; + sensor02_twi_addr = <0x64>; + sensor02_type = <1>; + sensor02_hflip = <0>; + sensor02_vflip = <0>; + sensor02_act_used = <1>; + sensor02_act_name = "dw9714_act"; + sensor02_act_twi_addr = <0x18>; + device_id = <0>; + status = "disabled"; + }; + sensor_list1:sensor_list@5812050 { + reg = <0x0 0x05812050 0x0 0x10>; + device_type = "sensor_list1"; + compatible = "allwinner,sunxi-sensor-list"; + csi_sel = <0>; + sensor10_mname = "ov02a10_mipi_f"; + sensor10_twi_addr = <0x70>; + sensor10_type = <1>; + sensor10_hflip = <1>; + sensor10_vflip = <0>; + sensor10_act_used = <0>; + sensor10_act_name = ""; + sensor10_act_twi_addr = <>; + sensor11_mname = "gc02m1_mipi_f"; + sensor11_twi_addr = <0x72>; + sensor11_type = <1>; + sensor11_hflip = <1>; + sensor11_vflip = <0>; + sensor11_act_used = <0>; + sensor11_act_name = ""; + sensor11_act_twi_addr = <>; + sensor12_mname = "gc02m2_mipi_f"; + sensor12_twi_addr = <0x74>; + sensor12_type = <1>; + sensor12_hflip = <0>; + sensor12_vflip = <0>; + sensor12_act_used = <0>; + sensor12_act_name = ""; + sensor12_act_twi_addr = <>; + device_id = <1>; + status = "disabled"; + }; + vinc00:vinc@5830000 { + device_type = "vinc0"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05830000 0x0 0x1000>; + interrupts = ; + vinc0_csi_sel = <1>; + vinc0_mipi_sel = <0xff>; + vinc0_isp_sel = <0>; + vinc0_isp_tx_ch = <0>; + vinc0_tdm_rx_sel = <0>; + vinc0_rear_sensor_sel = <0>; + vinc0_front_sensor_sel = <0>; + vinc0_sensor_list = <0>; + device_id = <0>; + work_mode = <0x0>; + iommus = <&mmu_aw 1 0>; + status = "okay"; + }; + vinc01:vinc@582fffc { + device_type = "vinc1"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x0582fffc 0x0 0x1004>; + vinc1_csi_sel = <1>; + vinc1_mipi_sel = <0xff>; + vinc1_isp_sel = <1>; + vinc1_isp_tx_ch = <0>; + vinc1_tdm_rx_sel = <1>; + vinc1_rear_sensor_sel = <0>; + vinc1_front_sensor_sel = <0>; + vinc1_sensor_list = <0>; + device_id = <1>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + + vinc02:vinc@582fff8 { + device_type = "vinc2"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x0582fff8 0x0 0x1008>; + vinc2_csi_sel = <2>; + vinc2_mipi_sel = <0xff>; + vinc2_isp_sel = <2>; + vinc2_isp_tx_ch = <2>; + vinc2_tdm_rx_sel = <2>; + vinc2_rear_sensor_sel = <0>; + vinc2_front_sensor_sel = <0>; + vinc2_sensor_list = <0>; + device_id = <2>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc03:vinc@582fff4 { + device_type = "vinc3"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x0582fff4 0x0 0x100c>; + vinc3_csi_sel = <0>; + vinc3_mipi_sel = <0xff>; + vinc3_isp_sel = <0>; + vinc3_isp_tx_ch = <0>; + vinc3_tdm_rx_sel = <0>; + vinc3_rear_sensor_sel = <1>; + vinc3_front_sensor_sel = <1>; + vinc3_sensor_list = <0>; + device_id = <3>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc10:vinc@5831000 { + device_type = "vinc4"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05831000 0x0 0x1000>; + interrupts = ; + vinc4_csi_sel = <1>; + vinc4_mipi_sel = <0xff>; + vinc4_isp_sel = <0>; + vinc4_isp_tx_ch = <0>; + vinc4_tdm_rx_sel = <0>; + vinc4_rear_sensor_sel = <0>; + vinc4_front_sensor_sel = <0>; + vinc4_sensor_list = <0>; + device_id = <4>; + work_mode = <0x0>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc11:vinc@5830ffc { + device_type = "vinc5"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05830ffc 0x0 0x1004>; + vinc5_csi_sel = <2>; + vinc5_mipi_sel = <0xff>; + vinc5_isp_sel = <1>; + vinc5_isp_tx_ch = <1>; + vinc5_tdm_rx_sel = <1>; + vinc5_rear_sensor_sel = <0>; + vinc5_front_sensor_sel = <0>; + vinc5_sensor_list = <0>; + device_id = <5>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc12:vinc@5830ff8 { + device_type = "vinc6"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05830ff8 0x0 0x1008>; + vinc6_csi_sel = <2>; + vinc6_mipi_sel = <0xff>; + vinc6_isp_sel = <0>; + vinc6_isp_tx_ch = <0>; + vinc6_tdm_rx_sel = <0>; + vinc6_rear_sensor_sel = <0>; + vinc6_front_sensor_sel = <0>; + vinc6_sensor_list = <0>; + device_id = <6>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc13:vinc@5830ff4 { + device_type = "vinc7"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05830ff4 0x0 0x100c>; + vinc7_csi_sel = <2>; + vinc7_mipi_sel = <0xff>; + vinc7_isp_sel = <0>; + vinc7_isp_tx_ch = <0>; + vinc7_tdm_rx_sel = <0>; + vinc7_rear_sensor_sel = <0>; + vinc7_front_sensor_sel = <0>; + vinc7_sensor_list = <0>; + device_id = <7>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc20:vinc@5832000 { + device_type = "vinc8"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05832000 0x0 0x1000>; + interrupts = ; + vinc8_csi_sel = <2>; + vinc8_mipi_sel = <0xff>; + vinc8_isp_sel = <4>; + vinc8_isp_tx_ch = <3>; + vinc8_tdm_rx_sel = <3>; + vinc8_rear_sensor_sel = <0>; + vinc8_front_sensor_sel = <0>; + vinc8_sensor_list = <0>; + device_id = <8>; + work_mode = <0x0>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc21:vinc@5831ffc { + device_type = "vinc9"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05831ffc 0x0 0x1004>; + vinc9_csi_sel = <2>; + vinc9_mipi_sel = <0xff>; + vinc9_isp_sel = <0>; + vinc9_isp_tx_ch = <0>; + vinc9_tdm_rx_sel = <0>; + vinc9_rear_sensor_sel = <0>; + vinc9_front_sensor_sel = <0>; + vinc9_sensor_list = <0>; + device_id = <9>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc22:vinc@5831ff8 { + device_type = "vinc10"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05831ff8 0x0 0x1008>; + vinc10_csi_sel = <2>; + vinc10_mipi_sel = <0xff>; + vinc10_isp_sel = <0>; + vinc10_isp_tx_ch = <0>; + vinc10_tdm_rx_sel = <0>; + vinc10_rear_sensor_sel = <0>; + vinc10_front_sensor_sel = <0>; + vinc10_sensor_list = <0>; + device_id = <10>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc23:vinc@5831ff4 { + device_type = "vinc11"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05831ff4 0x0 0x100c>; + vinc11_csi_sel = <2>; + vinc11_mipi_sel = <0xff>; + vinc11_isp_sel = <0>; + vinc11_isp_tx_ch = <0>; + vinc11_tdm_rx_sel = <0>; + vinc11_rear_sensor_sel = <0>; + vinc11_front_sensor_sel = <0>; + vinc11_sensor_list = <0>; + device_id = <11>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc30:vinc@5833000 { + device_type = "vinc12"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05833000 0x0 0x1000>; + interrupts = ; + vinc12_csi_sel = <2>; + vinc12_mipi_sel = <0xff>; + vinc12_isp_sel = <0>; + vinc12_isp_tx_ch = <0>; + vinc12_tdm_rx_sel = <0>; + vinc12_rear_sensor_sel = <0>; + vinc12_front_sensor_sel = <0>; + vinc12_sensor_list = <0>; + device_id = <12>; + work_mode = <0x0>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc31:vinc@5832ffc { + device_type = "vinc13"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05832ffc 0x0 0x1004>; + vinc13_csi_sel = <2>; + vinc13_mipi_sel = <0xff>; + vinc13_isp_sel = <0>; + vinc13_isp_tx_ch = <0>; + vinc13_tdm_rx_sel = <0>; + vinc13_rear_sensor_sel = <0>; + vinc13_front_sensor_sel = <0>; + vinc13_sensor_list = <0>; + device_id = <13>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc32:vinc@5832ff8 { + device_type = "vinc14"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05832ff8 0x0 0x1008>; + vinc14_csi_sel = <2>; + vinc14_mipi_sel = <0xff>; + vinc14_isp_sel = <0>; + vinc14_isp_tx_ch = <0>; + vinc14_tdm_rx_sel = <0>; + vinc14_rear_sensor_sel = <0>; + vinc14_front_sensor_sel = <0>; + vinc14_sensor_list = <0>; + device_id = <14>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc33:vinc@5832ff4 { + device_type = "vinc15"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05832ff4 0x0 0x100c>; + vinc15_csi_sel = <2>; + vinc15_mipi_sel = <0xff>; + vinc15_isp_sel = <0>; + vinc15_isp_tx_ch = <0>; + vinc15_tdm_rx_sel = <0>; + vinc15_rear_sensor_sel = <0>; + vinc15_front_sensor_sel = <0>; + vinc15_sensor_list = <0>; + device_id = <15>; + work_mode = <0xff>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc40:vinc@5834000 { + device_type = "vinc16"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05834000 0x0 0x1000>; + interrupts = ; + vinc16_csi_sel = <2>; + vinc16_mipi_sel = <0xff>; + vinc16_isp_sel = <0>; + vinc16_isp_tx_ch = <0>; + vinc16_tdm_rx_sel = <0>; + vinc16_rear_sensor_sel = <0>; + vinc16_front_sensor_sel = <0>; + vinc16_sensor_list = <0>; + device_id = <16>; + work_mode = <0x0>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + vinc50:vinc@5835000 { + device_type = "vinc17"; + compatible = "allwinner,sunxi-vin-core"; + reg = <0x0 0x05835000 0x0 0x1000>; + interrupts = ; + vinc17_csi_sel = <2>; + vinc17_mipi_sel = <0xff>; + vinc17_isp_sel = <0>; + vinc17_isp_tx_ch = <0>; + vinc17_tdm_rx_sel = <0>; + vinc17_rear_sensor_sel = <0>; + vinc17_front_sensor_sel = <0>; + vinc17_sensor_list = <0>; + device_id = <17>; + work_mode = <0x0>; + iommus = <&mmu_aw 1 0>; + status = "disabled"; + }; + }; + + di:deinterlace@5400000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-deinterlace"; + reg = <0x0 0x05400000 0x0 0x040000>; + interrupts = ; + iommus = <&mmu_aw 9 1>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + status = "okay"; + + clocks = <&ccu CLK_DI>, <&ccu CLK_DI_GATE>; + clock-names = "clk_di", "clk_bus_di"; + clock-frequency = <300000000>; + + resets = <&ccu RST_BUS_DI>, <&ccu RST_BUS_DE_SY>; + reset-names = "rst_bus_di", "rst_bus_desys"; + }; + + g2d: g2d@5440000 { + compatible = "allwinner,sunxi-g2d"; + reg = <0x0 0x05440000 0x0 0x30000>; + interrupts = ; + clocks = <&ccu CLK_G2D_GATE>, <&ccu CLK_G2D>, + <&ccu CLK_MBUS_DESYS_GATE>, <&ccu CLK_DE_AHB_GATE>; + clock-names = "bus", "g2d", "mbus_desys", "ahb_de"; + resets = <&ccu RST_BUS_G2D>, <&ccu RST_BUS_DE_SY>; + reset-names = "rst_bus_g2d", "rst_bus_desys"; + iommus = <&mmu_aw 10 1>; + //nsi = <&nsi0 5>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + power-domain-names = "pd_de_sys"; + assigned-clocks = <&ccu CLK_G2D>; + assigned-clock-rates = <300000000>; + }; + + pd_vi_test: pd_vi_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_VI>; + status = "okay"; + }; + + pd_ve_dec_test: pd_ve_dec_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_VE_DEC>; + status = "okay"; + }; + + pd_ve_enc_test: pd_ve_enc_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_VE_ENC>; + status = "okay"; + }; + + pd_npu_test: pd_npu_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_NPU>; + status = "okay"; + }; + + pd_gpu_top_test: pd_gpu_top_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_GPU_TOP>; + status = "okay"; + }; + + pd_gpu_core_test: pd_gpu_core_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_GPU_CORE>; + status = "okay"; + }; + + pd_pcie_test: pd_pcie_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_PCIE>; + status = "okay"; + }; + + pd_usb2_test: pd_usb2_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_USB2>; + status = "okay"; + }; + + pd_de_sys_test: pd_de_sys_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + status = "okay"; + }; + + pd_vo_test: pd_vo_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_VO>; + status = "okay"; + }; + + pd_vo1_test: pd_vo1_test@0 { + compatible = "allwinner,sunxi-power-domain-test"; + power-domains = <&pd SUN60IW2_PCK_VO1>; + status = "okay"; + }; + + gmac_stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <256 128 64 32 16 8 4>; + }; + + gmac_mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + queue0 {}; + }; + + gmac_mtl_tx_setup: tx_queues-config { + snps,tx-queues-to-use = <1>; + queue0 {}; + }; + + gmac0: ethernet@4500000 { + compatible = "allwinner,sunxi-gmac-210", "snps,dwmac-5.20"; + reg = <0x0 0x04500000 0x0 0x8000>, <0x0 0x04508000 0x0 0x1000>; + interrupts = , , + , ; + interrupt-names = "macirq", "eth_lpi", "tx0_irq", "rx0_irq"; + clocks = <&ccu CLK_GMAC0>, <&ccu CLK_GMAC0_MBUS>, <&ccu CLK_GMAC0_PHY>, <&ccu CLK_GMAC_PTP>; + clock-names = "stmmaceth", "pclk", "phy", "ptp_ref"; + assigned-clocks = <&ccu CLK_GMAC0_PHY>; + assigned-clock-rates = <25000000>; + resets = <&ccu RST_BUS_GMAC0_AXI>, <&ccu RST_BUS_GMAC0>; + reset-names = "stmmaceth", "ahb"; + phy-mode = "rgmii"; + phy-handle = <&gmac0_phy0>; + status = "disabled"; + + aw,rgmii-clk-ext; + snps,fixed-burst; + snps,en-tx-lpi-clockgating; + snps,axi-config = <&gmac_stmmac_axi_setup>; + snps,mtl-rx-config = <&gmac_mtl_rx_setup>; + snps,mtl-tx-config = <&gmac_mtl_tx_setup>; + + mdio0: mdio0@0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + gmac0_phy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + max-speed = <1000>; /* Max speed capability */ + reset-gpios = <&pio PA 14 GPIO_ACTIVE_LOW>; + /* PHY datasheet rst time */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; + }; + }; + }; + + gmac1: ethernet@4510000 { + compatible = "allwinner,sunxi-gmac-210", "snps,dwmac-5.20"; + reg = <0x0 0x04510000 0x0 0x8000>, <0x0 0x04518000 0x0 0x1000>; + interrupts = , , + , ; + interrupt-names = "macirq", "eth_lpi", "tx0_irq", "rx0_irq"; + clocks = <&ccu CLK_GMAC1>, <&ccu CLK_GMAC1_MBUS>, <&ccu CLK_GMAC1_PHY>, <&ccu CLK_GMAC_PTP>; + clock-names = "stmmaceth", "pclk", "phy25m", "ptp_ref"; + assigned-clocks = <&ccu CLK_GMAC1_PHY>; + assigned-clock-rates = <25000000>; + resets = <&ccu RST_BUS_GMAC1_AXI>, <&ccu RST_BUS_GMAC1>; + reset-names = "stmmaceth", "ahb"; + phy-mode = "rgmii"; + phy-handle = <&gmac1_phy0>; + status = "disabled"; + + aw,rgmii-clk-ext; + snps,fixed-burst; + snps,en-tx-lpi-clockgating; + snps,axi-config = <&gmac_stmmac_axi_setup>; + snps,mtl-rx-config = <&gmac_mtl_rx_setup>; + snps,mtl-tx-config = <&gmac_mtl_tx_setup>; + + mdio1: mdio1@0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + gmac1_phy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + max-speed = <1000>; /* Max speed capability */ + reset-gpios = <&pio PA 14 GPIO_ACTIVE_LOW>; + /* PHY datasheet rst time */ + reset-assert-us = <10000>; + reset-deassert-us = <150000>; + }; + }; + }; + + uio0: uio@4500000 { + compatible = "allwinner,sunxi-uio"; + reg = <0x0 0x04500000 0x0 0x10000>; + sunxi,ethernet = <&gmac0>; + status = "disabled"; + }; + + uio1: uio@4510000 { + compatible = "allwinner,sunxi-uio"; + reg = <0x0 0x04510000 0x0 0x10000>; + sunxi,ethernet = <&gmac1>; + status = "disabled"; + }; + + rfkill: rfkill { + compatible = "allwinner,sunxi-rfkill"; + status = "disabled"; + }; + + addr_mgt: addr_mgt { + compatible = "allwinner,sunxi-addr_mgt"; + status = "disabled"; + }; + + btlpm: btlpm { + compatible = "allwinner,sunxi-btlpm"; + }; + + spi0: spi@2540000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-spi-v1.3"; + device_type = "spi0"; + reg = <0x0 0x02540000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI0>, <&ccu CLK_BUS_SPI0>; + clock-names = "pll", "mod", "bus"; + clock-frequency = <100000000>; + resets = <&ccu RST_BUS_SPI0>; + dmas = <&dma 23>, <&dma 23>; + dma-names = "tx", "rx"; + sunxi,spi-num-cs = <2>; + status = "disabled"; + }; + + spi1: spi@2541000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-spi-v1.4"; + device_type = "spi1"; + reg = <0x0 0x02541000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI1>, <&ccu CLK_BUS_SPI1>; + clock-names = "pll", "mod", "bus"; + clock-frequency = <100000000>; + resets = <&ccu RST_BUS_SPI1>; + dmas = <&dma 24>, <&dma 24>; + dma-names = "tx", "rx"; + sunxi,spi-num-cs = <1>; + status = "disabled"; + }; + + spi2: spi@2542000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-spi-v1.3"; + device_type = "spi2"; + reg = <0x0 0x02542000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI2>, <&ccu CLK_BUS_SPI2>; + clock-names = "pll", "mod", "bus"; + clock-frequency = <100000000>; + resets = <&ccu RST_BUS_SPI2>; + dmas = <&dma 25>, <&dma 25>; + dma-names = "tx", "rx"; + sunxi,spi-num-cs = <1>; + status = "disabled"; + }; + + spi3: spi@2543000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-spi-v1.3"; + device_type = "spi3"; + reg = <0x0 0x02543000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI3>, <&ccu CLK_BUS_SPI3>; + clock-names = "pll", "mod", "bus"; + clock-frequency = <100000000>; + resets = <&ccu RST_BUS_SPI3>; + dmas = <&dma 26>, <&dma 26>; + dma-names = "tx", "rx"; + sunxi,spi-num-cs = <1>; + status = "disabled"; + }; + + spi4: spi@2544000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-spi-v1.3"; + device_type = "spi4"; + reg = <0x0 0x02544000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI4>, <&ccu CLK_BUS_SPI4>; + clock-names = "pll", "mod", "bus"; + clock-frequency = <100000000>; + resets = <&ccu RST_BUS_SPI4>; + dmas = <&dma 54>, <&dma 54>; + dma-names = "tx", "rx"; + sunxi,spi-num-cs = <1>; + status = "disabled"; + }; + + r_spi: spi@7092000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "allwinner,sunxi-spi-v1.3"; + device_type = "r_spi"; + reg = <0x0 0x07092000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_PLL_PERI0_300M>, <&r_ccu CLK_R_SPI>, <&r_ccu CLK_R_BUS_SPI>; + clock-names = "pll", "mod", "bus"; + clock-frequency = <100000000>; + resets = <&r_ccu RST_BUS_R_SPI>; + dmas = <&dma 53>, <&dma 53>; + dma-names = "tx", "rx"; + sunxi,spi-num-cs = <1>; + status = "disabled"; + }; + + serdes: serdes@6c00000 { + compatible = "allwinner,cadence-combophy"; + reg = <0x0 0x06c00000 0x0 0x400>, /* serdes top register part-1 */ + <0x0 0x06c06000 0x0 0x2000>, /* serdes top register part-2 */ + <0x0 0x0709016c 0x0 0x4>; /* sys-rtc */ + clocks = <&ccu CLK_SERDES_PHY_CFG>, + <&rtc_ccu CLK_RTC_DCXO_SERDES0>, + <&rtc_ccu CLK_RTC_DCXO_SERDES1>; + clock-names = "serdes-clk", + "dcxo-serdes0-clk", + "dcxo-serdes1-clk"; + resets = <&ccu RST_BUS_SERDES>; + reset-names = "serdes-reset"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + combophy0: combo-phy0@6c01000 { + reg = <0x0 0x06c01000 0x0 0xa00>, /* combophy0 top register */ + <0x0 0x06c80000 0x0 0x20000>; /* combophy0 phy register*/ + combo0_dp: combo0-dp-phy { + #phy-cells = <0>; + status = "okay"; + }; + combo0_usb: combo0-usb-phy { + #phy-cells = <0>; + status = "okay"; + }; + }; + + combophy1: combo-phy1@6c02000 { + reg = <0x0 0x06c02000 0x0 0xa00>, /* combophy1 top register */ + <0x0 0x06ca0000 0x0 0x20000>; /* combophy1 phy register*/ + combo1_usb: combo1-usb-phy { + #phy-cells = <0>; + status = "okay"; + }; + combo1_pcie: combo1-pcie-phy { + #phy-cells = <0>; + status = "okay"; + }; + }; + + aux_hpd: aux-hpd@6c01e00 { + reg = <0x0 0x06c01e00 0x0 0x200>; /* aux_hpd top register */ + aux_hpd_phy: aux-hpd-phy { + #phy-cells = <0>; + status = "okay"; + }; + }; + }; + + sunxi_drm: sunxi-drm { + compatible = "allwinner,sunxi-drm"; + fb_base = <0>; + status = "okay"; + }; + + de: de@5000000 { + compatible = "allwinner,display-engine-v352"; + iommus = <&mmu_aw 8 1>; + nsi = <&nsi0 2>; + power-domains = <&pd SUN60IW2_PCK_DE_SYS>; + reg = <0x0 0x5000000 0x0 0x400000>; + interrupts = , + ; + clocks = <&ccu CLK_DE0>, + <&ccu CLK_BUS_DE0>, + <&ccu CLK_DE_AHB_GATE>, + <&ccu CLK_MBUS_DESYS_GATE>; + clock-names = "clk_de", + "clk_bus_de", + "ahb_vid_out", + "mbus_vo_sys"; + resets = <&ccu RST_BUS_DE0>, + <&ccu RST_BUS_DE_SY>; + reset-names = "rst_bus_de", + "rst_bus_de_sys"; + assigned-clocks = <&ccu CLK_DE0>; + assigned-clock-parents = <&ccu CLK_PLL_DE_3X>; + assigned-clock-rates = <600000000>; + status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; + disp0: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + disp0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_disp0>; + }; + disp0_out_tcon1: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon1_in_disp0>; + }; + disp0_out_tcon2: endpoint@2 { + reg = <2>; + remote-endpoint = <&tcon2_in_disp0>; + }; + disp0_out_tcon3: endpoint@3 { + reg = <4>; + remote-endpoint = <&tcon3_in_disp0>; + }; + disp0_out_tcon4: endpoint@4 { + reg = <5>; + remote-endpoint = <&tcon4_in_disp0>; + }; + }; + disp1: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + disp1_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_disp1>; + }; + disp1_out_tcon1: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon1_in_disp1>; + }; + disp1_out_tcon2: endpoint@2 { + reg = <2>; + remote-endpoint = <&tcon2_in_disp1>; + }; + disp1_out_tcon3: endpoint@3 { + reg = <4>; + remote-endpoint = <&tcon3_in_disp1>; + }; + disp1_out_tcon4: endpoint@4 { + reg = <5>; + remote-endpoint = <&tcon4_in_disp1>; + }; + }; + }; + }; + + vo0: vo0@5500000 { + compatible = "allwinner,tcon-top0"; + reg = <0x0 0x05500000 0x0 0x1000>; + clocks = <&ccu CLK_DPSS_TOP0>, + <&ccu CLK_VID_OUT0_AHB_GATE>; + clock-names = "clk_bus_dpss_top", + "clk_ahb_gate"; + resets = <&ccu RST_BUS_DPSS_TOP0>, + <&ccu RST_BUS_VIDEO_OUT0>; + reset-names = "rst_bus_dpss_top", + "rst_bus_reg"; + power-domains = <&pd SUN60IW2_PCK_VO>; + status = "disabled"; + }; + + vo1: vo1@5510000 { + compatible = "allwinner,tcon-top1"; + reg = <0x0 0x05510000 0x0 0x1000>; + clocks = <&ccu CLK_DPSS_TOP1>, + <&ccu CLK_VID_OUT1_AHB_GATE>; + clock-names = "clk_bus_dpss_top", + "clk_ahb_gate"; + resets = <&ccu RST_BUS_DPSS_TOP1>, + <&ccu RST_BUS_VIDEO_OUT1>; + reset-names = "rst_bus_dpss_top", + "rst_bus_reg"; + power-domains = <&pd SUN60IW2_PCK_VO1>; + status = "disabled"; + }; + + dlcd0: tcon0@5501000 { + compatible = "allwinner,tcon-lcd"; + reg = <0x0 0x05501000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_VO0_TCONLCD0>; + clock-names = "clk_bus_tcon"; + resets = <&ccu RST_BUS_VO0_TCONLCD0>; + reset-names = "rst_bus_tcon"; + top = <&vo0>; + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + tcon0_in_disp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&disp0_out_tcon0>; + }; + tcon0_in_disp1: endpoint@1 { + reg = <1>; + remote-endpoint = <&disp1_out_tcon0>; + }; + }; + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + tcon0_out_dsi0: endpoint@0 { + reg = <0>; + remote-endpoint = <&dsi0_in_tcon0>; + }; + tcon0_out_dsi1: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi1_in_tcon0>; + }; + tcon0_out_lvds0: endpoint@2 { + reg = <2>; + remote-endpoint = <&lvds0_in_tcon0>; + }; + tcon0_out_rgb0: endpoint@3 { + reg = <3>; + remote-endpoint = <&rgb0_in_tcon0>; + }; + }; + }; + }; + + dlcd1: tcon1@5502000 { + compatible = "allwinner,tcon-lcd"; + reg = <0x0 0x05502000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_VO0_TCONLCD1>; + clock-names = "clk_bus_tcon"; + resets = <&ccu RST_BUS_VO0_TCONLCD1>; + reset-names = "rst_bus_tcon"; + top = <&vo0>; + status = "disabled"; + // TODO find panel used of_graph? + ports { + #address-cells = <1>; + #size-cells = <0>; + tcon1_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + tcon1_in_disp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&disp0_out_tcon1>; + }; + tcon1_in_disp1: endpoint@1 { + reg = <1>; + remote-endpoint = <&disp1_out_tcon1>; + }; + }; + tcon1_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + tcon1_out_dsi1: endpoint@0 { + reg = <0>; + remote-endpoint = <&dsi1_in_tcon1>; + }; + }; + }; + }; + + dlcd2: tcon2@5503000 { + compatible = "allwinner,tcon-lcd"; + reg = <0x0 0x05503000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_VO0_TCONLCD2>, + <&ccu CLK_BUS_VO0_TCONLCD2>; + clock-names = "clk_tcon", + "clk_bus_tcon"; + resets = <&ccu RST_BUS_VO0_TCONLCD2>; + reset-names = "rst_bus_tcon"; + assigned-clocks = <&ccu CLK_VO0_TCONLCD2>; + assigned-clock-parents = <&ccu CLK_PLL_VIDEO2_4X>; + top = <&vo0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + tcon2_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + tcon2_in_disp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&disp0_out_tcon2>; + }; + tcon2_in_disp1: endpoint@1 { + reg = <1>; + remote-endpoint = <&disp1_out_tcon2>; + }; + }; + tcon2_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + tcon2_out_lvds1: endpoint@0 { + reg = <0>; + remote-endpoint = <&lvds1_in_tcon2>; + }; + tcon2_out_rgb1: endpoint@1 { + reg = <1>; + remote-endpoint = <&rgb1_in_tcon2>; + }; + }; + }; + }; + + dsi0combophy: phy@5507000 { + compatible = "allwinner,sunxi-dsi-combo-phy0,sun60iw2"; + reg = <0x0 0x05507000 0x0 0x1ff>; + clocks = <&ccu CLK_BUS_DSI0>; + clock-names = "phy_gating_clk"; + resets = <&ccu RST_BUS_DSI0>; + reset-names = "phy_rst_clk"; + #clock-cells = <1>; + #phy-cells = <0>; + status = "disabled"; + }; + + dsi0: dsi0@5506000 { + compatible = "allwinner,dsi0"; + reg = <0x0 0x05506000 0x0 0xfff>; + interrupts = ; + clocks = <&ccu CLK_DSI0>, + <&ccu CLK_BUS_DSI0>, + <&dsi0combophy CLK_DSI_HS>, + <&dsi0combophy CLK_DSI_LS>; + clock-names = "dsi_clk", + "dsi_gating_clk", + "displl_hs", + "displl_ls"; + resets = <&ccu RST_BUS_DSI0>; + reset-names = "dsi_rst_clk"; + assigned-clocks = <&ccu CLK_DSI0>; + assigned-clock-parents = <&ccu CLK_PLL_PERI0_150M>; + phys = <&dsi0combophy>; + phy-names = "combophy"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + dsi0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + dsi0_in_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_out_dsi0>; + }; + }; + }; + }; + + dsi1combophy: phy@5509000 { + compatible = "allwinner,sunxi-dsi-combo-phy1,sun60iw2"; + reg = <0x0 0x05509000 0x0 0x1ff>; + clocks = <&ccu CLK_BUS_DSI1>; + clock-names = "phy_gating_clk"; + resets = <&ccu RST_BUS_DSI1>; + reset-names = "phy_rst_clk"; + #clock-cells = <1>; + #phy-cells = <0>; + status = "disabled"; + }; + + dsi1: dsi1@5508000 { + compatible = "allwinner,dsi1"; + reg = <0x0 0x05508000 0x0 0xfff>; + interrupts = ; + clocks = <&ccu CLK_DSI1>, + <&ccu CLK_BUS_DSI1>, + <&dsi1combophy CLK_DSI_HS>, + <&dsi1combophy CLK_DSI_LS>; + clock-names = "dsi_clk", + "dsi_gating_clk", + "displl_hs", + "displl_ls"; + resets = <&ccu RST_BUS_DSI1>; + reset-names = "dsi_rst_clk"; + assigned-clocks = <&ccu CLK_DSI1>; + assigned-clock-parents = <&ccu CLK_PLL_PERI0_150M>; + phys = <&dsi1combophy>; + phy-names = "combophy"; + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + dsi1_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + dsi1_in_tcon1: endpoint@1 { + reg = <0>; + remote-endpoint = <&tcon1_out_dsi1>; + }; + dsi1_in_tcon0: endpoint@0 { + reg = <1>; + remote-endpoint = <&tcon0_out_dsi1>; + }; + }; + }; + }; + rgb0: rgb0@0001000 { + compatible = "allwinner,rgb0"; + phys = <&dsi0combophy>; + phy-names = "combophy0"; + clocks = <&dsi0combophy CLK_LVDS_OR_RGB>; + clock-names = "rgb_pclk"; + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + rgb0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + rgb0_in_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_out_rgb0>; + }; + }; + }; + }; + + lvds0: lvds0@0001000 { + compatible = "allwinner,lvds0"; + clocks = <&dsi0combophy CLK_LVDS_OR_RGB>; + clock-names = "lvds_pclk"; + resets = <&ccu RST_BUS_LVDS0>; + reset-names = "rst_bus_lvds"; + phys = <&dsi0combophy>, <&dsi1combophy>; + phy-names = "combophy0", "combophy1"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + lvds0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + lvds0_in_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_out_lvds0>; + }; + }; + }; + }; + rgb1: rgb1@0001000 { + compatible = "allwinner,rgb1"; + reg = <0>; + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + rgb1_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + rgb1_in_tcon2: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon2_out_rgb1>; + }; + }; + }; + }; + + lvds1: lvds1@0001000 { + compatible = "allwinner,lvds1"; + resets = <&ccu RST_BUS_LVDS1>; + reset-names = "rst_bus_lvds"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + lvds1_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + lvds1_in_tcon2: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon2_out_lvds1>; + }; + }; + }; + }; + + tv0: tcon3@5730000 { + compatible = "allwinner,tcon-tv"; + reg = <0x0 0x05730000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_TCONTV0>; + clock-names = "clk_bus_tcon"; + resets = <&ccu RST_BUS_TCONTV0>; + reset-names = "rst_bus_tcon"; + top = <&vo1>; + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + tcon3_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + tcon3_in_disp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&disp0_out_tcon3>; + }; + tcon3_in_disp1: endpoint@1 { + reg = <1>; + remote-endpoint = <&disp1_out_tcon3>; + }; + }; + tcon3_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + tcon3_out_hdmi0: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi0_in_tcon3>; + }; + }; + }; + }; + + tv1: tcon4@5731000 { + compatible = "allwinner,tcon-tv"; + reg = <0x0 0x05731000 0x0 0x1000>; + interrupts = ; + clocks = <&ccu CLK_EDP_TV>, + <&ccu CLK_TCONTV1>; + clock-names = "clk_tcon", + "clk_bus_tcon"; + resets = <&ccu RST_BUS_TCONTV1>; + reset-names = "rst_bus_tcon"; + top = <&vo1>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + tcon4_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + tcon4_in_disp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&disp0_out_tcon4>; + }; + tcon4_in_disp1: endpoint@1 { + reg = <1>; + remote-endpoint = <&disp1_out_tcon4>; + }; + }; + tcon4_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + tcon4_out_edp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&edp0_in_tcon4>; + }; + }; + }; + }; + + edp0: edp0@5720000 { + #sound-dai-cells = <0>; /* audio driver match method arg */ + compatible = "allwinner,drm-edp"; + reg = <0x0 0x05740000 0x0 0x1000>, /* edp base */ + <0x0 0x05760000 0x0 0x0020>; /* edp pad base */ + interrupts = ; + power-domains = <&pd SUN60IW2_PCK_VO1>; + clocks = <&ccu CLK_EDP_TV>, <&ccu CLK_EDP>; + clock-names = "clk_edp", "clk_bus_edp"; + resets = <&ccu RST_BUS_EDP>; + reset-names = "rst_bus_edp"; + assigned-clocks = <&ccu CLK_EDP_TV>; + assigned-clock-parents = <&ccu CLK_PLL_VIDEO1_4X>; + phys = <&combo0_dp>, <&aux_hpd_phy>; + phy-names = "dp-phy", "aux-phy"; + sys = <&vo1>; + pclk_limit = <200000>; /*KHz*/ + + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + edp_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + edp0_in_tcon4: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon4_out_edp0>; + }; + }; + edp_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + + hdmi0: hdmi0@5520000 { + compatible = "allwinner,sunxi-hdmi"; + reg = <0x0 0x05520000 0x0 0x100000>; + interrupts = ; + clocks = <&ccu CLK_HDMI_REF>, + <&ccu CLK_HDMI>, + <&ccu CLK_HDMI_SFR>, + <&ccu CLK_HDCP_ESM>, + <&rtc_ccu CLK_DCXO>; + clock-names = "clk_cec", + "clk_hdmi", + "clk_hdmi_24M", + "clk_hdcp", + "clk_dcxo"; + resets = <&ccu RST_BUS_HDMI_SUB>, + <&ccu RST_BUS_HDMI_MAIN>, + <&ccu RST_BUS_HDMI_HDCP>; + reset-names = "rst_bus_sub", + "rst_bus_main", + "rst_bus_hdcp"; + assigned-clocks = <&ccu CLK_HDMI>; + assigned-clock-rates = <0>, <0>; + power-domains = <&pd SUN60IW2_PCK_VO1>; + + status = "disabled"; + ports { + #address-cells = <1>; + #size-cells = <0>; + hdmi_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + hdmi0_in_tcon3: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon3_out_hdmi0>; + }; + }; + }; + }; + + ufs: ufs@04520000 { + compatible = "allwinner,sunxi-ufs-v0"; + device_type = "ufs"; + reg = <0x0 0x4520000 0x0 0x1000>; + interrupts = ; + clocks = <&sys24M>, + <&ccu CLK_PLL_PERI0_200M>, + <&ccu CLK_PLL_PERI0_300M>, + <&ccu CLK_UFS_AXI>, + <&ccu CLK_UFS>, + <&ccu CLK_UFS_CFG>, + <&ccu CLK_STORE_AHB_GATE>, + <&ccu CLK_MBUS_STORE_GATE>, + <&ccu CLK_MSI_LITE1>, + <&rtc_ccu CLK_RTC_DCXO_WAKEUP>; + clock-names = "osc24m","pll_periph","pll_periph_2", + "axi_clk_gate","ahb_gate", "cfg_clk_gate", + "store_ahb","store_mbus","msi_lite","dcxo_wakeup"; + resets = <&ccu RST_BUS_UFS_CORE>, + <&ccu RST_BUS_UFS_PHY>, + <&ccu RST_BUS_UFS_AXI>, + <&ccu RST_BUS_UFS_AHB>; + reset-names = "controller_rst", "phy_rst", "axi_rst", "ahb_rst"; + status = "disabled"; + }; + + sdc2: sdmmc@4022000 { + compatible = "allwinner,sunxi-mmc-v4p6x"; + device_type = "sdc2"; + reg = <0x0 0x04022000 0x0 0x1000>; + interrupts = ; + clocks = <&sys24M>, + <&ccu CLK_PLL_PERI1_800M>, + <&ccu CLK_PLL_PERI1_600M>, + <&ccu CLK_SMHC2>, + <&ccu CLK_BUS_SMHC2>, + <&ccu CLK_STORE_AHB_GATE>, + <&ccu CLK_MBUS_STORE_GATE>, + <&ccu CLK_MSI_LITE1>; + clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb","mmc_store","mmc_mbus","mmc_msi_lite"; + resets = <&ccu RST_BUS_SMHC2>; + reset-names = "rst"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&sdc2_pins_a &sdc2_pins_c &sdc2_pins_d>; + pinctrl-1 = <&sdc2_pins_b>; + bus-width = <8>; + req-page-count = <2>; + cap-mmc-highspeed; + cap-cmd23; + mmc-cache-ctrl; + non-removable; + /*max-frequency = <200000000>;*/ + max-frequency = <50000000>; + cap-erase; + mmc-high-capacity-erase-size; + no-sdio; + no-sd; + /*-- speed mode --*/ + /*sm0: DS26_SDR12*/ + /*sm1: HSSDR52_SDR25*/ + /*sm2: HSDDR52_DDR50*/ + /*sm3: HS200_SDR104*/ + /*sm4: HS400*/ + /*-- frequency point --*/ + /*f0: CLK_400K*/ + /*f1: CLK_25M*/ + /*f2: CLK_50M*/ + /*f3: CLK_100M*/ + /*f4: CLK_150M*/ + /*f5: CLK_200M*/ + ctl-spec-caps = <0x328>; + sdc_tm4_sm0_freq0 = <0>; + sdc_tm4_sm0_freq1 = <0>; + sdc_tm4_sm1_freq0 = <0x00000000>; + sdc_tm4_sm1_freq1 = <0>; + sdc_tm4_sm2_freq0 = <0x00000000>; + sdc_tm4_sm2_freq1 = <0>; + sdc_tm4_sm3_freq0 = <0x05000000>; + sdc_tm4_sm3_freq1 = <0x00000005>; + sdc_tm4_sm4_freq0 = <0x00050000>; + sdc_tm4_sm4_freq1 = <0x00000004>; + sdc_tm4_sm4_freq0_cmd = <0>; + sdc_tm4_sm4_freq1_cmd = <0>; + + /*vmmc-supply = <®_3p3v>;*/ + /*vqmc-supply = <®_3p3v>;*/ + /*vdmc-supply = <®_3p3v>;*/ + /*vmmc = "vcc-card";*/ + /*vqmc = "";*/ + /*vdmc = "";*/ + /*sunxi-power-save-mode;*/ + status = "okay"; + }; + + sdc3: sdmmc@4023000 { + compatible = "allwinner,sunxi-mmc-v5p6x"; + device_type = "sdc3"; + reg = <0x0 0x04023000 0x0 0x1000>; + interrupts = ; + clocks = <&sys24M>, + <&ccu CLK_PLL_PERI1_800M>, + <&ccu CLK_PLL_PERI1_600M>, + <&ccu CLK_SMHC3>, + <&ccu CLK_BUS_SMHC3>, + <&ccu CLK_MBUS_STORE_GATE>, + <&ccu CLK_MSI_LITE1>; + clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb","mmc_mbus","mmc_msi_lite"; + resets = <&ccu RST_BUS_SMHC3>; + reset-names = "rst"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&sdc3_pins_a &sdc3_pins_c &sdc3_pins_d>; + pinctrl-1 = <&sdc3_pins_b>; + bus-width = <8>; + req-page-count = <2>; + cap-mmc-highspeed; + cap-cmd23; + mmc-cache-ctrl; + non-removable; + /*max-frequency = <200000000>;*/ + max-frequency = <50000000>; + cap-erase; + mmc-high-capacity-erase-size; + no-sdio; + no-sd; + /*-- speed mode --*/ + /*sm0: DS26_SDR12*/ + /*sm1: HSSDR52_SDR25*/ + /*sm2: HSDDR52_DDR50*/ + /*sm3: HS200_SDR104*/ + /*sm4: HS400*/ + /*-- frequency point --*/ + /*f0: CLK_400K*/ + /*f1: CLK_25M*/ + /*f2: CLK_50M*/ + /*f3: CLK_100M*/ + /*f4: CLK_150M*/ + /*f5: CLK_200M*/ + ctl-spec-caps = <0x328>; + sdc_tm4_sm0_freq0 = <0>; + sdc_tm4_sm0_freq1 = <0>; + sdc_tm4_sm1_freq0 = <0x00000000>; + sdc_tm4_sm1_freq1 = <0>; + sdc_tm4_sm2_freq0 = <0x00000000>; + sdc_tm4_sm2_freq1 = <0>; + sdc_tm4_sm3_freq0 = <0x05000000>; + sdc_tm4_sm3_freq1 = <0x00000005>; + sdc_tm4_sm4_freq0 = <0x00050000>; + sdc_tm4_sm4_freq1 = <0x00000004>; + sdc_tm4_sm4_freq0_cmd = <0>; + sdc_tm4_sm4_freq1_cmd = <0>; + + /*vmmc-supply = <®_3p3v>;*/ + /*vqmc-supply = <®_3p3v>;*/ + /*vdmc-supply = <®_3p3v>;*/ + /*vmmc = "vcc-card";*/ + /*vqmc = "";*/ + /*vdmc = "";*/ + /*sunxi-power-save-mode;*/ + status = "disabled"; + }; + + sdc0: sdmmc@4020000 { + compatible = "allwinner,sunxi-mmc-v5p3x", "allwinner,sun50i-a100-mmc"; + device_type = "sdc0"; + reg = <0x0 0x04020000 0x0 0x1000>; + interrupts = ; + clocks = <&sys24M>, + <&ccu CLK_PLL_PERI1_400M>, + <&ccu CLK_PLL_PERI1_300M>, + <&ccu CLK_SMHC0>, + <&ccu CLK_BUS_SMHC0>, + <&ccu CLK_STORE_AHB_GATE>, + <&ccu CLK_MBUS_STORE_GATE>, + <&ccu CLK_MSI_LITE1>; + clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb","mmc_store","mmc_mbus","mmc_msi_lite"; + resets = <&ccu RST_BUS_SMHC0>; + reset-names = "rst"; + pinctrl-names = "default","mmc_1v8","sleep","uart_jtag"; + pinctrl-0 = <&sdc0_pins_a &sdc0_pins_f>; + pinctrl-1 = <&sdc0_pins_b &sdc0_pins_g>; + pinctrl-2 = <&sdc0_pins_c>; + pinctrl-3 = <&sdc0_pins_d &sdc0_pins_e>; + max-frequency = <50000000>; + bus-width = <4>; + req-page-count = <2>; + /*non-removable;*/ + /*broken-cd;*/ + /*cd-inverted*/ + /*cd-gpios = <&pio PF 6 GPIO_ACTIVE_LOW>;*/ + /* vmmc-supply = <®_3p3v>;*/ + /* vqmc-supply = <®_3p3v>;*/ + /* vdmc-supply = <®_3p3v>;*/ + /*vmmc = "vcc-card";*/ + /*vqmc = "";*/ + /*vdmc = "";*/ + cap-sd-highspeed; + cap-wait-while-busy; + /*sd-uhs-sdr50;*/ + /*sd-uhs-ddr50;*/ + /*cap-sdio-irq;*/ + /*keep-power-in-suspend;*/ + /*ignore-pm-notify;*/ + /*sunxi-power-save-mode;*/ + /*sunxi-dly-400k = <1 0 0 0>; */ + /*sunxi-dly-26M = <1 0 0 0>;*/ + /*sunxi-dly-52M = <1 0 0 0>;*/ + /*sunxi-dly-52M-ddr4 = <1 0 0 0>;*/ + /*sunxi-dly-52M-ddr8 = <1 0 0 0>;*/ + /*sunxi-dly-104M = <1 0 0 0>;*/ + /*sunxi-dly-208M = <1 0 0 0>;*/ + /*sunxi-dly-104M-ddr = <1 0 0 0>;*/ + /*sunxi-dly-208M-ddr = <1 0 0 0>;*/ + ctl-spec-caps = <0x428>; + status = "okay"; + }; + + sdc1: sdmmc@4021000 { + compatible = "allwinner,sunxi-mmc-v5p3x", "allwinner,sun50i-a100-mmc"; + device_type = "sdc1"; + reg = <0x0 0x04021000 0x0 0x1000>; + interrupts = ; + clocks = <&sys24M>, + <&ccu CLK_PLL_PERI1_400M>, + <&ccu CLK_PLL_PERI1_300M>, + <&ccu CLK_SMHC1>, + <&ccu CLK_BUS_SMHC1>, + <&ccu CLK_STORE_AHB_GATE>, + <&ccu CLK_MBUS_STORE_GATE>, + <&ccu CLK_MSI_LITE1>; + clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb","mmc_store","mmc_mbus","mmc_msi_lite"; + resets = <&ccu RST_BUS_SMHC1>; + reset-names = "rst"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&sdc1_pins_a &sdc1_pins_c>; + pinctrl-1 = <&sdc1_pins_b>; + max-frequency = <50000000>; + bus-width = <4>; + /*broken-cd;*/ + /*cd-inverted*/ + /*cd-gpios = <&pio PG 6 6 1 2 0>;*/ + /* vmmc-supply = <®_3p3v>;*/ + /* vqmc-supply = <®_3p3v>;*/ + /* vdmc-supply = <®_3p3v>;*/ + /*vmmc = "vcc-card";*/ + /*vqmc = "";*/ + /*vdmc = "";*/ + cap-sd-highspeed; + cap-sdio-irq; + ignore-pm-notify; + /*sd-uhs-sdr50;*/ + /*sd-uhs-ddr50;*/ + /*sd-uhs-sdr104;*/ + /*cap-sdio-irq;*/ + keep-power-in-suspend; + /*ignore-pm-notify;*/ + /*sunxi-power-save-mode;*/ + /*sunxi-dly-400k = <0xff 0xff 0xff 0xff 0xff 0xff>; */ + /*sunxi-dly-26M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ + /*sunxi-dly-52M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ + /*sunxi-dly-52M-ddr4 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ + /*sunxi-dly-52M-ddr8 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ + /*sunxi-dly-104M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ + /*sunxi-dly-208M = <0xff 0xff 0xff 0xff 0xff 0xff> ;*/ + /*sunxi-dly-104M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ + /*sunxi-dly-208M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ + sunxi-dly-208M = <0xff 0x1 0xff 0xff 0xff 0xff>; + execute_tuning_in_kernel; + ctl-spec-caps = <0x428>; + status = "okay"; + }; + + gpu: gpu@1800000 { + device_type = "gpu"; + compatible = "img,gpu"; + reg = <0x0 0x01800000 0x0 0x8ffff>; + interrupts = , + ; + interrupt-names = "IRQGPU", "IRQGPUDVFS"; + clocks = <&ccu CLK_PLL_GPU0>, + <&ccu CLK_GPU0>, + <&ccu CLK_BUS_GPU0>, + <&ccu CLK_PLL_PERI0_800M>, + <&ccu CLK_PLL_PERI0_600M>, + <&ccu CLK_PLL_PERI0_400M>, + <&ccu CLK_PLL_PERI0_300M>, + <&ccu CLK_PLL_PERI0_200M>; + clock-names = "clk_parent", "clk", "clk_bus", + "clk_800", "clk_600", "clk_400", + "clk_300", "clk_200"; + resets = <&ccu RST_BUS_GPU0>; + reset-names = "reset_bus"; + /*power-domains = <&pd SUN60IW2_PCK_GPU_TOP>;*/ + operating-points-v2 = <&gpu_opp_table>; + #cooling-cells = <2>; + }; + + gpu_opp_table: gpu-opp-table { + compatible = "allwinner, img-operating-points"; + + /*opp@300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <800000>; + opp-microvolt-vfdefault = <800000>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0201 = <800000>; + opp-microvolt-vf0202 = <800000>; + opp-microvolt-vf0302 = <800000>; + opp-microvolt-vf0402 = <800000>; + opp-microvolt-vf0502 = <800000>; + opp-microvolt-vf0602 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf1400 = <800000>; + opp-microvolt-vf1500 = <800000>; + };*/ + + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <800000>; + opp-microvolt-vfdefault = <800000>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0101 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0201 = <800000>; + opp-microvolt-vf0202 = <800000>; + opp-microvolt-vf0302 = <800000>; + opp-microvolt-vf0402 = <800000>; + opp-microvolt-vf0502 = <800000>; + opp-microvolt-vf0602 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf1400 = <800000>; + opp-microvolt-vf1500 = <800000>; + }; + + opp@600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <800000>; + opp-microvolt-vfdefault = <800000>; + opp-microvolt-vf0000 = <800000>; + opp-microvolt-vf0100 = <800000>; + opp-microvolt-vf0101 = <800000>; + opp-microvolt-vf0200 = <800000>; + opp-microvolt-vf0201 = <800000>; + opp-microvolt-vf0202 = <800000>; + opp-microvolt-vf0302 = <800000>; + opp-microvolt-vf0402 = <800000>; + opp-microvolt-vf0502 = <800000>; + opp-microvolt-vf0602 = <800000>; + opp-microvolt-vf0300 = <800000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0800 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf1400 = <800000>; + opp-microvolt-vf1500 = <800000>; + }; + + opp@800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <840000>; + opp-microvolt-vfdefault = <840000>; + opp-microvolt-vf0000 = <840000>; + opp-microvolt-vf0100 = <840000>; + opp-microvolt-vf0101 = <800000>; + opp-microvolt-vf0200 = <840000>; + opp-microvolt-vf0201 = <800000>; + opp-microvolt-vf0202 = <800000>; + opp-microvolt-vf0302 = <800000>; + opp-microvolt-vf0402 = <800000>; + opp-microvolt-vf0502 = <800000>; + opp-microvolt-vf0602 = <800000>; + opp-microvolt-vf0300 = <820000>; + opp-microvolt-vf0400 = <800000>; + opp-microvolt-vf0500 = <800000>; + opp-microvolt-vf0600 = <800000>; + opp-microvolt-vf0700 = <800000>; + opp-microvolt-vf0800 = <820000>; + opp-microvolt-vf1400 = <800000>; + opp-microvolt-vf1500 = <800000>; + }; + + opp@1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <960000>; + opp-microvolt-vfdefault = <960000>; + opp-microvolt-vf0000 = <960000>; + opp-microvolt-vf0100 = <960000>; + opp-microvolt-vf0101 = <920000>; + opp-microvolt-vf0200 = <960000>; + opp-microvolt-vf0201 = <880000>; + opp-microvolt-vf0202 = <920000>; + opp-microvolt-vf0302 = <920000>; + opp-microvolt-vf0402 = <900000>; + opp-microvolt-vf0502 = <880000>; + opp-microvolt-vf0602 = <860000>; + opp-microvolt-vf0300 = <940000>; + opp-microvolt-vf0400 = <900000>; + opp-microvolt-vf0500 = <880000>; + opp-microvolt-vf0600 = <920000>; + opp-microvolt-vf0700 = <880000>; + opp-microvolt-vf0800 = <940000>; + opp-microvolt-vf1400 = <880000>; + opp-microvolt-vf1500 = <860000>; + }; + }; + + hdmi_codec: hdmi_codec { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-codec-hdmi"; + status = "disabled"; + }; + + /* audio dirver module -> I2S/PCM */ + i2s0_plat:i2s0_plat@2532000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-plat-i2s"; + reg = <0x0 0x02532000 0x0 0xA0>; + resets = <&ccu RST_BUS_I2SPCM0>; + clocks = <&ccu CLK_PLL_AUDIO0_4X>, + <&ccu CLK_PLL_AUDIO1_DIV2>, + <&ccu CLK_PLL_AUDIO1_DIV5>, + <&ccu CLK_PLL_PERI0_200M>, + <&ccu CLK_BUS_I2SPCM0>, + <&ccu CLK_I2SPCM0>; + clock-names = "clk_pll_audio0_4x", + "clk_pll_audio1_div2", + "clk_pll_audio1_div5", + "clk_i2s_asrc", + "clk_bus_i2s", + "clk_i2s"; + dmas = <&dma 3>, <&dma 3>; + dma-names = "tx", "rx"; + playback-cma = <128>; + capture-cma = <128>; + tx-fifo-size = <128>; + rx-fifo-size = <128>; + status = "disabled"; + }; + + i2s0_mach:i2s0_mach{ + compatible = "allwinner,sunxi-snd-mach"; + soundcard-mach,name = "sndi2s0"; + soundcard-mach,format = "i2s"; + soundcard-mach,slot-num = <2>; + soundcard-mach,slot-width = <32>; + status = "disabled"; + soundcard-mach,cpu { + sound-dai = <&i2s0_plat>; + }; + soundcard-mach,codec { + }; + }; + + i2s1_plat:i2s1_plat@2533000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-plat-i2s"; + reg = <0x0 0x02533000 0x0 0xA0>; + resets = <&ccu RST_BUS_I2SPCM1>; + clocks = <&ccu CLK_PLL_AUDIO0_4X>, + <&ccu CLK_PLL_AUDIO1_DIV2>, + <&ccu CLK_PLL_AUDIO1_DIV5>, + <&ccu CLK_PLL_PERI0_200M>, + <&ccu CLK_BUS_I2SPCM1>, + <&ccu CLK_I2SPCM1>; + clock-names = "clk_pll_audio0_4x", + "clk_pll_audio1_div2", + "clk_pll_audio1_div5", + "clk_i2s_asrc", + "clk_bus_i2s", + "clk_i2s"; + dmas = <&dma 4>, <&dma 4>; + dma-names = "tx", "rx"; + playback-cma = <128>; + capture-cma = <128>; + tx-fifo-size = <128>; + rx-fifo-size = <128>; + status = "disabled"; + }; + + i2s1_mach:i2s1_mach{ + compatible = "allwinner,sunxi-snd-mach"; + soundcard-mach,name = "sndi2s1"; + soundcard-mach,format = "i2s"; + soundcard-mach,slot-num = <2>; + soundcard-mach,slot-width = <32>; + status = "disabled"; + soundcard-mach,cpu { + sound-dai = <&i2s1_plat>; + }; + soundcard-mach,codec { + }; + }; + + i2s2_plat:i2s2_plat@2534000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-plat-i2s"; + reg = <0x0 0x02534000 0x0 0xA0>; + resets = <&ccu RST_BUS_I2SPCM2>; + clocks = <&ccu CLK_PLL_AUDIO0_4X>, + <&ccu CLK_PLL_AUDIO1_DIV2>, + <&ccu CLK_PLL_AUDIO1_DIV5>, + <&ccu CLK_PLL_PERI0_200M>, + <&ccu CLK_BUS_I2SPCM2>, + <&ccu CLK_I2SPCM2>; + clock-names = "clk_pll_audio0_4x", + "clk_pll_audio1_div2", + "clk_pll_audio1_div5", + "clk_i2s_asrc", + "clk_bus_i2s", + "clk_i2s"; + dmas = <&dma 5>, <&dma 5>; + dma-names = "tx", "rx"; + playback-cma = <128>; + capture-cma = <128>; + tx-fifo-size = <128>; + rx-fifo-size = <128>; + status = "disabled"; + }; + + i2s2_mach:i2s2_mach{ + compatible = "allwinner,sunxi-snd-mach"; + soundcard-mach,name = "sndi2s2"; + soundcard-mach,format = "i2s"; + soundcard-mach,slot-num = <2>; + soundcard-mach,slot-width = <32>; + status = "disabled"; + soundcard-mach,cpu { + sound-dai = <&i2s2_plat>; + }; + soundcard-mach,codec { + }; + }; + + i2s3_plat:i2s3_plat@2535000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-plat-i2s"; + reg = <0x0 0x02535000 0x0 0xA0>; + resets = <&ccu RST_BUS_I2SPCM3>; + clocks = <&ccu CLK_PLL_AUDIO0_4X>, + <&ccu CLK_PLL_AUDIO1_DIV2>, + <&ccu CLK_PLL_AUDIO1_DIV5>, + <&ccu CLK_PLL_PERI0_200M>, + <&ccu CLK_BUS_I2SPCM3>, + <&ccu CLK_I2SPCM3>; + clock-names = "clk_pll_audio0_4x", + "clk_pll_audio1_div2", + "clk_pll_audio1_div5", + "clk_i2s_asrc", + "clk_bus_i2s", + "clk_i2s"; + dmas = <&dma 6>, <&dma 6>; + dma-names = "tx", "rx"; + playback-cma = <128>; + capture-cma = <128>; + tx-fifo-size = <128>; + rx-fifo-size = <128>; + status = "disabled"; + }; + + i2s3_mach:i2s3_mach{ + compatible = "allwinner,sunxi-snd-mach"; + /* card name. hdmi: "sndhdmi"; edp: "sndedp" */ + soundcard-mach,name = "sndhdmi"; + soundcard-mach,format = "i2s"; + soundcard-mach,slot-num = <2>; + soundcard-mach,slot-width = <32>; + status = "disabled"; + soundcard-mach,cpu { + sound-dai = <&i2s3_plat>; + }; + soundcard-mach,codec { + }; + }; + + i2s4_plat:i2s4_plat@2536000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-plat-i2s"; + reg = <0x0 0x02536000 0x0 0xA0>; + resets = <&ccu RST_BUS_I2SPCM4>; + clocks = <&ccu CLK_PLL_AUDIO0_4X>, + <&ccu CLK_PLL_AUDIO1_DIV2>, + <&ccu CLK_PLL_AUDIO1_DIV5>, + <&ccu CLK_PLL_PERI0_200M>, + <&ccu CLK_BUS_I2SPCM4>, + <&ccu CLK_I2SPCM4>; + clock-names = "clk_pll_audio0_4x", + "clk_pll_audio1_div2", + "clk_pll_audio1_div5", + "clk_i2s_asrc", + "clk_bus_i2s", + "clk_i2s"; + dmas = <&dma 7>, <&dma 7>; + dma-names = "tx", "rx"; + playback-cma = <128>; + capture-cma = <128>; + tx-fifo-size = <128>; + rx-fifo-size = <128>; + status = "disabled"; + }; + + i2s4_mach:i2s4_mach{ + compatible = "allwinner,sunxi-snd-mach"; + soundcard-mach,name = "sndi2s4"; + soundcard-mach,format = "i2s"; + soundcard-mach,slot-num = <2>; + soundcard-mach,slot-width = <32>; + status = "disabled"; + soundcard-mach,cpu { + sound-dai = <&i2s4_plat>; + }; + soundcard-mach,codec { + }; + }; + + /* audio dirver module -> owa */ + owa_plat:owa_plat@2537000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-plat-owa"; + reg = <0x0 0x02537000 0x0 0x58>; + interrupts = ; + resets = <&ccu RST_BUS_OWA>; + clocks = <&ccu CLK_PLL_AUDIO0_4X>, + <&ccu CLK_PLL_AUDIO1_DIV2>, + <&ccu CLK_PLL_AUDIO1_DIV5>, + <&ccu CLK_BUS_OWA>, + <&ccu CLK_OWA_TX>, + <&ccu CLK_OWA_RX>; + clock-names = "clk_pll_audio0_4x", + "clk_pll_audio1_div2", + "clk_pll_audio1_div5", + "clk_bus_owa", + "clk_owa_tx", + "clk_owa_rx"; + dmas = <&dma 2>, <&dma 2>; + dma-names = "tx", "rx"; + playback-cma = <128>; + capture-cma = <128>; + tx-fifo-size = <128>; + rx-fifo-size = <128>; + status = "disabled"; + }; + + owa_mach:owa_mach { + compatible = "allwinner,sunxi-snd-mach"; + soundcard-mach,name = "sndowa"; + status = "disabled"; + soundcard-mach,cpu { + sound-dai = <&owa_plat>; + }; + soundcard-mach,codec { + }; + }; + + /* audio dirver module -> dmic */ + dmic_plat:dmic_plat@2531000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sunxi-snd-plat-dmic"; + reg = <0x0 0x02531000 0x0 0x50>; + resets = <&ccu RST_BUS_DMIC>; + clocks = <&ccu CLK_PLL_AUDIO0_4X>, + <&ccu CLK_PLL_AUDIO1_DIV2>, + <&ccu CLK_PLL_AUDIO1_DIV5>, + <&ccu CLK_BUS_DMIC>, + <&ccu CLK_DMIC>; + clock-names = "clk_pll_audio0_4x", + "clk_pll_audio1_div2", + "clk_pll_audio1_div5", + "clk_bus_dmic", + "clk_dmic"; + dmas = <&dma 9>; + dma-names = "rx"; + capture-cma = <128>; + rx-fifo-size = <128>; + status = "disabled"; + }; + + dmic_mach:dmic_mach{ + compatible = "allwinner,sunxi-snd-mach"; + soundcard-mach,name = "snddmic"; + soundcard-mach,capture-only; + status = "disabled"; + soundcard-mach,cpu { + sound-dai = <&dmic_plat>; + }; + soundcard-mach,codec { + }; + }; + + pcie_rc: pcie@6000000 { + #address-cells = <3>; + #size-cells = <2>; + compatible = "allwinner,sunxi-pcie-v300-rc"; + bus-range = <0x0 0xff>; + reg = <0 0x06000000 0 0x480000>; + reg-names = "dbi"; + device_type = "pci"; + ranges = <0x00000800 0 0x20000000 0x0 0x20000000 0 0x01000000 + 0x81000000 0 0x21000000 0x0 0x21000000 0 0x01000000 + 0x82000000 0 0x22000000 0x0 0x22000000 0 0x06000000>; + num-lanes = <1>; + phys = <&combo1_pcie>; + phy-names = "pcie-phy"; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "sii", "msi", "edma-w0", "edma-w1", "edma-w2", "edma-w3", + "edma-r0", "edma-r1", "edma-r2", "edma-r3"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + num-edma = <4>; + max-link-speed = <3>; + num-ib-windows = <16>; + num-ob-windows = <16>; + linux,pci-domain = <0>; + power-domains = <&pd SUN60IW2_PCK_PCIE>; + clocks = <&ccu CLK_PCIE0_AUX>, <&ccu CLK_PCIE0_AXI_SLV>, <&ccu CLK_ITS_PCIE0_A>; + clock-names = "pclk_aux", "pclk_slv", "its"; + resets = <&ccu RST_BUS_PCIE0>, <&ccu RST_BUS_PCIE0_PWRUP>, <&ccu RST_BUS_ITS_PCIE0>; + reset-names = "pclk_rst", "pwrup_rst", "its"; + busno = <0>; + status = "disabled"; + + pcie_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; +}; diff --git a/board/batocera/allwinner/a733/fsoverlay/.gitkeep b/board/batocera/allwinner/a733/fsoverlay/.gitkeep new file mode 100644 index 00000000000..e69de29bb2d diff --git a/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S03system-splash b/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S03system-splash new file mode 100755 index 00000000000..7f99956b6fd --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S03system-splash @@ -0,0 +1,6 @@ +#!/bin/sh +# A733/Cubie-A7S has no /dev/fb0 — the BSP display driver does not register +# with DRM fbdev emulation even though CONFIG_DRM_FBDEV_EMULATION=y. The +# stock S03 wastes 20 s waiting for /dev/fb0 that never arrives. Skip it; +# the S28splash video handles branding on this hardware. +exit 0 diff --git a/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S13-videooutput b/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S13-videooutput new file mode 100755 index 00000000000..750b3541897 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S13-videooutput @@ -0,0 +1,13 @@ +#!/bin/sh +# Set DP-1 as primary video output before S14labwc reads batocera.conf. +# USB-C DisplayPort Alt Mode is the only display on A733/Cubie-A7S. + +if [ "$1" != "start" ]; then + exit 0 +fi + +mkdir -p /userdata/system +CONF=/userdata/system/batocera.conf +if ! grep -q "^global.videooutput=" "$CONF" 2>/dev/null; then + echo "global.videooutput=DP-1" >> "$CONF" +fi diff --git a/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S20wait-for-dp b/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S20wait-for-dp new file mode 100755 index 00000000000..3ee7fd74bdc --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/etc/init.d/S20wait-for-dp @@ -0,0 +1,31 @@ +#!/bin/sh +# Wait for the USB-C DisplayPort Alt Mode connector to show "connected" +# before S28splash runs. On cold boot the HUSB311 TypeC controller needs +# 2-5 s to complete Alt Mode negotiation and fire HPD. Without this wait +# S28 finds no connected display and mpv falls through to auto-detection, +# which fails with "No primary DRM device could be picked". + +[ "$1" = "start" ] || exit 0 + +TIMEOUT=10 +i=0 + +while [ "$i" -lt "$TIMEOUT" ]; do + for f in /sys/class/drm/card*-DP-1/status; do + [ -f "$f" ] || continue + if [ "$(cat "$f" 2>/dev/null)" = "connected" ]; then + # DP-1 sysfs shows connected at CC detection time, but DP link + # training + EDID read take another ~5s. Without this wait, S28 + # plays while the monitor is still dark and the ES Checker fires + # a hotplug restart mid-load. Sleep here so the display is fully + # negotiated before any video or compositor starts. + sleep 5 + exit 0 + fi + done + sleep 1 + i=$((i + 1)) +done + +# Timed out — DP-1 never appeared. Boot continues; S28 will handle it. +exit 0 diff --git a/board/batocera/allwinner/a733/fsoverlay/etc/inittab b/board/batocera/allwinner/a733/fsoverlay/etc/inittab new file mode 100644 index 00000000000..c979759da1d --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/etc/inittab @@ -0,0 +1,33 @@ +# /etc/inittab +# +# This inittab is a basic inittab sample for sysvinit, which mimics +# Buildroot's default inittab for BusyBox. +id:3:initdefault: + +si0::sysinit:/bin/mount -t proc proc /proc +# si1::sysinit:/bin/mount -o remount,rw / +si2::sysinit:/bin/mkdir -p /dev/pts +si3::sysinit:/bin/mkdir -p /dev/shm +si4::sysinit:/bin/mount -a +si5::sysinit:/bin/hostname -F /etc/hostname +si6::sysinit:/etc/init.d/rcS + +# Serial console login on Allwinner UART0 (ttyAS0, 115200 baud) +S0:3:respawn:/sbin/getty -L 115200 ttyS0 vt100 + +# 2:3:respawn:/sbin/getty 38400 tty2 +# 3:3:respawn:/sbin/getty 38400 tty3 +4:3:respawn:/sbin/getty 38400 tty4 -n -l /usr/bin/batocera-mixer +5:3:respawn:/sbin/getty 38400 tty5 + +# Stuff to do for the 3-finger salute +ca::ctrlaltdel:/sbin/reboot + +# Stuff to do before rebooting +shd0:06:wait:/etc/init.d/rcK +shd1:06:wait:/sbin/swapoff -a +shd2:06:wait:/bin/umount -a -r -f + +# The usual halt or reboot actions +hlt0:0:wait:/sbin/halt -dhp +reb0:6:wait:/sbin/reboot diff --git a/board/batocera/allwinner/a733/fsoverlay/etc/modprobe.d/xpad.conf b/board/batocera/allwinner/a733/fsoverlay/etc/modprobe.d/xpad.conf new file mode 100644 index 00000000000..bc7c8ce9798 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/etc/modprobe.d/xpad.conf @@ -0,0 +1,4 @@ +# xpad is built into the kernel (CONFIG_JOYSTICK_XPAD=y) so this modprobe.d +# file has no effect on module loading. auto_poweroff must be disabled at +# runtime via /sys/bus/usb/drivers/xpad/module/parameters/auto_poweroff. +# options xpad auto_poweroff=N diff --git a/board/batocera/allwinner/a733/fsoverlay/etc/modules.conf b/board/batocera/allwinner/a733/fsoverlay/etc/modules.conf new file mode 100644 index 00000000000..5642c6c8e8d --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/etc/modules.conf @@ -0,0 +1,2 @@ +snd_seq +pvrsrvkm diff --git a/board/batocera/allwinner/a733/fsoverlay/etc/powervr.ini b/board/batocera/allwinner/a733/fsoverlay/etc/powervr.ini new file mode 100644 index 00000000000..4f59eb53dca --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/etc/powervr.ini @@ -0,0 +1,2 @@ +[default] +EnableBlobCache=1 diff --git a/board/batocera/allwinner/a733/fsoverlay/lib/firmware/edid/smartglasses-120hz.bin b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/edid/smartglasses-120hz.bin new file mode 100644 index 00000000000..1f2dd58e790 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/edid/smartglasses-120hz.bin differ diff --git a/board/batocera/allwinner/a733/fsoverlay/lib/firmware/edid/smartglasses.bin b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/edid/smartglasses.bin new file mode 100644 index 00000000000..b4aebbd25af Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/edid/smartglasses.bin differ diff --git a/board/batocera/allwinner/a733/fsoverlay/lib/firmware/rgx.fw.36.56.104.183 b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/rgx.fw.36.56.104.183 new file mode 100644 index 00000000000..6f92bb6c0ca Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/rgx.fw.36.56.104.183 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/lib/firmware/rgx.sh.36.56.104.183 b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/rgx.sh.36.56.104.183 new file mode 100644 index 00000000000..e1b06674a32 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/lib/firmware/rgx.sh.36.56.104.183 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/bin/labwc-launch b/board/batocera/allwinner/a733/fsoverlay/usr/bin/labwc-launch new file mode 100755 index 00000000000..bd1f6d8e0ea --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/bin/labwc-launch @@ -0,0 +1,206 @@ +#!/bin/sh + +. /etc/profile.d/25-language.sh + +# Add the keyboard details to the environment variable +LABWC_ENV_FILE="/userdata/system/.config/labwc/environment" +echo "XKB_DEFAULT_LAYOUT=$XKB_DEFAULT_LAYOUT" > "$LABWC_ENV_FILE" +echo "XKB_DEFAULT_VARIANT=$XKB_DEFAULT_VARIANT" >> "$LABWC_ENV_FILE" + +# Allow startup from a user session where WAYLAND_DISPLAY is set, +# e.g. to restart via /etc/init.d/S31emulationstation start +unset WAYLAND_DISPLAY + +# Log and configuration file paths +LOG_FILE="/userdata/system/logs/display.log" +LABWC_CONF_DIR="/userdata/system/.config/labwc" +LABWC_LOG_FILE="/userdata/system/logs/labwc.log" +LABWC_GLES2_LOG="/userdata/system/logs/labwc-gles2.log" + +mkdir -p /userdata/system/logs +mkdir -p /var/run +mkdir -p /var/log + +# Helper: write a message to the serial console directly. +# /dev/console = tty1 (display), so init.d stdout never appears on serial. +serial() { printf '[labwc-launch] %s\n' "$*" > /dev/ttyS0 2>/dev/null; } + +serial "started (pid $$)" + +# Wait for the sunxi-drm display device — find the card that owns any DP or eDP +# connector. PVR GPU also creates a DRM device (no connectors) and may claim +# card0 first, so we must not hardcode card0. +i=0 +DISPLAY_CARD="" +DISPLAY_CONN="" +while [ $i -lt 60 ]; do + for conn in /sys/class/drm/card*-DP-1 /sys/class/drm/card*-eDP-1; do + [ -e "$conn" ] && DISPLAY_CARD=$(basename "${conn%%-*}") && DISPLAY_CONN=$(basename "$conn") && break 2 + done + [ $((i % 5)) -eq 0 ] && serial "waiting for display connector (${i}s)... drm: $(ls /sys/class/drm/ 2>/dev/null | tr '\n' ' ')" + echo "Waiting for display connector... ($i s)" >> "$LOG_FILE" + sleep 1 + i=$((i + 1)) +done +if [ -z "$DISPLAY_CARD" ]; then + serial "ERROR: no DP-1 or eDP-1 connector found after 60s — aborting" + serial "DRM entries: $(ls /sys/class/drm/ 2>/dev/null | tr '\n' ' ')" + exit 1 +fi +serial "display connector: $DISPLAY_CONN on /dev/dri/$DISPLAY_CARD (found at ${i}s)" +echo "display connector: $DISPLAY_CONN on /dev/dri/$DISPLAY_CARD (found at ${i}s)" >> "$LOG_FILE" + +# Derive the Wayland output name from the DRM connector (card1-DP-1 → DP-1) +WAYLAND_OUTPUT=$(echo "$DISPLAY_CONN" | sed 's/^card[0-9]*-//') + +# EDID quirk: some displays have correct timing descriptors but a broken monitor +# range descriptor that caps the reported max vfreq/hfreq below the mode they +# describe. The kernel validates timing modes against the range and rejects any +# mode whose h_freq or v_freq exceeds the range limits — even when the timing +# descriptor explicitly encodes that mode. We detect known affected displays by +# their EDID manufacturer ID (bytes 8-9) and write a corrected EDID to the +# kernel sysfs override before labwc starts. wlroots reads the EDID on connector +# init, so the override is in place before any mode list is built. +apply_edid_quirks() { + local conn_path="/sys/class/drm/$DISPLAY_CONN" + local edid_src="$conn_path/edid" + if [ ! -f "$edid_src" ]; then + serial "EDID quirk: no edid file at $edid_src — skipping" + echo "EDID quirk: no edid file at $edid_src — skipping" >> "$LOG_FILE" + return + fi + + # Find the writable edid_override node. Kernel 5.5+ may expose it in sysfs; + # older BSP kernels may only have it in debugfs. Try both. + local card_num + card_num=$(echo "$DISPLAY_CARD" | tr -d 'card') + local edid_override="" + for candidate in \ + "$conn_path/edid_override" \ + "/sys/kernel/debug/dri/${card_num}/${WAYLAND_OUTPUT}/edid_override" \ + "/sys/kernel/debug/dri/${card_num}/edid_override"; do + if [ -w "$candidate" ]; then + edid_override="$candidate" + break + fi + done + + if [ -z "$edid_override" ]; then + serial "EDID quirk: no writable edid_override found — kernel may not support runtime EDID override" + echo "EDID quirk: no writable edid_override found (checked sysfs + debugfs)" >> "$LOG_FILE" + return + fi + serial "EDID quirk: override node: $edid_override" + echo "EDID quirk: override node: $edid_override" >> "$LOG_FILE" + + # Read manufacturer ID bytes 8-9 as a hex string (2 bytes, no separator) + local mfr + mfr=$(od -An -tx1 -j8 -N2 "$edid_src" 2>/dev/null | tr -d ' \n') + echo "EDID quirk: manufacturer id=$mfr" >> "$LOG_FILE" + case "$mfr" in + 506c) + # TCL / Technical Concepts Ltd SmartGlasses: EDID monitor range caps + # at 65Hz/70kHz but the two base-block DTDs correctly encode 120Hz + # (293.6MHz, h_freq=133kHz). Fix: override with corrected range + # (130Hz/160kHz) so the kernel exposes the 120Hz DTD modes. + local quirk_edid="/lib/firmware/edid/smartglasses-120hz.bin" + if [ -f "$quirk_edid" ]; then + cat "$quirk_edid" > "$edid_override" 2>/dev/null \ + && serial "EDID quirk: SmartGlasses 120Hz override applied" \ + && echo "EDID quirk: SmartGlasses 120Hz override applied" >> "$LOG_FILE" \ + || { serial "EDID quirk: SmartGlasses override write failed"; echo "EDID quirk: override write failed" >> "$LOG_FILE"; } + else + serial "EDID quirk: SmartGlasses firmware file missing: $quirk_edid" + echo "EDID quirk: firmware file missing: $quirk_edid" >> "$LOG_FILE" + fi + ;; + *) + echo "EDID quirk: manufacturer $mfr — no quirk needed" >> "$LOG_FILE" + ;; + esac +} +apply_edid_quirks + +echo "Starting labwc (keyboard: $XKB_DEFAULT_LAYOUT)" >> "$LOG_FILE" + +# After labwc is running, prefer 120Hz if the display supports it. +# Falls back silently to the preferred mode (usually 60Hz) if not. +prefer_120hz() { + local output="$1" + local mode_120 + mode_120=$(WAYLAND_DISPLAY=wayland-0 XDG_RUNTIME_DIR=/run \ + wlr-randr 2>/dev/null | \ + awk '/^[[:space:]]+[0-9]+x[0-9]+ px,/ { + res=$1; hz=$3 + if (int(hz)>=119 && int(hz)<=121) print res "@" hz "Hz" + }' | sort -t x -k1 -rn | head -1) + if [ -n "$mode_120" ]; then + if WAYLAND_DISPLAY=wayland-0 XDG_RUNTIME_DIR=/run \ + wlr-randr --output "$output" --mode "$mode_120" 2>/dev/null; then + serial "120Hz mode set: $mode_120 on $output" + echo "Refresh: 120Hz set on $output: $mode_120" >> "$LOG_FILE" + else + serial "120Hz mode rejected by display: $mode_120" + echo "Refresh: 120Hz mode $mode_120 rejected on $output" >> "$LOG_FILE" + fi + else + echo "Refresh: no 120Hz mode on $output — using preferred" >> "$LOG_FILE" + fi +} + +# pvrsrvkm's render node. sunxi-drm (display) does NOT set DRIVER_RENDER so it +# gets no renderD node. pvrsrvkm does, and gets the first available minor (128). +# Do NOT derive by card-number arithmetic — render node minors are assigned by +# DRIVER_RENDER registration order, not card index. +PVR_RENDER_NODE=$(ls /dev/dri/renderD* 2>/dev/null | head -1) +if [ -z "$PVR_RENDER_NODE" ]; then + serial "ERROR: no render node found — pvrsrvkm.ko may not be loaded" + exit 1 +fi +serial "PVR render node: $PVR_RENDER_NODE" + +# Try GLES2 with the PowerVR DDK. WLR_RENDER_DRM_DEVICE points wlroots at the +# PVR render node instead of the sunxi-drm render node (which can't do GLES2). +# If labwc crashes within 5s (EGL init failure), fall back to pixman. + +serial "Attempting WLR_RENDERER=gles2 display=/dev/dri/$DISPLAY_CARD render=$PVR_RENDER_NODE" +echo "=== labwc GLES2 attempt $(date) ===" > "$LABWC_GLES2_LOG" +LD_LIBRARY_PATH="/usr/local/lib:/usr/lib${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}" \ +LIBGL_DRIVERS_PATH="/usr/local/lib/dri" \ +GBM_BACKENDS_PATH="/usr/local/lib/gbm" \ +MESA_LOADER_DRIVER_OVERRIDE=pvr \ +WLR_RENDERER=gles2 \ +WLR_DRM_DEVICES="/dev/dri/$DISPLAY_CARD" \ +WLR_RENDER_DRM_DEVICE="$PVR_RENDER_NODE" \ +WLR_LIBINPUT_NO_DEVICES=1 \ +WLR_DRM_NO_MODIFIERS=1 \ + /usr/bin/labwc -d -C $LABWC_CONF_DIR >> "$LABWC_GLES2_LOG" 2>&1 & +LABWC_PID=$! + +sleep 5 +if kill -0 $LABWC_PID 2>/dev/null; then + serial "labwc GLES2 alive after 5s — GPU rendering active" + cp "$LABWC_GLES2_LOG" "$LABWC_LOG_FILE" + prefer_120hz "$WAYLAND_OUTPUT" & + wait $LABWC_PID + EXIT_CODE=$? +else + serial "labwc GLES2 crashed — falling back to pixman" + cp "$LABWC_GLES2_LOG" "$LABWC_LOG_FILE" + tail -20 "$LABWC_GLES2_LOG" | while IFS= read -r line; do serial " $line"; done + WLR_RENDERER=pixman WLR_RENDERER_ALLOW_SOFTWARE=1 \ + WLR_DRM_DEVICES="/dev/dri/$DISPLAY_CARD" WLR_LIBINPUT_NO_DEVICES=1 \ + /usr/bin/labwc -d -C $LABWC_CONF_DIR >> "$LABWC_LOG_FILE" 2>&1 & + LABWC_PID=$! + serial "labwc pixman fallback started with PID $LABWC_PID" + prefer_120hz "$WAYLAND_OUTPUT" & + wait $LABWC_PID + EXIT_CODE=$? +fi + +serial "labwc exited with code $EXIT_CODE" +echo "labwc exited with code $EXIT_CODE" >> "$LOG_FILE" +if [ $EXIT_CODE -ne 0 ]; then + serial "--- last 30 lines of labwc.log ---" + tail -30 "$LABWC_LOG_FILE" | while IFS= read -r line; do serial " $line"; done +fi diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv1_CM_PVR_MESA.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv1_CM_PVR_MESA.so new file mode 120000 index 00000000000..c5bd3e75d69 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv1_CM_PVR_MESA.so @@ -0,0 +1 @@ +libGLESv1_CM_PVR_MESA.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv1_CM_PVR_MESA.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv1_CM_PVR_MESA.so.24.2.6603887 new file mode 100644 index 00000000000..55ba8bd2de0 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv1_CM_PVR_MESA.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv2_PVR_MESA.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv2_PVR_MESA.so new file mode 120000 index 00000000000..a6994bdaa62 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv2_PVR_MESA.so @@ -0,0 +1 @@ +libGLESv2_PVR_MESA.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv2_PVR_MESA.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv2_PVR_MESA.so.24.2.6603887 new file mode 100644 index 00000000000..33de8ca0121 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libGLESv2_PVR_MESA.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so new file mode 120000 index 00000000000..1d07ba5e369 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so @@ -0,0 +1 @@ +libPVROCL.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so.1 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so.1 new file mode 120000 index 00000000000..1d07ba5e369 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so.1 @@ -0,0 +1 @@ +libPVROCL.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so.24.2.6603887 new file mode 100644 index 00000000000..987dd06baf1 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVROCL.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVRScopeServices.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVRScopeServices.so new file mode 120000 index 00000000000..0e4c795509d --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVRScopeServices.so @@ -0,0 +1 @@ +libPVRScopeServices.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVRScopeServices.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVRScopeServices.so.24.2.6603887 new file mode 100644 index 00000000000..88da0992306 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libPVRScopeServices.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so new file mode 120000 index 00000000000..52146e54700 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so @@ -0,0 +1 @@ +libVK_IMG.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so.1 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so.1 new file mode 120000 index 00000000000..52146e54700 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so.1 @@ -0,0 +1 @@ +libVK_IMG.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so.24.2.6603887 new file mode 100644 index 00000000000..41c5d6ab541 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libVK_IMG.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libglslcompiler.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libglslcompiler.so new file mode 120000 index 00000000000..39b9c4cfbb0 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libglslcompiler.so @@ -0,0 +1 @@ +libglslcompiler.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libglslcompiler.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libglslcompiler.so.24.2.6603887 new file mode 100644 index 00000000000..829736fb5c8 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libglslcompiler.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libpvr_dri_support.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libpvr_dri_support.so new file mode 120000 index 00000000000..05e1bbf7b17 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libpvr_dri_support.so @@ -0,0 +1 @@ +libpvr_dri_support.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libpvr_dri_support.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libpvr_dri_support.so.24.2.6603887 new file mode 100644 index 00000000000..beaa07f9620 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libpvr_dri_support.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsrv_um.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsrv_um.so new file mode 120000 index 00000000000..53169db2002 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsrv_um.so @@ -0,0 +1 @@ +libsrv_um.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsrv_um.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsrv_um.so.24.2.6603887 new file mode 100644 index 00000000000..52b61956581 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsrv_um.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsutu_display.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsutu_display.so new file mode 120000 index 00000000000..fd302dd83b4 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsutu_display.so @@ -0,0 +1 @@ +libsutu_display.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsutu_display.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsutu_display.so.24.2.6603887 new file mode 100644 index 00000000000..990a03efc2b Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libsutu_display.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libufwriter.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libufwriter.so new file mode 120000 index 00000000000..13532dbb9a8 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libufwriter.so @@ -0,0 +1 @@ +libufwriter.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libufwriter.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libufwriter.so.24.2.6603887 new file mode 100644 index 00000000000..72d1c032193 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libufwriter.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libusc.so b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libusc.so new file mode 120000 index 00000000000..b5c130ba82d --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libusc.so @@ -0,0 +1 @@ +libusc.so.24.2.6603887 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/lib/libusc.so.24.2.6603887 b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libusc.so.24.2.6603887 new file mode 100644 index 00000000000..da183785f45 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/lib/libusc.so.24.2.6603887 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/pvr_dri.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/pvr_dri.so new file mode 100755 index 00000000000..c29a344eeb0 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/pvr_dri.so differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/sunxi-drm_dri.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/sunxi-drm_dri.so new file mode 100755 index 00000000000..5fedc1b88e2 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/sunxi-drm_dri.so differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/swrast_dri.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/swrast_dri.so new file mode 100755 index 00000000000..5fedc1b88e2 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/dri/swrast_dri.so differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/gbm/pvr_gbm.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/gbm/pvr_gbm.so new file mode 100755 index 00000000000..12b49b30d8d Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/gbm/pvr_gbm.so differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/gbm/sunxi-drm_gbm.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/gbm/sunxi-drm_gbm.so new file mode 120000 index 00000000000..8ac2ccba6c1 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/gbm/sunxi-drm_gbm.so @@ -0,0 +1 @@ +pvr_gbm.so \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so new file mode 120000 index 00000000000..62c6fdc5bd4 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so @@ -0,0 +1 @@ +libEGL.so.1 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so.1 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so.1 new file mode 120000 index 00000000000..ecdb31b0b89 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so.1 @@ -0,0 +1 @@ +libEGL.so.1.0.0 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so.1.0.0 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so.1.0.0 new file mode 100755 index 00000000000..a9a7938cb5a Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libEGL.so.1.0.0 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so new file mode 120000 index 00000000000..d8752e2d9e4 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so @@ -0,0 +1 @@ +libGLESv1_CM.so.1 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so.1 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so.1 new file mode 120000 index 00000000000..e8dafc591ad --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so.1 @@ -0,0 +1 @@ +libGLESv1_CM.so.1.1.0 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so.1.1.0 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so.1.1.0 new file mode 100755 index 00000000000..35d516e7bc2 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv1_CM.so.1.1.0 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so new file mode 120000 index 00000000000..243b5fe39e3 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so @@ -0,0 +1 @@ +libGLESv2.so.2 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so.2 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so.2 new file mode 120000 index 00000000000..2f3ba82fdfb --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so.2 @@ -0,0 +1 @@ +libGLESv2.so.2.0.0 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so.2.0.0 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so.2.0.0 new file mode 100755 index 00000000000..195d5f986c1 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libGLESv2.so.2.0.0 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libgbm.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libgbm.so new file mode 120000 index 00000000000..af8bd42fd32 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libgbm.so @@ -0,0 +1 @@ +/usr/lib/libgbm.so.1 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libgbm.so.1 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libgbm.so.1 new file mode 120000 index 00000000000..af8bd42fd32 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libgbm.so.1 @@ -0,0 +1 @@ +/usr/lib/libgbm.so.1 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so new file mode 120000 index 00000000000..61a3e5f7ed9 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so @@ -0,0 +1 @@ +libglapi.so.0 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so.0 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so.0 new file mode 120000 index 00000000000..9de66081e29 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so.0 @@ -0,0 +1 @@ +libglapi.so.0.0.0 \ No newline at end of file diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so.0.0.0 b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so.0.0.0 new file mode 100755 index 00000000000..aa3f00ea428 Binary files /dev/null and b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/libglapi.so.0.0.0 differ diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/dri.pc b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/dri.pc new file mode 100644 index 00000000000..d6d7d08cae5 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/dri.pc @@ -0,0 +1,10 @@ +prefix=/usr/local +includedir=${prefix}/include + +dridriverdir=/usr/local/lib/dri + +Name: dri +Description: Direct Rendering Infrastructure +Version: 24.0.1 +Requires.private: libdrm >= 2.4.109 +Cflags: -I${includedir} diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/egl.pc b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/egl.pc new file mode 100644 index 00000000000..99efb6df0ad --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/egl.pc @@ -0,0 +1,11 @@ +prefix=/usr/local +includedir=${prefix}/include +libdir=${prefix}/lib + +Name: egl +Description: Mesa EGL Library +Version: 24.0.1 +Requires.private: libdrm >= 2.4.75 +Libs: -L${libdir} -lEGL +Libs.private: -lpthread -pthread -lm -ldl +Cflags: -I${includedir} diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/gbm.pc b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/gbm.pc new file mode 100644 index 00000000000..6fe82ee3d9f --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/gbm.pc @@ -0,0 +1,12 @@ +prefix=/usr/local +includedir=${prefix}/include +libdir=${prefix}/lib + +gbmbackendspath=/usr/local/lib/gbm + +Name: gbm +Description: Mesa gbm library +Version: 24.0.1 +Libs: -L${libdir} -lgbm +Libs.private: -ldl +Cflags: -I${includedir} diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/glesv1_cm.pc b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/glesv1_cm.pc new file mode 100644 index 00000000000..17e7e80b82d --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/glesv1_cm.pc @@ -0,0 +1,10 @@ +prefix=/usr/local +includedir=${prefix}/include +libdir=${prefix}/lib + +Name: glesv1_cm +Description: Mesa OpenGL ES 1.1 CM library +Version: 24.0.1 +Libs: -L${libdir} -lGLESv1_CM +Libs.private: -lpthread -pthread -lm -ldl +Cflags: -I${includedir} diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/glesv2.pc b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/glesv2.pc new file mode 100644 index 00000000000..94448f06041 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/glesv2.pc @@ -0,0 +1,10 @@ +prefix=/usr/local +includedir=${prefix}/include +libdir=${prefix}/lib + +Name: glesv2 +Description: Mesa OpenGL ES 2.0 library +Version: 24.0.1 +Libs: -L${libdir} -lGLESv2 +Libs.private: -lpthread -pthread -lm -ldl +Cflags: -I${includedir} diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/vulkan.pc b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/vulkan.pc new file mode 100644 index 00000000000..2ddf8d5f9e1 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/lib/pkgconfig/vulkan.pc @@ -0,0 +1,10 @@ +prefix=/usr/local +exec_prefix=${prefix} +libdir=${exec_prefix}/lib +includedir=${prefix}/include + +Name: Vulkan-Loader +Description: Vulkan Loader +Version: 1.3.280 +Libs: -L${libdir} -lvulkan +Cflags: -I${includedir} diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/local/sbin/enable-powervr-gpu b/board/batocera/allwinner/a733/fsoverlay/usr/local/sbin/enable-powervr-gpu new file mode 100755 index 00000000000..dee3e74e30f --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/local/sbin/enable-powervr-gpu @@ -0,0 +1,134 @@ +#!/bin/sh +# +# enable-powervr-gpu — Install Radxa PowerVR DDK userspace for A733 BXM-4-64 +# +# Run once after first flash (SSH or serial console): +# /usr/local/sbin/enable-powervr-gpu +# +# Downloads Imagination's non-redistributable DDK from Radxa's package repo +# and installs it to /userdata (writable, persists across reboots). The image +# itself stays clean. Idempotent — re-running finishes a partial install. +# +# Validated on A733 hardware by NickAlilovic (Orange Pi 4 Pro): OpenCL, +# GLES2, Vulkan all load. DDK version 24.2 matches BVNC 36.56.104.183. + +set -e + +RADXA_BASE="https://radxa-repo.github.io/a733-bullseye" +DDK_URL="${RADXA_BASE}/pool/main/x/xserver-xorg-img-bxm-1.21.1-2.deb/xserver-xorg-img-bxm_1.21.1-2_arm64.deb" +DDK_SHA256="c8e606db1abdea40a5b97f7905ea86901b50c5fe1b76a55356ab70dde3304c3a" + +PVR_DIR="/userdata/system/lib/pvr" +FLAG_FILE="/userdata/system/pvr.enabled" + +log() { echo ">> $*"; printf '[enable-powervr-gpu] %s\n' "$*" > /dev/ttyAS0 2>/dev/null || true; } +die() { echo "ERROR: $*" >&2; exit 1; } + +# Re-run under sudo if not root +if [ "$(id -u)" -ne 0 ]; then + exec sudo -- "$0" "$@" +fi + +# Already installed? +if [ -f "$FLAG_FILE" ] && [ -d "$PVR_DIR/usr/lib" ]; then + log "PowerVR DDK already installed at $PVR_DIR" + log "Delete $FLAG_FILE to force reinstall." + exit 0 +fi + +# Verify pvrsrvkm is loaded (kernel module must be present) +if ! cat /proc/modules 2>/dev/null | grep -q '^pvrsrvkm'; then + log "pvrsrvkm not in /proc/modules — trying modprobe..." + modprobe pvrsrvkm 2>/dev/null || die "pvrsrvkm module not found. Check that pvrsrvkm.ko is in the kernel image." +fi +log "pvrsrvkm loaded: $(grep '^pvrsrvkm' /proc/modules | head -1)" + +# Verify network +if ! wget -q --spider --timeout=10 "$RADXA_BASE/" 2>/dev/null; then + die "No network access to $RADXA_BASE. Connect ethernet and retry." +fi + +log "Downloading Radxa PowerVR DDK userspace (27MB)..." +TMPDIR_LOCAL="$(mktemp -d)" +trap 'rm -rf "$TMPDIR_LOCAL"' EXIT + +wget -q --show-progress -O "$TMPDIR_LOCAL/pvr.deb" "$DDK_URL" \ + || curl -fL --progress-bar -o "$TMPDIR_LOCAL/pvr.deb" "$DDK_URL" \ + || die "Download failed from: $DDK_URL" + +# Verify checksum +ACTUAL_SHA="$(sha256sum "$TMPDIR_LOCAL/pvr.deb" | cut -d' ' -f1)" +if [ "$ACTUAL_SHA" != "$DDK_SHA256" ]; then + die "SHA256 mismatch — expected $DDK_SHA256, got $ACTUAL_SHA. Try again." +fi +log "Checksum OK" + +log "Extracting DDK to $PVR_DIR..." +mkdir -p "$PVR_DIR" + +# .deb is an ar archive; Batocera has Python 3 but not ar or dpkg-deb. +# Parse the ar format directly in Python to extract the data.tar member. +python3 - "$TMPDIR_LOCAL/pvr.deb" "$PVR_DIR" <<'PYEOF' +import sys, io, tarfile, os, struct + +deb_path, out_dir = sys.argv[1], sys.argv[2] +os.makedirs(out_dir, exist_ok=True) + +with open(deb_path, 'rb') as f: + magic = f.read(8) + if magic != b'!\n': + sys.exit("Not a valid .deb file (bad ar magic)") + + found = False + while True: + hdr = f.read(60) + if len(hdr) < 60: + break + name = hdr[0:16].decode('ascii', errors='replace').strip().rstrip('/') + size = int(hdr[48:58].decode('ascii').strip()) + data = f.read(size) + if size % 2: + f.read(1) # ar padding byte + + if name.startswith('data.tar'): + print(f" extracting {name} ({size // 1048576}MB)...", flush=True) + with tarfile.open(fileobj=io.BytesIO(data)) as tar: + tar.extractall(out_dir) + found = True + break + + if not found: + sys.exit("data.tar member not found in .deb — corrupt download?") + +print(" extraction complete", flush=True) +PYEOF + +log "Extraction done." + +# Find the actual lib directory (Radxa package puts libs in aarch64-linux-gnu) +LIB_PATH="$PVR_DIR/usr/lib/aarch64-linux-gnu" +if [ ! -d "$LIB_PATH" ]; then + # Fallback: look for libGLESv2 anywhere under PVR_DIR + LIB_PATH="$(find "$PVR_DIR" -name 'libGLESv2.so*' -printf '%h\n' 2>/dev/null | head -1)" + [ -n "$LIB_PATH" ] || die "Could not find GLES libs in extracted package." +fi +log "GLES libs at: $LIB_PATH" + +# Verify the EGL and GLES libraries are present +for lib in libEGL.so libGLESv2.so; do + if ! find "$LIB_PATH" -name "${lib}*" -maxdepth 2 | grep -q .; then + log "WARNING: $lib not found in $LIB_PATH" + fi +done + +# Write the flag file (contains the lib path for labwc-launch to read) +printf '%s\n' "$LIB_PATH" > "$FLAG_FILE" +log "Flag written: $FLAG_FILE" + +log "" +log "===================================================================" +log "PowerVR DDK installed. Reboot to activate GPU rendering." +log "labwc-launch will auto-detect and use WLR_RENDERER=gles2." +log "If labwc fails to start after reboot, delete $FLAG_FILE" +log "to fall back to software (pixman) rendering." +log "===================================================================" diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/share/labwc/autostart_sun60iw2 b/board/batocera/allwinner/a733/fsoverlay/usr/share/labwc/autostart_sun60iw2 new file mode 100755 index 00000000000..4ee0642a0f0 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/share/labwc/autostart_sun60iw2 @@ -0,0 +1,12 @@ +#!/bin/sh +# Play the Batocera splash video before EmulationStation. +# Runs via labwc autostart after the Wayland compositor is ready and the +# display is active — mpv renders fullscreen over Wayland so it is visible. + +SPLASH=/usr/share/batocera/splash/splash.mp4 +[ -f "$SPLASH" ] || exit 0 + +mpv --vo=gpu --gpu-context=wayland \ + --fs --really-quiet --no-terminal --no-input-default-bindings \ + --no-config --no-sub-auto \ + "$SPLASH" 2>/dev/null || true diff --git a/board/batocera/allwinner/a733/fsoverlay/usr/share/labwc/rc.xml b/board/batocera/allwinner/a733/fsoverlay/usr/share/labwc/rc.xml new file mode 100644 index 00000000000..da654a29d26 --- /dev/null +++ b/board/batocera/allwinner/a733/fsoverlay/usr/share/labwc/rc.xml @@ -0,0 +1,141 @@ + + + + server + 0 + yes + no + yes + no + no + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + + diff --git a/board/batocera/allwinner/a733/linux-defconfig-fragment.config b/board/batocera/allwinner/a733/linux-defconfig-fragment.config new file mode 100644 index 00000000000..96a58c8d4f9 --- /dev/null +++ b/board/batocera/allwinner/a733/linux-defconfig-fragment.config @@ -0,0 +1,205 @@ +# Wakeupgen is the root interrupt-parent in sun60iw2p1.dtsi — ALL pinctrl/GPIO interrupts +# route through it. Without this, platform_get_irq() for the PIO node returns EPROBE_DEFER +# forever, causing pinctrl/DMA/TWI/MMC to never probe and LABEL=BATOCERA to fail. +CONFIG_AW_WAKEUPGEN=y + +# intc-nmi@7010320 uses allwinner,sun8i-nmi — AXP8191 PMIC interrupt-parent. +# Without this, AXP8191 fails EPROBE_DEFER at 5 usecs (interrupt domain not found), +# its aldo1 regulator never registers, twi0 twi-supply fails at 0 usecs, sdc0 defers. +CONFIG_AW_SUN8I_NMI=y + +# BSP platform — required for ALL BSP drivers (CCU, MMC, display, USB) +# Chain: AW_BSP → AW_CCU → AW_SUN60IW2_CCU (auto via ARCH_SUN60IW2 default) +CONFIG_AW_BSP=y +CONFIG_AW_KERNEL_ORIGIN=y +CONFIG_ARCH_SUN60I=y +CONFIG_ARCH_SUN60IW2=y +CONFIG_AW_IC_BOARD=y +CONFIG_AW_SOC_NAME="A733" + +# disable mainline sunxi-ng CCU — BSP CCU replaces it (duplicate symbols) +CONFIG_SUNXI_CCU=n + +# mainline sunxi-mmc conflicts with BSP AW_MMC — both register as 'sunxi-mmc' +CONFIG_MMC_SUNXI=n + +# BSP input sensor init references irq_to_desc which is not exported +CONFIG_AW_INPUT_SENSORINIT=n + +# BSP MMC driver — matches allwinner,sunxi-mmc-v5p3x in the A733 DTS +CONFIG_AW_MMC_HSQ=y +CONFIG_AW_MMC=y +CONFIG_AW_MMC_V5P3X=y + +# Onboard Gigabit Ethernet — BSP STMMAC driver for allwinner,sunxi-gmac-210 +CONFIG_AW_STMMAC_ETH=y + +# MediaTek MT7921K PCIe WiFi (M.2 2230 dock streaming radio) +CONFIG_MT7921E=y + +# USB-A host controller — Allwinner BSP EHCI/OHCI for the physical USB-A port +CONFIG_USB_SUNXI_HCD=y +CONFIG_USB_SUNXI_HCI=y +CONFIG_USB_EHCI_HCD_SUNXI=y +CONFIG_USB_SUNXI_EHCI1=y +CONFIG_USB_OHCI_HCD_SUNXI=y +CONFIG_USB_SUNXI_OHCI1=y + +# USB HID — required for USB gamepads, keyboards, and mice +CONFIG_USB_HID=y +CONFIG_HID_GENERIC=y +CONFIG_HIDRAW=y + +# Joystick/gamepad input — required for controllers in EmulationStation +# JOYSTICK_XPAD: handles 8BitDo and other gamepads in X-input (Xbox) mode +# JOYSTICK_HIDRAW: raw HID fallback for gamepads not allowed by specific drivers +# XPAD_FF + XPAD_LEDS disabled: both send interrupt OUT (EP2) traffic during probe. +# 8BitDo SN30 Pro+ (masquerading as 045e:028e) NAKs LED commands; the 6.6 BSP +# irq_out_cancel_work then calls usb_kill_urb, causing disconnect every ~7s. +# Only irq_in (button data) is needed — disabling both eliminates all irq_out traffic. +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=n +CONFIG_JOYSTICK_XPAD_LEDS=n +CONFIG_JOYSTICK_HIDRAW=y + +# required for evmapy +CONFIG_INPUT_UINPUT=y + +# required for squashfs + overlayfs + tmpfs (initramfs overlay mount) +CONFIG_NLS_ISO8859_1=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_OVERLAY_FS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_ZSTD=y + +# required for AIC8800 USB WiFi +CONFIG_USB_NET_DRIVERS=y +CONFIG_USB_USBNET=y + +# disable Broadcom SDIO WiFi — not present (uses AIC8800 USB); bcmdhd references +# sunxi_wlan_* symbols not built, causing modpost errors +CONFIG_BCMDHD=n + +# mainline MFD AXP20X conflicts with BSP AW_MFD_AXP2101 — duplicate axp20x_* symbols +CONFIG_MFD_AXP20X=n +CONFIG_MFD_AXP20X_I2C=n +CONFIG_MFD_AXP20X_RSB=n + +# AXP8191 PMIC driver chain +# AW_DMA: BSP DMA driver — required by AW_TWI (Kconfig dependency) +# AW_TWI: BSP I2C driver matching allwinner,sunxi-twi-v101 +# AW_MFD_AXP2101_I2C: MFD driver that recognizes x-powers,axp8191 +# AW_REGULATOR_AXP2101: exposes regulators to the regulator framework +CONFIG_AW_DMA=y +CONFIG_AW_TWI=y +CONFIG_AW_MFD_AXP2101_I2C=y +CONFIG_AW_REGULATOR_AXP2101=y + +# Enables the sysfs edid_override node on DRM connectors so labwc-launch can +# write a corrected EDID for displays with broken range descriptors (e.g. TCL +# SmartGlasses capping at 65Hz despite encoding 120Hz DTDs in their EDID). +CONFIG_DRM_LOAD_EDID_FIRMWARE=y + +# BSP DRM/KMS display stack — USB-C DisplayPort output +# Pipeline: DE(5000000) → TCON4(5731000) → eDP0(5740000) → Cadence SERDES → USB-C +CONFIG_DRM=y +CONFIG_AW_PCK600_DOMAINS=y +CONFIG_AW_DRM=y +CONFIG_AW_DRM_DE=y +CONFIG_AW_DRM_TCON=y +CONFIG_AW_DRM_TCON_TV=y +CONFIG_AW_DRM_TCON_TOP=y +CONFIG_AW_DRM_EDP=y +CONFIG_AW_DRM_TRILINEAR_EDP14=y +CONFIG_AW_CADENCE_COMBOPHY=y +CONFIG_TYPEC_MUX_SUNXI_PHY_SWITCHER=y + +# HUSB311 TypeC controller — required for USB-C DP Alt Mode negotiation +# AW_TYPEC_HUSB311 selects TYPEC_TCPM, TYPEC_TCPCI, USB_SUNXI_TYPEC, AW_POWER_NOTIFIER +CONFIG_AW_TYPEC_HUSB311=y +# TYPEC core must be =y (not =m) — TCPCI/TCPM can't link built-in into a module framework +CONFIG_TYPEC=y +CONFIG_TYPEC_DP_ALTMODE=y + +# USB_SUNXI_DWC3: BSP gate for the Allwinner USB3 DWC3 glue stack +# usbc2@12 uses compatible "allwinner,sunxi-plat-dwc3" (DWC3_SUNXI_PLAT) +# HUSB311 defers forever if the DWC3 role-switch endpoint it references never probes +CONFIG_USB_SUNXI_DWC3=y +CONFIG_DWC3_SUNXI_PLAT=y +CONFIG_PHY_SUNXI_PLAT=y + +# DWC3 OTG + USB role switching — required for USB-C DP Alt Mode +# Without USB_DWC3_DUAL_ROLE, the DWC3 core (core.c dwc3_core_init_mode) prints +# "Configuration mismatch. dr_mode forced to host" even when DTS has dr_mode="otg". +# The role-switch endpoint (dwc3_0_role_switch) is never registered → HUSB311 gets +# EPROBE_DEFER forever from usb_role_switch_get() → combophy never switches to DP. +# +# USB_DWC3_DUAL_ROLE has "depends on USB_GADGET" in Kconfig — without USB_GADGET=y, +# olddefconfig silently falls back to USB_DWC3_HOST=y even if DUAL_ROLE=y is in the +# fragment. USB_GADGET enables the Linux USB device/gadget framework (zero overhead +# when no gadget function is configured). +CONFIG_USB_GADGET=y +CONFIG_USB_DWC3_DUAL_ROLE=y +CONFIG_USB_ROLE_SWITCH=y +# TCPM/TCPCI must be =y (not =m) — AW_TYPEC_HUSB311 is built-in and depends on them +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_TCPCI=y + +# ============================================================================= +# Audio — BSP I2S/AV codec stack for USB-C DisplayPort audio output +# +# Audio path: RetroArch/ES → ALSA → I2S3 (sunxi-snd-plat-i2s) → trilinear eDP14 +# hardware → embedded in DP stream → USB-C cable → TV/display +# +# SND_SOC_SUNXI_I2S: BSP I2S DMA platform driver — handles i2s3_plat node +# (allwinner,sunxi-snd-plat-i2s). Auto-selects PCM, MACH, COMMON. +# SND_SOC_SUNXI_CODEC_AV: AV codec driver — matches the "sunxi-snd-codec-av" +# platform device dynamically created by the DRM EDP driver during probe. +# The machine driver (i2s3_mach) references this via sound-dai = <&edp0>; +# the ALSA framework resolves it via parent OF node fallback (soc-core.c:806). +# Without this module, snd_soc_of_get_dai_link_codecs returns -EPROBE_DEFER +# forever → i2s3_mach never registers → aplay -l shows "no soundcards found". +# MODULE_ALIAS("platform:sunxi-snd-codec-av") was added to the BSP source so +# udev auto-loads it when the DRM EDP driver creates the platform device. +# SND_SOC_SUNXI_CODEC_HDMI: HDMI audio codec — needed for hdmi_codec node +# (allwinner,sunxi-snd-codec-hdmi); kept for completeness. +# SND_SOC_SUNXI_COMPONENTS: function components shared across BSP audio drivers. +# ============================================================================= +CONFIG_SND_SOC_SUNXI_I2S=m +CONFIG_SND_SOC_SUNXI_CODEC_AV=m +CONFIG_SND_SOC_SUNXI_CODEC_HDMI=m +CONFIG_SND_SOC_SUNXI_COMPONENTS=m + +# ============================================================================= +# Disable BSP drivers not needed for EmulationStation bringup +# +# AW_VIDEO_ENCODER_DECODER: cedar-ve hardware video codec — default y in Kconfig +# but cedar_ve.h is generated by the Allwinner SDK and not in the BSP git tree. +# Hardware video decode is not required for EmulationStation/RetroArch bringup. +# AW_VIDEO_GOOGLE_DECODER: google VP9/AV1 decoder — same situation, not needed. +# ============================================================================= +CONFIG_AW_VIDEO_ENCODER_DECODER=n +CONFIG_AW_VIDEO_GOOGLE_DECODER=n + +# ============================================================================= +# GPU — Imagination PowerVR BXM-4-64 MC1 +# pvrsrvkm.ko is built automatically when bsp/ is present (bsp/modules/gpu/). +# Disable conflicting DRM drivers from the base defconfig. +# DEVFREQ_GOV_SIMPLE_ONDEMAND: required for GPU DVFS support in pvrsrvkm. +# ============================================================================= + +# Disable mainline DRM drivers that conflict with BSP GPU (base defconfig enables these) +CONFIG_DRM_PANFROST=n +CONFIG_DRM_LIMA=n +# Disable upstream open PowerVR driver if present — we use the BSP pvrsrvkm instead +CONFIG_DRM_IMAGINATION=n + +# GPU DVFS governor — pvrsrvkm checks for this at init +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y + +# CMA — Contiguous Memory Allocator required for DRM dumb buffer at 1920x1080. +# cma=128M on cmdline is silently ignored if CONFIG_CMA is not compiled in. +CONFIG_CMA=y +CONFIG_DMA_CMA=y diff --git a/board/batocera/allwinner/a733/linux-defconfig.config b/board/batocera/allwinner/a733/linux-defconfig.config new file mode 100644 index 00000000000..bb8f11f5192 --- /dev/null +++ b/board/batocera/allwinner/a733/linux-defconfig.config @@ -0,0 +1,282 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT=y +CONFIG_PREEMPT=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_NUMA_BALANCING=y +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_USER_NS=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PROFILING=y +CONFIG_ARCH_SUNXI=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +CONFIG_COMPAT=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_ENERGY_MODEL=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPUFREQ_DT=y +CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=m +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_IOSCHED_BFQ=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_KSM=y +CONFIG_MEMORY_FAILURE=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IPV6=m +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_MANGLE=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=m +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_FLOWER=m +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_GACT=m +CONFIG_NET_ACT_MIRRED=m +CONFIG_BT=m +CONFIG_BT_HIDP=m +# CONFIG_BT_LE is not set +CONFIG_BT_LEDS=y +# CONFIG_BT_DEBUGFS is not set +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTUSB_MTK=y +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_BCM=y +CONFIG_CFG80211=m +CONFIG_MAC80211=m +CONFIG_MAC80211_LEDS=y +CONFIG_RFKILL=m +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_MTD=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_SPI_NOR=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_VIRTIO_BLK=y +CONFIG_BLK_DEV_NVME=m +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_NETDEVICES=y +CONFIG_TUN=y +CONFIG_VIRTIO_NET=y +CONFIG_MACB=y +CONFIG_E1000=y +CONFIG_E1000E=y +CONFIG_IGB=y +CONFIG_STMMAC_ETH=m +CONFIG_R8169=m +CONFIG_SMC91X=y +CONFIG_SMSC911X=y +CONFIG_MICREL_PHY=y +CONFIG_AT803X_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_MT7921E=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8152=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_MISC=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_LEGACY_PTY_COUNT=16 +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_SPI=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_GPIO_PL061=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_SENSORS_GPIO_FAN=m +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y +CONFIG_CPU_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_SUN8I_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_DW_WATCHDOG=y +CONFIG_SUNXI_WATCHDOG=m +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_AXP20X_RSB=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_GPIO=y +CONFIG_RC_CORE=m +CONFIG_RC_DECODERS=y +CONFIG_RC_DEVICES=y +CONFIG_IR_SUNXI=m +CONFIG_DRM=m +CONFIG_DRM_SUN4I=m +CONFIG_DRM_SUN6I_DSI=m +CONFIG_DRM_SUN8I_DW_HDMI=m +CONFIG_DRM_SUN8I_MIXER=m +CONFIG_DRM_PANFROST=m +CONFIG_DRM_LIMA=m +CONFIG_FB=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_ALOOP=m +CONFIG_SND_SOC=y +CONFIG_SND_SUN8I_CODEC=m +CONFIG_SND_SUN8I_CODEC_ANALOG=m +CONFIG_SND_SUN50I_CODEC_ANALOG=m +CONFIG_SND_SUN4I_I2S=m +CONFIG_SND_SUN4I_SPDIF=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_ACM=m +CONFIG_USB_STORAGE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC2=y +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SUNXI=y +CONFIG_TYPEC=m +CONFIG_TYPEC_TCPM=m +CONFIG_TYPEC_TCPCI=m +CONFIG_TYPEC_FUSB302=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +CONFIG_MMC_SUNXI=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_SUN6I=y +CONFIG_DMADEVICES=y +CONFIG_DMA_SUN6I=m +CONFIG_PL330_DMA=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_BALLOON=y +CONFIG_VIRTIO_MMIO=y +CONFIG_PHY_SUN4I_USB=y +CONFIG_NVMEM_SUNXI_SID=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_AUTOFS_FS=y +CONFIG_OVERLAY_FS=m +CONFIG_VFAT_FS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_CONFIGFS_FS=y +CONFIG_SQUASHFS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_SECURITY=y +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y +CONFIG_DEBUG_INFO_REDUCED=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_FTRACE is not set +CONFIG_MEMTEST=y diff --git a/board/batocera/allwinner/a733/patches/.gitkeep b/board/batocera/allwinner/a733/patches/.gitkeep new file mode 100644 index 00000000000..e69de29bb2d diff --git a/board/batocera/allwinner/a733/patches/cpuinfo/0001-cmake-disable-tests-and-benchmarks-by-default.patch b/board/batocera/allwinner/a733/patches/cpuinfo/0001-cmake-disable-tests-and-benchmarks-by-default.patch new file mode 100644 index 00000000000..19f908afb6b --- /dev/null +++ b/board/batocera/allwinner/a733/patches/cpuinfo/0001-cmake-disable-tests-and-benchmarks-by-default.patch @@ -0,0 +1,28 @@ +From: Jason Germino +Date: Sun, 11 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: disable tests and benchmarks by default + +Building tests and benchmarks triggers ExternalProject downloads of +googletest and googlebenchmark at cmake configure time. Those bundled +projects have cmake_minimum_required < 3.5, which CMake 4.0 rejects, +and the sub-cmake is invoked directly (not via the compat wrapper), so +the policy workaround doesn't reach them. + +Disable all three options by default so configure skips the downloads +entirely. They can still be re-enabled explicitly if needed. +--- + CMakeLists.txt | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/CMakeLists.txt b/CMakeLists.txt +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -22,6 +22,6 @@ + OPTION(CPUINFO_BUILD_TOOLS "Build command-line tools" ON) +-OPTION(CPUINFO_BUILD_UNIT_TESTS "Build cpuinfo unit tests" ON) +-OPTION(CPUINFO_BUILD_MOCK_TESTS "Build cpuinfo mock tests" ON) +-OPTION(CPUINFO_BUILD_BENCHMARKS "Build cpuinfo micro-benchmarks" ON) ++OPTION(CPUINFO_BUILD_UNIT_TESTS "Build cpuinfo unit tests" OFF) ++OPTION(CPUINFO_BUILD_MOCK_TESTS "Build cpuinfo mock tests" OFF) ++OPTION(CPUINFO_BUILD_BENCHMARKS "Build cpuinfo micro-benchmarks" OFF) + OPTION(CPUINFO_BUILD_PKG_CONFIG "Build pkg-config manifest" ON) diff --git a/board/batocera/allwinner/a733/patches/eduke32/0001-Common.mak-use-pkg-config-for-SDL2-in-cross-compile.patch b/board/batocera/allwinner/a733/patches/eduke32/0001-Common.mak-use-pkg-config-for-SDL2-in-cross-compile.patch new file mode 100644 index 00000000000..3cc474ca029 --- /dev/null +++ b/board/batocera/allwinner/a733/patches/eduke32/0001-Common.mak-use-pkg-config-for-SDL2-in-cross-compile.patch @@ -0,0 +1,23 @@ +From: Jason Germino +Date: Wed, 14 May 2026 00:00:00 +0000 +Subject: [PATCH] Common.mak: use PKG_CONFIG for SDL2 flags in cross-compile + +When cross-compiling, sdl2-config is the host tool and returns host +paths like -I/usr/include/SDL2. The Buildroot cross-compiler wrapper +rejects these as unsafe header paths. + +Use $(PKG_CONFIG) (set by Buildroot to the sysroot-aware wrapper) +with a fallback to $(SDLCONFIG) for native builds. The target SDL2 +headers are already present in the cross-compile sysroot. +--- + Common.mak | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/Common.mak b/Common.mak +--- a/Common.mak ++++ b/Common.mak +@@ -948,4 +948,4 @@ +- SDLCONFIG_CFLAGS := $(strip $(subst -Dmain=SDL_main,,$(shell $(SDLCONFIG) --cflags))) +- SDLCONFIG_LIBS := $(strip $(subst -mwindows,,$(shell $(SDLCONFIG) --libs))) ++ SDLCONFIG_CFLAGS := $(strip $(subst -Dmain=SDL_main,,$(shell $(PKG_CONFIG) --cflags sdl2 2>/dev/null || $(SDLCONFIG) --cflags))) ++ SDLCONFIG_LIBS := $(strip $(subst -mwindows,,$(shell $(PKG_CONFIG) --libs sdl2 2>/dev/null || $(SDLCONFIG) --libs))) diff --git a/board/batocera/allwinner/a733/patches/gzdoom/0001-cmake-re-enable-revision_check-to-generate-gitinfo.h.patch b/board/batocera/allwinner/a733/patches/gzdoom/0001-cmake-re-enable-revision_check-to-generate-gitinfo.h.patch new file mode 100644 index 00000000000..de9194d5ed9 --- /dev/null +++ b/board/batocera/allwinner/a733/patches/gzdoom/0001-cmake-re-enable-revision_check-to-generate-gitinfo.h.patch @@ -0,0 +1,27 @@ +From: Jason Germino +Date: Wed, 14 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: re-enable revision_check to generate gitinfo.h + +The revision_check custom target was commented out, leaving gitinfo.h +never generated. gitinfo.cpp includes it unconditionally, so the build +fails with "gitinfo.h: No such file or directory". + +Uncomment the target so cmake generates gitinfo.h at build time via +UpdateRevision.cmake, which gracefully falls back to hash "0000000" +when git is unavailable (e.g. in a Buildroot extracted source tree). +--- + src/CMakeLists.txt | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt +--- a/src/CMakeLists.txt ++++ b/src/CMakeLists.txt +@@ -315,4 +315,4 @@ +-#add_custom_target( revision_check ALL +-# COMMAND "${CMAKE_COMMAND}" -P "${CMAKE_SOURCE_DIR}/tools/updaterevision/UpdateRevision.cmake" src/gitinfo.h +-# WORKING_DIRECTORY ${CMAKE_SOURCE_DIR} +-#) ++add_custom_target( revision_check ALL ++ COMMAND "${CMAKE_COMMAND}" -P "${CMAKE_SOURCE_DIR}/tools/updaterevision/UpdateRevision.cmake" src/gitinfo.h ++ WORKING_DIRECTORY ${CMAKE_SOURCE_DIR} ++) diff --git a/board/batocera/allwinner/a733/patches/host-clang/0001-cmake-enable-position-independent-code-globally.patch b/board/batocera/allwinner/a733/patches/host-clang/0001-cmake-enable-position-independent-code-globally.patch new file mode 100644 index 00000000000..c14826393ec --- /dev/null +++ b/board/batocera/allwinner/a733/patches/host-clang/0001-cmake-enable-position-independent-code-globally.patch @@ -0,0 +1,24 @@ +From: Jason Germino +Date: Sun, 11 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: enable position-independent code globally + +Clang static libraries are compiled without -fPIC by default, but +LLVM_BUILD_LLVM_DYLIB=ON causes libclang.so and libclang-cpp.so to be +built from those static library objects. The linker rejects non-PIC +vtable relocations (R_X86_64_PC32) and TLS relocations (R_X86_64_TPOFF32): + + relocation R_X86_64_PC32 against symbol can not be used when making + a shared object; recompile with -fPIC + +Setting CMAKE_POSITION_INDEPENDENT_CODE globally causes cmake to add +-fPIC to all compilations, making the static library objects safe to +link into shared libraries. +--- + CMakeLists.txt | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/CMakeLists.txt b/CMakeLists.txt +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -1,0 +1,1 @@ ++set(CMAKE_POSITION_INDEPENDENT_CODE ON) diff --git a/board/batocera/allwinner/a733/patches/host-llvm/0001-CrashRecoveryContext-use-initial-exec-TLS-for-shared.patch b/board/batocera/allwinner/a733/patches/host-llvm/0001-CrashRecoveryContext-use-initial-exec-TLS-for-shared.patch new file mode 100644 index 00000000000..56294dfdcbd --- /dev/null +++ b/board/batocera/allwinner/a733/patches/host-llvm/0001-CrashRecoveryContext-use-initial-exec-TLS-for-shared.patch @@ -0,0 +1,24 @@ +From: Jason Germino +Date: Sun, 11 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: enable position-independent code globally + +LLVM static libraries are compiled without -fPIC by default, but +LLVM_BUILD_LLVM_DYLIB=ON (set by Buildroot's llvm.mk) links them all +into libLLVM.so. The linker rejects the resulting non-PIC relocations: + + R_X86_64_TPOFF32 (local-exec TLS) and R_X86_64_PC32 (vtables) + can not be used when making a shared object; recompile with -fPIC + +Setting CMAKE_POSITION_INDEPENDENT_CODE globally after project() causes +cmake to add -fPIC to all compilations, making the static library objects +safe to link into shared libraries. +--- + CMakeLists.txt | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/CMakeLists.txt b/CMakeLists.txt +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -46,0 +46,2 @@ ++ ++set(CMAKE_POSITION_INDEPENDENT_CODE ON) diff --git a/board/batocera/allwinner/a733/patches/host-xxd/0001-xxd-remove-redundant-K-R-extern-declarations.patch b/board/batocera/allwinner/a733/patches/host-xxd/0001-xxd-remove-redundant-K-R-extern-declarations.patch new file mode 100644 index 00000000000..f4d9ac9bb1c --- /dev/null +++ b/board/batocera/allwinner/a733/patches/host-xxd/0001-xxd-remove-redundant-K-R-extern-declarations.patch @@ -0,0 +1,26 @@ +From: Jason Germino +Date: Wed, 14 May 2026 00:00:00 +0000 +Subject: [PATCH] xxd: remove redundant K&R extern declarations for strtol/ftell + +GCC 15 defaults to C23, where an empty parameter list () means the +function takes no arguments. The old K&R-style declarations: + + extern long int strtol(); + extern long int ftell(); + +are therefore interpreted as "takes no arguments", conflicting with +every call site that passes arguments. Both functions are already +properly declared via the included and ; remove +the redundant extern lines. +--- + xxd.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/xxd.c b/xxd.c +--- a/xxd.c ++++ b/xxd.c +@@ -142,4 +142,2 @@ +-extern long int strtol(); +-extern long int ftell(); +- + char version[] = "xxd v1.11, 8 jun 2013 by Juergen Weigert et al."; diff --git a/board/batocera/allwinner/a733/patches/libretro-melonds/0001-Makefile-detect-target-arch-from-cross-compiler.patch b/board/batocera/allwinner/a733/patches/libretro-melonds/0001-Makefile-detect-target-arch-from-cross-compiler.patch new file mode 100644 index 00000000000..de8f51bda69 --- /dev/null +++ b/board/batocera/allwinner/a733/patches/libretro-melonds/0001-Makefile-detect-target-arch-from-cross-compiler.patch @@ -0,0 +1,29 @@ +From: Jason Germino +Date: Mon, 12 May 2026 00:00:00 +0000 +Subject: [PATCH] Makefile: detect target arch from cross-compiler prefix + +When cross-compiling, uname -m returns the HOST architecture (x86_64), +not the target. This causes the unix platform block to enable desktop +OpenGL (-lGL, -DHAVE_OPENGL) and set ARCHITECTURE_X64, which then +requires GL/gl.h — absent from the aarch64 cross-compile sysroot. + +Check the CC prefix first so that aarch64 cross-builds correctly set +ARCH=aarch64, skipping desktop GL and using the aarch64 JIT path. +--- + Makefile | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/Makefile b/Makefile +--- a/Makefile ++++ b/Makefile +@@ -49,3 +49,9 @@ + ifeq (,$(ARCH)) +- ARCH = $(shell uname -m) ++ ifneq (,$(findstring aarch64,$(CC))) ++ ARCH = aarch64 ++ else ifneq (,$(findstring arm,$(CC))) ++ ARCH = arm ++ else ++ ARCH = $(shell uname -m) ++ endif + endif diff --git a/board/batocera/allwinner/a733/patches/libretro-mgba/0001-cmake-disable-markdown-readme-generation.patch b/board/batocera/allwinner/a733/patches/libretro-mgba/0001-cmake-disable-markdown-readme-generation.patch new file mode 100644 index 00000000000..9157b184819 --- /dev/null +++ b/board/batocera/allwinner/a733/patches/libretro-mgba/0001-cmake-disable-markdown-readme-generation.patch @@ -0,0 +1,24 @@ +From: Jason Germino +Date: Mon, 12 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: disable markdown README generation + +In the Flatpak build environment the host markdown binary is visible at +/run/host/usr/bin/markdown but requires libmarkdown.so.3 which is not +present inside the Flatpak sandbox. cmake finds the binary via +find_program(), generates ALL targets for each README*.html, and the +build then fails at runtime with: + + markdown: error while loading shared libraries: libmarkdown.so.3 + +Force MARKDOWN to empty so the if(MARKDOWN) guard skips HTML generation +entirely. The source .md files are still installed as fallback. +--- + CMakeLists.txt | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/CMakeLists.txt b/CMakeLists.txt +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -1126,1 +1126,1 @@ +-find_program(MARKDOWN NAMES markdown kramdown pandoc) ++set(MARKDOWN "" CACHE FILEPATH "markdown converter" FORCE) diff --git a/board/batocera/allwinner/a733/patches/libretro-yabasanshiro/0001-Makefile-detect-target-arch-from-cross-compiler.patch b/board/batocera/allwinner/a733/patches/libretro-yabasanshiro/0001-Makefile-detect-target-arch-from-cross-compiler.patch new file mode 100644 index 00000000000..db5dd01de3b --- /dev/null +++ b/board/batocera/allwinner/a733/patches/libretro-yabasanshiro/0001-Makefile-detect-target-arch-from-cross-compiler.patch @@ -0,0 +1,35 @@ +From: Jason Germino +Date: Tue, 13 May 2026 00:00:00 +0000 +Subject: [PATCH] Makefile: detect target arch from cross-compiler prefix + +When cross-compiling, uname -a returns the HOST kernel string (Linux +x86_64), so platform defaults to unix without any ARM flags. This +leaves FORCE_GLES=0, causing Makefile.common to link -lGL and define +-DHAVE_LIBGL unconditionally, which pulls in GL/gl.h — absent from the +aarch64 cross-compile sysroot. + +Check the CC prefix after platform detection so that aarch64 +cross-builds set FORCE_GLES=1 (GLES3 path), USE_AARCH64_DRC=1, and +disable HAVE_SSE, matching the intent of the explicit arm64 platform +case. +--- + yabause/src/libretro/Makefile | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/yabause/src/libretro/Makefile b/yabause/src/libretro/Makefile +--- a/yabause/src/libretro/Makefile ++++ b/yabause/src/libretro/Makefile +@@ -49,3 +49,12 @@ + else ifneq (,$(findstring armv,$(platform))) + override platform += unix + endif ++ ++ifeq ($(platform),unix) ++ ifneq (,$(findstring aarch64,$(CC))) ++ FORCE_GLES = 1 ++ USE_AARCH64_DRC = 1 ++ DYNAREC_DEVMIYAX = 1 ++ HAVE_SSE = 0 ++ FLAGS += -DAARCH64 ++ endif ++endif diff --git a/board/batocera/allwinner/a733/patches/od-commander/0001-cmake-generate-fontconfig.h-to-avoid-shell-brace-exp.patch b/board/batocera/allwinner/a733/patches/od-commander/0001-cmake-generate-fontconfig.h-to-avoid-shell-brace-exp.patch new file mode 100644 index 00000000000..a834f1d9b7b --- /dev/null +++ b/board/batocera/allwinner/a733/patches/od-commander/0001-cmake-generate-fontconfig.h-to-avoid-shell-brace-exp.patch @@ -0,0 +1,51 @@ +From: Jason Germino +Date: Wed, 14 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: generate fontconfig.h to avoid shell brace-expansion + +FONTS and LOW_DPI_FONTS are passed as cmake compile definitions whose +values contain {"/path",size} compound initializer syntax. When make +passes the resulting -DFONTS={...},{...} flag to the shell, bash +performs brace expansion and splits the single flag into multiple +tokens including bare integers (e.g. -DFONTS=10). GCC then rejects +the use of integer 10 where const char* is expected. + +Fix: write the values to a generated fontconfig.h at cmake configure +time (before any shell is involved) and include that header in +resourceManager.cpp. The -DFONTS/-DLOW_DPI_FONTS compile definitions +are removed from the target so the shell never sees the braces. +--- + CMakeLists.txt | 13 +++++++++++++ + resourceManager.cpp | 1 + + 2 files changed, 14 insertions(+) + +diff --git a/CMakeLists.txt b/CMakeLists.txt +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -224,6 +224,15 @@ endif() + ++# Write FONTS and LOW_DPI_FONTS to a header to avoid bash brace-expansion ++# of -DFONTS={...},{...} flags when make passes them through the shell. ++if(DEFINED FONTS OR DEFINED LOW_DPI_FONTS) ++ file(WRITE "${CMAKE_BINARY_DIR}/fontconfig.h" ++ "#pragma once\n" ++ "#ifndef FONTS\n#define FONTS ${FONTS}\n#endif\n" ++ "#ifndef LOW_DPI_FONTS\n#define LOW_DPI_FONTS ${LOW_DPI_FONTS}\n#endif\n" ++ ) ++ target_include_directories(${BIN_TARGET} PRIVATE "${CMAKE_BINARY_DIR}") ++endif() ++ + # These variables are passed as C macro definitons if they exist. + foreach( + def_name +@@ -233,8 +242,6 @@ foreach( + RES_DIR +- FONTS +- LOW_DPI_FONTS + FILE_SYSTEM + +diff --git a/resourceManager.cpp b/resourceManager.cpp +--- a/resourceManager.cpp ++++ b/resourceManager.cpp +@@ -9,0 +9,1 @@ ++#include "fontconfig.h" + #include "resourceManager.h" diff --git a/board/batocera/allwinner/a733/patches/opencv4/0001-cmake-bump-OpenCVGenPkgconfig-minimum-version-to-3.5.patch b/board/batocera/allwinner/a733/patches/opencv4/0001-cmake-bump-OpenCVGenPkgconfig-minimum-version-to-3.5.patch new file mode 100644 index 00000000000..243d65c1338 --- /dev/null +++ b/board/batocera/allwinner/a733/patches/opencv4/0001-cmake-bump-OpenCVGenPkgconfig-minimum-version-to-3.5.patch @@ -0,0 +1,18 @@ +From: Jason Germino +Date: Fri, 09 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: bump OpenCVGenPkgconfig minimum version to 3.5 + +OpenCVGenPkgconfig.cmake is invoked as a cmake -P script during the +build phase. CMake 4.0 removed compatibility with cmake_minimum_required +< 3.5, so the script aborts with an error before generating opencv4.pc. +Bump the version requirement to 3.5 to match CMake 4.0+ requirements. +--- + cmake/OpenCVGenPkgconfig.cmake | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/cmake/OpenCVGenPkgconfig.cmake b/cmake/OpenCVGenPkgconfig.cmake +--- a/cmake/OpenCVGenPkgconfig.cmake ++++ b/cmake/OpenCVGenPkgconfig.cmake +@@ -113,1 +113,1 @@ +-cmake_minimum_required(VERSION 2.8.12.2) ++cmake_minimum_required(VERSION 3.5) diff --git a/board/batocera/allwinner/a733/patches/qemu/0001-linux-user-guard-sched_attr-redefinition-with-newer-.patch b/board/batocera/allwinner/a733/patches/qemu/0001-linux-user-guard-sched_attr-redefinition-with-newer-.patch new file mode 100644 index 00000000000..a15a4f9a1dd --- /dev/null +++ b/board/batocera/allwinner/a733/patches/qemu/0001-linux-user-guard-sched_attr-redefinition-with-newer-.patch @@ -0,0 +1,38 @@ +From: Jason Germino +Date: Fri, 09 May 2026 00:00:00 +0000 +Subject: [PATCH] linux-user: guard sched_attr against redefinition with newer kernel headers + +GCC 15 / Flatpak SDK ships Linux headers that expose struct sched_attr +via , pulled in through: + syscall.c -> qemu/osdep.h -> glib-compat.h -> glib.h -> + glib/deprecated/gthread.h -> pthread.h -> sched.h -> + bits/sched.h -> linux/sched/types.h + +syscall.c defined struct sched_attr unconditionally ("sched_attr is not +defined in glibc"), but that comment is no longer true with newer SDKs. +Guard with SCHED_ATTR_SIZE_VER0, which linux/sched/types.h always +defines alongside the struct. +--- + linux-user/syscall.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/linux-user/syscall.c b/linux-user/syscall.c +--- a/linux-user/syscall.c ++++ b/linux-user/syscall.c +@@ -360,7 +360,9 @@ _syscall3(int, sys_sched_setaffinity, pid_t, pid, unsigned int, len, + unsigned long *, user_mask_ptr); +-/* sched_attr is not defined in glibc */ +-struct sched_attr { ++/* sched_attr may already be defined via linux/sched/types.h in newer SDKs */ ++#ifndef SCHED_ATTR_SIZE_VER0 ++struct sched_attr { + uint32_t size; + uint32_t sched_policy; + uint64_t sched_flags; +@@ -370,6 +372,7 @@ struct sched_attr { + uint64_t sched_period; + uint32_t sched_util_min; + uint32_t sched_util_max; + }; ++#endif + #define __NR_sys_sched_getattr __NR_sched_getattr diff --git a/board/batocera/allwinner/a733/patches/wlroots/0001-egl-add-DRM_FORMAT_MOD_INVALID-to-render-formats-unco.patch b/board/batocera/allwinner/a733/patches/wlroots/0001-egl-add-DRM_FORMAT_MOD_INVALID-to-render-formats-unco.patch new file mode 100644 index 00000000000..dff271fe5bc --- /dev/null +++ b/board/batocera/allwinner/a733/patches/wlroots/0001-egl-add-DRM_FORMAT_MOD_INVALID-to-render-formats-unco.patch @@ -0,0 +1,53 @@ +From: Jason Germino +Date: Thu, 03 Jul 2026 00:00:00 +0000 +Subject: [PATCH 1/2] egl: add DRM_FORMAT_MOD_INVALID to render formats unconditionally + +PowerVR DDK 24.x reports all explicit modifiers as external_only=true, +so the original condition (modifiers_len==0 || !all_external_only) never +adds DRM_FORMAT_MOD_INVALID to dmabuf_render_formats. This leaves the +render format set empty, causing every wlroots format check to fail with +"Renderer doesn't support format". + +Add INVALID unconditionally — the driver can still render with implicit +modifiers even when all explicit modifiers are external-only. Also add +LINEAR unconditionally when modifiers_len==0 (driver doesn't advertise +modifiers), consistent with the original intent for modifier-less drivers. + +--- + render/egl.c | 18 +++++++----------- + 1 file changed, 7 insertions(+), 11 deletions(-) + +diff --git a/render/egl.c b/render/egl.c +index 1111111..2222222 100644 +--- a/render/egl.c ++++ b/render/egl.c +@@ -134,23 +134,19 @@ static void egl_init_formats(struct wlr_egl *egl) { + has_modifiers = has_modifiers || modifiers_len > 0; + +- bool all_external_only = true; + for (int j = 0; j < modifiers_len; j++) { + wlr_drm_format_set_add(&egl->dmabuf_texture_formats, fmt, + modifiers[j]); + if (!external_only[j]) { + wlr_drm_format_set_add(&egl->dmabuf_render_formats, fmt, + modifiers[j]); +- all_external_only = false; + } + } + +- // EGL always supports implicit modifiers. If at least one modifier supports rendering, +- // assume the implicit modifier supports rendering too. ++ // EGL always supports implicit modifiers. Add INVALID unconditionally — ++ // even when all explicit modifiers are external-only (e.g. PVR DDK 24.x), ++ // the driver can still render with implicit modifiers. + wlr_drm_format_set_add(&egl->dmabuf_texture_formats, fmt, + DRM_FORMAT_MOD_INVALID); +- if (modifiers_len == 0 || !all_external_only) { +- wlr_drm_format_set_add(&egl->dmabuf_render_formats, fmt, +- DRM_FORMAT_MOD_INVALID); +- } ++ wlr_drm_format_set_add(&egl->dmabuf_render_formats, fmt, ++ DRM_FORMAT_MOD_INVALID); + + if (modifiers_len == 0) { + // Assume the linear layout is supported if the driver doesn't diff --git a/board/batocera/allwinner/a733/patches/wlroots/0002-drm-dumb-use-MOD_INVALID-so-PVR-EGL-skips-explicit-mo.patch b/board/batocera/allwinner/a733/patches/wlroots/0002-drm-dumb-use-MOD_INVALID-so-PVR-EGL-skips-explicit-mo.patch new file mode 100644 index 00000000000..75a467e125c --- /dev/null +++ b/board/batocera/allwinner/a733/patches/wlroots/0002-drm-dumb-use-MOD_INVALID-so-PVR-EGL-skips-explicit-mo.patch @@ -0,0 +1,38 @@ +From: Jason Germino +Date: Thu, 03 Jul 2026 00:00:00 +0000 +Subject: [PATCH 2/2] drm_dumb: use DRM_FORMAT_MOD_INVALID so PVR EGL skips explicit modifier + +DRM dumb buffers are always linear, but advertising DRM_FORMAT_MOD_LINEAR +(value 0) in the dmabuf attributes causes wlroots to pass the explicit +LINEAR modifier to eglCreateImageKHR. PowerVR DDK 24.x marks LINEAR as +external_only=true (GPU prefers tiled), so the EGL image is flagged +external-only and wlroots refuses to use it as an FBO render target, +logging "DMA-BUF format is external-only" for every mode test — all modes +fail and the display never modessets. + +Use DRM_FORMAT_MOD_INVALID instead. The wlroots EGL path (egl.c line 796) +already skips adding modifier attributes to eglCreateImageKHR when the +modifier is INVALID, so PVR EGL receives no explicit modifier and handles +the buffer in implicit/no-modifier mode — the same path that worked when +WLR_EGL_NO_MODIFIERS=1 was set globally. Combined with patch 0001 which +adds INVALID to dmabuf_render_formats unconditionally, the external_only +flag is now false and FBO creation succeeds. + +--- + render/allocator/drm_dumb.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/render/allocator/drm_dumb.c b/render/allocator/drm_dumb.c +index 3333333..4444444 100644 +--- a/render/allocator/drm_dumb.c ++++ b/render/allocator/drm_dumb.c +@@ -94,7 +94,7 @@ static struct wlr_drm_dumb_buffer *create_buffer( + buffer->dmabuf = (struct wlr_dmabuf_attributes){ + .width = buffer->width, + .height = buffer->height, + .format = format->format, +- .modifier = DRM_FORMAT_MOD_LINEAR, ++ .modifier = DRM_FORMAT_MOD_INVALID, + .n_planes = 1, + .offset[0] = 0, + .stride[0] = buffer->stride, diff --git a/board/batocera/allwinner/a733/patches/wlroots/0003-linux-dmabuf-skip-PRIME-import-check-when-driver-does.patch b/board/batocera/allwinner/a733/patches/wlroots/0003-linux-dmabuf-skip-PRIME-import-check-when-driver-does.patch new file mode 100644 index 00000000000..ac96054cf81 --- /dev/null +++ b/board/batocera/allwinner/a733/patches/wlroots/0003-linux-dmabuf-skip-PRIME-import-check-when-driver-does.patch @@ -0,0 +1,35 @@ +From: Jason Germino +Date: Thu, 03 Jul 2026 00:00:00 +0000 +Subject: [PATCH 3/3] linux-dmabuf: skip PRIME import check when driver doesn't support it + +pvrsrvkm (PowerVR DDK 24.x) does not implement DRM_IOCTL_PRIME_FD_TO_HANDLE, +so drmPrimeFDToHandle() returns EINVAL. wlroots treats this as a hard failure, +posts a Wayland protocol error to the client (EmulationStation), and ES +disconnects before it can display anything. + +When the DRM device returns EINVAL or ENOSYS, the driver simply doesn't support +the PRIME FD→handle import path. Fall through and let EGL decide at +eglCreateImageKHR time whether it can actually use the buffer — that is the +authoritative import check anyway. + +--- + types/wlr_linux_dmabuf_v1.c | 7 +++++++ + 1 file changed, 7 insertions(+), 0 deletions(-) + +diff --git a/types/wlr_linux_dmabuf_v1.c b/types/wlr_linux_dmabuf_v1.c +index 5555555..6666666 100644 +--- a/types/wlr_linux_dmabuf_v1.c ++++ b/types/wlr_linux_dmabuf_v1.c +@@ -215,6 +215,13 @@ static bool check_import_dmabuf(struct wlr_dmabuf_attributes *attribs, void *da + for (int i = 0; i < attribs->n_planes; i++) { + uint32_t handle = 0; + if (drmPrimeFDToHandle(linux_dmabuf->main_device_fd, attribs->fd[i], &handle) != 0) { ++ if (errno == EINVAL || errno == ENOSYS) { ++ // Driver doesn't support PRIME FD→handle import (e.g. pvrsrvkm). ++ // Skip the check and let EGL decide at import time. ++ wlr_log(WLR_DEBUG, "DRM device doesn't support PRIME FD import check, skipping"); ++ return true; ++ } + wlr_log_errno(WLR_ERROR, "Failed to import DMA-BUF FD for plane %d", i); + return false; + } diff --git a/board/batocera/allwinner/a733/patches/x265/0001-cmake-replace-deprecated-OLD-policies-for-cmake-4.patch b/board/batocera/allwinner/a733/patches/x265/0001-cmake-replace-deprecated-OLD-policies-for-cmake-4.patch new file mode 100644 index 00000000000..dc1020c5130 --- /dev/null +++ b/board/batocera/allwinner/a733/patches/x265/0001-cmake-replace-deprecated-OLD-policies-for-cmake-4.patch @@ -0,0 +1,27 @@ +From: Jason Germino +Date: Fri, 09 May 2026 00:00:00 +0000 +Subject: [PATCH] cmake: replace deprecated OLD policies for CMake 4.0+ + +CMake 4.0 removed support for setting CMP0025 and CMP0054 to OLD +behavior. Both are no-ops on Linux (CMP0025 only affects macOS +Apple Clang detection; CMP0054 NEW is the sane quoting behavior). +Change both to NEW to allow building with CMake 4.x. +--- + source/CMakeLists.txt | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/source/CMakeLists.txt b/source/CMakeLists.txt +--- a/source/CMakeLists.txt ++++ b/source/CMakeLists.txt +@@ -9,10 +9,10 @@ message(STATUS "cmake version ${CMAKE_VERSION}") + if(POLICY CMP0025) +- cmake_policy(SET CMP0025 OLD) # report Apple's Clang as just Clang ++ cmake_policy(SET CMP0025 NEW) # CMake 4.0+ requires NEW; Apple Clang vs Clang only matters on macOS + endif() + if(POLICY CMP0042) + cmake_policy(SET CMP0042 NEW) # MACOSX_RPATH + endif() + if(POLICY CMP0054) +- cmake_policy(SET CMP0054 OLD) # Only interpret if() arguments as variables or keywords when unquoted ++ cmake_policy(SET CMP0054 NEW) # CMake 4.0+ requires NEW; quoted if() args not dereferenced + endif() diff --git a/board/batocera/allwinner/a733/post-build.sh b/board/batocera/allwinner/a733/post-build.sh new file mode 100755 index 00000000000..1b980b0c6a5 --- /dev/null +++ b/board/batocera/allwinner/a733/post-build.sh @@ -0,0 +1,71 @@ +#!/bin/bash +# Allwinner A733 / Radxa Cubie A7S post-build script +# Called by Buildroot after the rootfs is assembled, before squashfs packing. +# $1 = TARGET_DIR +set -euo pipefail + +TARGET_DIR="$1" + +CROSS="${HOST_DIR}/bin/aarch64-buildroot-linux-gnu-" + +# ============================================================================= +# Build pvrsrvkm.ko (Imagination PowerVR BXM-4-64 kernel module) +# +# The module source lives in bsp/modules/gpu/ inside the kernel tree, which is +# pre-merged into https://github.com/GameOctane/allwinner-a733-linux. +# Buildroot downloads the kernel to BUILD_DIR/linux-custom; the GPU module +# source is therefore at BUILD_DIR/linux-custom/bsp/modules/gpu/. +# +# The module cannot be built in-tree via Kbuild obj-m because the GPU Makefile +# uses the Allwinner sunxi_linux build system. We invoke its 'build' target +# directly out-of-tree here, after the kernel has been compiled. +# ============================================================================= +KERNEL_BUILD="${BUILD_DIR}/linux-custom" +GPU_MODULE_DIR="${KERNEL_BUILD}/bsp/modules/gpu" + +if [ ! -d "${GPU_MODULE_DIR}" ]; then + echo "[post-build] WARNING: GPU module source not found at ${GPU_MODULE_DIR}" + echo "[post-build] Expected bsp/modules/gpu/ inside the kernel source tree." + exit 0 +fi + +echo "[post-build] Building pvrsrvkm.ko (PowerVR BXM-4-64)..." +echo "[post-build] Kernel build : ${KERNEL_BUILD}" +echo "[post-build] GPU source : ${GPU_MODULE_DIR}" + +# The GPU Makefile uses a custom build system, not Kbuild obj-m. +# Export CROSS_COMPILE and KERNELDIR as env vars — the inner -Rr make +# invocation suppresses variable propagation, so env vars are the only +# reliable way to pass them through. sunxi_linux/Makefile uses +# LICHEE_TOOLCHAIN_PATH/LICHEE_CROSS_COMPILER to resolve the toolchain prefix. +export CROSS_COMPILE="${CROSS}" +export KERNELDIR="${KERNEL_BUILD}" +export ARCH=arm64 +export LICHEE_TOOLCHAIN_PATH="${HOST_DIR}" +export LICHEE_CROSS_COMPILER="aarch64-buildroot-linux-gnu" +make -C "${GPU_MODULE_DIR}" build \ + KERNELDIR="${KERNEL_BUILD}" \ + ARCH=arm64 \ + CROSS_COMPILE="${CROSS}" \ + LICHEE_TOOLCHAIN_PATH="${HOST_DIR}" \ + LICHEE_CROSS_COMPILER="aarch64-buildroot-linux-gnu" \ + GPU_TYPE=bxm \ + GPU_BUILD_TYPE=release \ + -j$(nproc) + +KVER=$(cat "${KERNEL_BUILD}/include/config/kernel.release" 2>/dev/null || \ + awk -F\" '/UTS_RELEASE/{print $2}' "${KERNEL_BUILD}/include/generated/utsrelease.h" 2>/dev/null || \ + echo "unknown") + +KO_DEST="${TARGET_DIR}/lib/modules/${KVER}/extra" +mkdir -p "${KO_DEST}" + +KO_SRC=$(find "${GPU_MODULE_DIR}/img-bxm" -name "pvrsrvkm.ko" 2>/dev/null | head -1) +if [ -z "${KO_SRC}" ]; then + echo "[post-build] ERROR: pvrsrvkm.ko not found after build" + exit 1 +fi +"${CROSS}strip" --strip-debug "${KO_SRC}" -o "${KO_DEST}/pvrsrvkm.ko" +echo "[post-build] Installed: ${KO_DEST}/pvrsrvkm.ko (from ${KO_SRC})" + +echo "[post-build] pvrsrvkm.ko done." diff --git a/configs/batocera-a733-cubie-a7s.board b/configs/batocera-a733-cubie-a7s.board new file mode 100644 index 00000000000..6d5a44913a1 --- /dev/null +++ b/configs/batocera-a733-cubie-a7s.board @@ -0,0 +1,90 @@ +include batocera-board.common + +# Allwinner A733 / Radxa Cubie A7S +# SoC: sun60iw2 (2x Cortex-A76 + 6x Cortex-A55 @ 2.0GHz) +# GPU: Imagination PowerVR BXM-4-64 MC1 +# Display: USB-C DisplayPort Alt Mode (eDP 1.4 → Cadence SERDES → HUSB311 TypeC) + +# Target architecture +BR2_aarch64=y +BR2_cortex_a55=y +BR2_ARM_FPU_NEON_FP_ARMV8=y +# Tune for A55 little cores — A76 big cores execute these binaries fine, +# but A76-only tuning reduces efficiency on the little cores. +BR2_TARGET_OPTIMIZATION="-pipe -fsigned-char -mcpu=cortex-a55+crypto -mtune=cortex-a55" +BR2_TARGET_GENERIC_GETTY_BAUDRATE_115200=y + +# Patches and filesystem overlay +BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/patches $(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/allwinner/patches $(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/allwinner/a733/patches" +BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/fsoverlay $(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/allwinner/a733/fsoverlay" +BR2_ROOTFS_POST_BUILD_SCRIPT="$(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/allwinner/a733/post-build.sh" +BR2_TARGET_ROOTFS_SQUASHFS4_ZSTD=y + +# Linux headers — must match kernel series +BR2_KERNEL_HEADERS_AS_KERNEL=y +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_6_6=y + +# Kernel — Radxa 6.6 BSP + allwinner-bsp pre-merged +# Source: https://github.com/GameOctane/allwinner-a733-linux (branch: a733-batocera-v1) +# +# The Radxa 6.6 kernel and allwinner-bsp overlay are pre-merged into a single +# repository so Buildroot can fetch them with a standard git clone. The BSP +# drivers (CCU, MMC, display pipeline, USB TypeC, AXP PMIC) and pvrsrvkm.ko +# (PowerVR GPU) build automatically via drivers-y += bsp/ in the Makefile. +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_GIT=y +BR2_LINUX_KERNEL_CUSTOM_REPO_URL="https://github.com/GameOctane/allwinner-a733-linux" +BR2_LINUX_KERNEL_CUSTOM_REPO_VERSION="a733-batocera-v1" +# The Radxa BSP kernel uses arch/arm64/configs/defconfig (no prefix). +# Buildroot's USE_DEFCONFIG would append _defconfig yielding "defconfig_defconfig", +# so we commit a copy as linux-defconfig.config and select USE_CUSTOM_CONFIG. +BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y +BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/allwinner/a733/linux-defconfig.config" +BR2_LINUX_KERNEL_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_BATOCERA_PATH)/board/batocera/allwinner/a733/linux-defconfig-fragment.config" +BR2_LINUX_KERNEL_NEEDS_HOST_OPENSSL=y +BR2_LINUX_KERNEL_DTS_SUPPORT=y +BR2_LINUX_KERNEL_INTREE_DTS_NAME="allwinner/sun60i-a733-cubie-a7s" + +# Bootloader — pre-built blobs from Radxa rsdk-r2 +# The Radxa U-Boot is a heavily customised Android/AIOT fork that does not +# integrate with Buildroot's BR2_TARGET_UBOOT machinery. Pre-extracted blobs +# are committed to board/batocera/allwinner/a733/cubie-a7s/boot/ and written +# to their correct raw SD card offsets by genimage.cfg. +# Source: https://github.com/radxa-build/radxa-a733/releases/tag/rsdk-r2 + +# GPU — Imagination PowerVR BXM-4-64 MC1 +# This SoC uses a PowerVR GPU — Panfrost will NOT work here. +# pvrsrvkm.ko is built from bsp/modules/gpu/ as part of the kernel build. +# Proprietary userspace DDK (libGLESv2, libVK_IMG, pvr_dri.so, etc.) is +# provided in fsoverlay/usr/local/lib/ from Radxa's allwinner-target package +# (Debian Section: free, Maintainer: Allwinnertech). +# Mesa softpipe provides a software GL fallback for packages that require a +# Mesa EGL/GLES provider at link time. +BR2_PACKAGE_MESA3D=y +BR2_PACKAGE_MESA3D_GALLIUM_DRIVER_SOFTPIPE=y +BR2_PACKAGE_MESA3D_OPENGL_EGL=y +BR2_PACKAGE_MESA3D_OPENGL_ES=y + +# Wayland compositor via labwc. XWayland excluded: it pulls in libglew via +# BATOCERA_PORTS_SYSTEMS Kconfig selects which requires BR2_PACKAGE_XORG7. +BR2_PACKAGE_BATOCERA_WAYLAND_LABWC=y +BR2_PACKAGE_BATOCERA_XWAYLAND=n + +# Splash screen +BR2_PACKAGE_BATOCERA_SPLASH_MPV=y + +# Disable arcade systems — many require hardware GL or x86-only emulators +BR2_PACKAGE_BATOCERA_ARCADE_SYSTEMS=n + +# Allwinner A733 (sun60iw2) target +BR2_PACKAGE_BATOCERA_TARGET_A733=y + +# Host tools required by genimage for FAT32 boot partition +BR2_PACKAGE_HOST_DOSFSTOOLS=y +BR2_PACKAGE_HOST_MTOOLS=y + +# WiFi/BT — AIC8800D80 USB adapter (AIC8800 firmware auto-selected via Config.in) +BR2_PACKAGE_AIC8800_USB=y + +BR2_PACKAGE_LIBRETRO_SAME_CDI=y +BR2_PACKAGE_ECWOLF=y diff --git a/package/batocera/core/batocera-configgen/batocera-configgen.mk b/package/batocera/core/batocera-configgen/batocera-configgen.mk index 874a897f254..954c7c3db3d 100644 --- a/package/batocera/core/batocera-configgen/batocera-configgen.mk +++ b/package/batocera/core/batocera-configgen/batocera-configgen.mk @@ -98,6 +98,8 @@ else ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_T527),y) BATOCERA_CONFIGGEN_SYSTEM=t527 else ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_RK3576),y) BATOCERA_CONFIGGEN_SYSTEM=rk3576 +else ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_A733),y) + BATOCERA_CONFIGGEN_SYSTEM=a733 endif define BATOCERA_CONFIGGEN_INSTALL_STAGING_CMDS diff --git a/package/batocera/core/batocera-configgen/configs/configgen-defaults-a733.yml b/package/batocera/core/batocera-configgen/configs/configgen-defaults-a733.yml new file mode 100644 index 00000000000..652f98aa9c4 --- /dev/null +++ b/package/batocera/core/batocera-configgen/configs/configgen-defaults-a733.yml @@ -0,0 +1,12 @@ +nds: + emulator: libretro + core: melonds +fmtowns: + emulator: libretro + core: mame +flash: + emulator: lightspark + core: lightspark +model3: + emulator: supermodel + core: supermodel-legacy diff --git a/package/batocera/core/batocera-scripts/batocera-scripts.mk b/package/batocera/core/batocera-scripts/batocera-scripts.mk index a5d860e5950..d274bf05a23 100644 --- a/package/batocera/core/batocera-scripts/batocera-scripts.mk +++ b/package/batocera/core/batocera-scripts/batocera-scripts.mk @@ -74,8 +74,8 @@ define BATOCERA_SCRIPTS_INSTALL_TARGET_CMDS install -m 0755 $(BATOCERA_SCRIPTS_PATH)/scripts/batocera-switch-screen-checker-delayed $(TARGET_DIR)/usr/bin/ install -m 0755 $(BATOCERA_SCRIPTS_PATH)/scripts/batocera-ikemen $(TARGET_DIR)/usr/bin/ install -m 0755 $(BATOCERA_SCRIPTS_PATH)/scripts/batocera-streaming $(TARGET_DIR)/usr/bin/ - install -m 0644 $(BATOCERA_SCRIPTS_PATH)/rules/80-switch-screen.rules $(TARGET_DIR)/etc/udev/rules.d mkdir -p $(TARGET_DIR)/etc/udev/rules.d + install -m 0644 $(BATOCERA_SCRIPTS_PATH)/rules/80-switch-screen.rules $(TARGET_DIR)/etc/udev/rules.d install -m 0755 $(BATOCERA_SCRIPTS_PATH)/scripts/batocera-amd-tdp $(TARGET_DIR)/usr/bin/ install -m 0755 $(BATOCERA_SCRIPTS_PATH)/scripts/batocera-spinner-calibrator $(TARGET_DIR)/usr/bin/ install -m 0755 $(BATOCERA_SCRIPTS_PATH)/scripts/batocera-vulkan $(TARGET_DIR)/usr/bin/ diff --git a/package/batocera/emulators/hatari/hatari.mk b/package/batocera/emulators/hatari/hatari.mk index 64233362e7d..4408461c7ca 100644 --- a/package/batocera/emulators/hatari/hatari.mk +++ b/package/batocera/emulators/hatari/hatari.mk @@ -15,6 +15,7 @@ HATARI_EMULATOR_INFO = hatari.emulator.yml HATARI_CONF_OPTS += -DBUILD_SHARED_LIBS=OFF HATARI_CONF_OPTS += -DCMAKE_BUILD_TYPE=Release HATARI_CONF_OPTS += -DCAPSIMAGE_INCLUDE_DIR="($STAGING_DIR)/usr/include/caps" +HATARI_CONF_OPTS += -DCMAKE_EXE_LINKER_FLAGS="-lm" define HATARI_INSTALL_TARGET_CMDS $(INSTALL) -D $(@D)/src/hatari $(TARGET_DIR)/usr/bin/hatari diff --git a/package/batocera/emulators/retroarch/libretro/libretro-beetle-pcfx/libretro-beetle-pcfx.mk b/package/batocera/emulators/retroarch/libretro/libretro-beetle-pcfx/libretro-beetle-pcfx.mk index 07861c32147..5cd6cfed910 100644 --- a/package/batocera/emulators/retroarch/libretro/libretro-beetle-pcfx/libretro-beetle-pcfx.mk +++ b/package/batocera/emulators/retroarch/libretro/libretro-beetle-pcfx/libretro-beetle-pcfx.mk @@ -12,7 +12,11 @@ LIBRETRO_BEETLE_PCFX_EMULATOR_INFO = pcfx.libretro.core.yml LIBRETRO_BEETLE_PCFX_PLATFORM = $(LIBRETRO_PLATFORM) -ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_S922X)$(BR2_PACKAGE_BATOCERA_TARGET_A3GEN2),y) +ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_A733),y) +LIBRETRO_BEETLE_PCFX_PLATFORM = S905 +else ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_A733),y) +LIBRETRO_BEETLE_PCFX_PLATFORM = S905 +else ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_S922X)$(BR2_PACKAGE_BATOCERA_TARGET_A3GEN2),y) LIBRETRO_BEETLE_PCFX_PLATFORM = CortexA73_G12B else ifeq ($(BR2_PACKAGE_BATOCERA_TARGET_RK3399),y) LIBRETRO_BEETLE_PCFX_PLATFORM = rpi4 diff --git a/package/batocera/libraries/pipewire-ffmpeg-plugins/pipewire-ffmpeg-plugins.mk b/package/batocera/libraries/pipewire-ffmpeg-plugins/pipewire-ffmpeg-plugins.mk index b583c2bcbc9..46ccdd15e1c 100644 --- a/package/batocera/libraries/pipewire-ffmpeg-plugins/pipewire-ffmpeg-plugins.mk +++ b/package/batocera/libraries/pipewire-ffmpeg-plugins/pipewire-ffmpeg-plugins.mk @@ -76,12 +76,14 @@ define PIPEWIRE_FFMPEG_PLUGINS_INSTALL_TARGET_CMDS $(INSTALL) -d $(TARGET_DIR)/usr/lib/spa-0.2/ffmpeg $(INSTALL) -m 0755 $(@D)/buildroot-build/spa/plugins/ffmpeg/libspa-ffmpeg.so \ $(TARGET_DIR)/usr/lib/spa-0.2/ffmpeg/ + $(INSTALL) -d $(TARGET_DIR)/usr/lib/spa-0.2/videoconvert $(INSTALL) -m 0755 $(@D)/buildroot-build/spa/plugins/videoconvert/libspa-videoconvert.so \ $(TARGET_DIR)/usr/lib/spa-0.2/videoconvert/ endef ifeq ($(BR2_PACKAGE_LIBSNDFILE),y) define PIPEWIRE_FFMPEG_PLUGINS_INSTALL_PW_CAT + $(INSTALL) -d $(TARGET_DIR)/usr/bin $(INSTALL) -m 0755 $(@D)/buildroot-build/src/tools/pw-cat \ $(TARGET_DIR)/usr/bin/pw-cat endef diff --git a/package/batocera/libraries/wildmidi/wildmidi.mk b/package/batocera/libraries/wildmidi/wildmidi.mk index 793f8b0c32c..066595f1862 100644 --- a/package/batocera/libraries/wildmidi/wildmidi.mk +++ b/package/batocera/libraries/wildmidi/wildmidi.mk @@ -10,5 +10,6 @@ WILDMIDI_LICENSE = LGPLv3 WILDMIDI_INSTALL_STAGING = YES WILDMIDI_CONF_OPTS += -DBUILD_TESTING=OFF -DWANT_STATIC=ON -DWANT_PLAYER=OFF +WILDMIDI_CONF_OPTS += -DCMAKE_SHARED_LINKER_FLAGS="-lm" $(eval $(cmake-package))