diff --git a/arch/aarch64/arm-clock.cc b/arch/aarch64/arm-clock.cc index ba09afec8c..1a4fbb7bf1 100644 --- a/arch/aarch64/arm-clock.cc +++ b/arch/aarch64/arm-clock.cc @@ -42,9 +42,12 @@ class arm_clock : public clock { arm_clock::arm_clock() { asm volatile ("mrs %0, cntfrq_el0; isb; " : "=r"(freq_hz) :: "memory"); - /* spec documents a typical range of 1-50 MHZ, - * the ampere-1a however, runs on 1Ghz, so allow up to that frequency */ - if (freq_hz < 1 * MHZ || freq_hz > 1000 * MHZ) { + /* spec documents a typical range of 1-50 MHZ, but real cores run higher: + * current server ARM cores report generic-timer frequencies above 1GHz, + * which the previous 1GHz ceiling rejected and aborted the boot. Allow up + * to 2GHz to cover current server ARM cores with headroom while still + * catching a garbage read. */ + if (freq_hz < 1 * MHZ || freq_hz > 2000 * MHZ) { debug_early_u64("arm_clock(): read invalid frequency ", freq_hz); abort(); } diff --git a/libc/arch/aarch64/atomic.h b/libc/arch/aarch64/atomic.h index fd997f9d4d..2ab441ef0b 100644 --- a/libc/arch/aarch64/atomic.h +++ b/libc/arch/aarch64/atomic.h @@ -9,8 +9,19 @@ #define _INTERNAL_ATOMIC_H #include +/* + * These two headers pull in OSv kernel-only machinery (the FreeBSD-derived + * machine/atomic.h and the old bsd/cddl opensolaris sys/types.h). They are only + * on the include path for kernel/bsd objects. Userspace translation units that + * resolve to this file (e.g. the OpenZFS libspl/libzfs sources on + * aarch64) do not have them available and do not need them, so gate them on the + * kernel build. The x64 variant of this file has no such includes; this change + * is aarch64-only and leaves the x86_64 build byte-identical. + */ +#if defined(_KERNEL) || defined(__OSV_CORE__) #include #include +#endif static inline int a_ctz_64(register uint64_t x) { @@ -26,7 +37,12 @@ static inline int a_ctz_l(unsigned long x) static inline int a_fetch_add(volatile int *x, int v) { +#if defined(_KERNEL) || defined(__OSV_CORE__) return atomic_fetchadd_int((unsigned int *)x, (unsigned int)v); +#else + /* Userspace: machine/atomic.h is unavailable; use the LSE/LL-SC builtin. */ + return __atomic_fetch_add(x, v, __ATOMIC_SEQ_CST); +#endif } static inline void a_crash() diff --git a/modules/open_zfs/open_zfs_sources.mk b/modules/open_zfs/open_zfs_sources.mk index 060abc570d..a3a42f2393 100644 --- a/modules/open_zfs/open_zfs_sources.mk +++ b/modules/open_zfs/open_zfs_sources.mk @@ -271,13 +271,21 @@ openzfs-icp += $(OPENZFS)/module/icp/algs/sha2/sha512_impl.o openzfs-icp += $(OPENZFS)/module/icp/algs/skein/skein.o openzfs-icp += $(OPENZFS)/module/icp/algs/skein/skein_block.o openzfs-icp += $(OPENZFS)/module/icp/algs/skein/skein_iv.o +ifeq ($(arch),x64) openzfs-icp += $(OPENZFS)/module/icp/asm-x86_64/aes/aeskey.o +endif # Note: generic_impl.c is a template included by other .c files, not compiled directly # ============================================================ -# ICP Assembly routines (x86_64 SIMD crypto implementations) +# ICP Assembly routines (arch-specific SIMD crypto implementations) +# The x86_64 aes_*.S / aeskey.c files have no top-level __x86_64__ guard and +# contain raw x86 instructions, so they are listed only for the x64 build. The +# aarch64 sha2 .S files are #if defined(__aarch64__) guarded, and the aarch64 +# blake3 .S files are native ARMv8 assembly, so both are safe to list for +# aarch64 only. # ============================================================ openzfs-icp-asm := +ifeq ($(arch),x64) openzfs-icp-asm += $(OPENZFS)/module/icp/asm-x86_64/aes/aes_amd64.o openzfs-icp-asm += $(OPENZFS)/module/icp/asm-x86_64/aes/aes_aesni.o # openzfs-icp-asm += $(OPENZFS)/module/icp/asm-x86_64/modes/gcm_pclmulqdq.o @@ -285,6 +293,13 @@ openzfs-icp-asm += $(OPENZFS)/module/icp/asm-x86_64/aes/aes_aesni.o # openzfs-icp-asm += $(OPENZFS)/module/icp/asm-x86_64/modes/ghash-x86_64.o openzfs-icp-asm += $(OPENZFS)/module/icp/asm-x86_64/sha2/sha256-x86_64.o openzfs-icp-asm += $(OPENZFS)/module/icp/asm-x86_64/sha2/sha512-x86_64.o +endif +ifeq ($(arch),aarch64) +openzfs-icp-asm += $(OPENZFS)/module/icp/asm-aarch64/sha2/sha256-armv8.o +openzfs-icp-asm += $(OPENZFS)/module/icp/asm-aarch64/sha2/sha512-armv8.o +openzfs-icp-asm += $(OPENZFS)/module/icp/asm-aarch64/blake3/b3_aarch64_sse2.o +openzfs-icp-asm += $(OPENZFS)/module/icp/asm-aarch64/blake3/b3_aarch64_sse41.o +endif # ============================================================ # ZSTD compression module (from module/zstd/) diff --git a/modules/open_zfs/osv/include/os/osv/spl/sys/isa_defs.h b/modules/open_zfs/osv/include/os/osv/spl/sys/isa_defs.h index 7991a2e47c..94e088a8d2 100644 --- a/modules/open_zfs/osv/include/os/osv/spl/sys/isa_defs.h +++ b/modules/open_zfs/osv/include/os/osv/spl/sys/isa_defs.h @@ -1,7 +1,7 @@ // SPDX-License-Identifier: CDDL-1.0 /* * OSv SPL isa_defs.h - ISA definitions for OpenZFS. - * Based on the FreeBSD version. OSv only supports x86_64. + * Based on the FreeBSD version. OSv supports x86_64 and aarch64. */ #ifndef _SPL_OSV_ISA_DEFS_H #define _SPL_OSV_ISA_DEFS_H @@ -27,8 +27,15 @@ extern "C" { #endif #define _SUNOS_VTOC_16 +#elif defined(__aarch64__) + +#if !defined(_LP64) +#error "_LP64 not defined" +#endif +#define _SUNOS_VTOC_16 + #else -#error "ISA not supported - OSv only supports x86_64" +#error "ISA not supported - OSv supports x86_64 and aarch64" #endif #if __BYTE_ORDER == __BIG_ENDIAN diff --git a/modules/open_zfs/osv/include/os/osv/spl/sys/simd.h b/modules/open_zfs/osv/include/os/osv/spl/sys/simd.h index 7167b1e13e..8bfb9ad4cc 100644 --- a/modules/open_zfs/osv/include/os/osv/spl/sys/simd.h +++ b/modules/open_zfs/osv/include/os/osv/spl/sys/simd.h @@ -170,6 +170,7 @@ zfs_movbe_available(void) #define zfs_aes_available() B_FALSE #define zfs_pclmulqdq_available() B_FALSE #define zfs_sha256_available() B_FALSE +#define zfs_sha512_available() B_FALSE #define zfs_movbe_available() B_FALSE #endif /* __x86_64__ || __i386__ */