From 2eeafc2fbcff9b02a58eac5a456e2ace1c13ef08 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 8 Nov 2022 05:54:49 -0800 Subject: [PATCH 01/22] remove src/CMakeLists.txt Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 91 ++++++++++++++++++- .../Features/loop_unroll/src/CMakeLists.txt | 90 ------------------ 2 files changed, 90 insertions(+), 91 deletions(-) delete mode 100644 DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/CMakeLists.txt diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index f063870e70..41f1b1f6ed 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -17,4 +17,93 @@ set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) -add_subdirectory (src) +set(SOURCE_FILE src/loop_unroll.cpp) +set(TARGET_NAME src/loop_unroll) +set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu) +set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim) +set(FPGA_TARGET ${TARGET_NAME}.fpga) + +# FPGA board selection +if(NOT DEFINED FPGA_DEVICE) + set(FPGA_DEVICE "intel_a10gx_pac:pac_a10") + message(STATUS "FPGA_DEVICE was not specified.\ + \nConfiguring the design to run on the default FPGA board ${FPGA_DEVICE} (Intel(R) PAC with Intel Arria(R) 10 GX FPGA). \ + \nPlease refer to the README for information on board selection.") +else() + message(STATUS "Configuring the design to run on FPGA board ${FPGA_DEVICE}") +endif() + +# This is a Windows-specific flag that enables exception handling in host code +if(WIN32) + set(WIN_FLAG "/EHsc") +endif() + +# A SYCL ahead-of-time (AoT) compile processes the device code in two stages. +# 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). +# 2. The "link" stage invokes the compiler's FPGA backend before linking. +# For this reason, FPGA backend flags must be passed as link flags in CMake. +set(EMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DFPGA_EMULATOR") +set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga") +set(SIMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR") +set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") +set(HARDWARE_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga") +set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") +# use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation + +############################################################################### +### FPGA Emulator +############################################################################### +# To compile in a single command: +# icpx -fsycl -fintelfpga -DFPGA_EMULATOR loop_unroll.cpp -o loop_unroll.fpga_emu +# CMake executes: +# [compile] icpx -fsycl -fintelfpga -DFPGA_EMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp +# [link] icpx -fsycl -fintelfpga loop_unroll.cpp.o -o loop_unroll.fpga_emu +add_executable(${EMULATOR_TARGET} ${SOURCE_FILE}) +target_include_directories(${EMULATOR_TARGET} PRIVATE ../../../../include) +set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${EMULATOR_COMPILE_FLAGS}") +set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS "${EMULATOR_LINK_FLAGS}") +add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET}) + +############################################################################### +### FPGA Simulator +############################################################################### +# To compile in a single command: +# icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= -DFPGA_SIMULATOR loop_unroll.cpp -o loop_unroll.fpga_sim +# CMake executes: +# [compile] icpx -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp +# [link] icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga_sim +add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) +target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include) +set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}") +set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}") +add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET}) + +############################################################################### +### Generate Report +############################################################################### +# To compile manually: +# icpx -fsycl -fintelfpga -Xshardware -Xstarget= -fsycl-link=early loop_unroll.cpp -o loop_unroll_report.a +set(FPGA_EARLY_IMAGE ${TARGET_NAME}_report.a) +# The compile output is not an executable, but an intermediate compilation result unique to SYCL. +add_executable(${FPGA_EARLY_IMAGE} ${SOURCE_FILE}) +target_include_directories(${FPGA_EARLY_IMAGE} PRIVATE ../../../../include) +add_custom_target(report DEPENDS ${FPGA_EARLY_IMAGE}) +set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") +set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} -fsycl-link=early") +# fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® + +############################################################################### +### FPGA Hardware +############################################################################### +# To compile in a single command: +# icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp -o loop_unroll.fpga +# CMake executes: +# [compile] icpx -fsycl -fintelfpga -o loop_unroll.cpp.o -c loop_unroll.cpp +# [link] icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga +add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) +target_include_directories(${FPGA_TARGET} PRIVATE ../../../../include) +add_custom_target(fpga DEPENDS ${FPGA_TARGET}) +set_target_properties(${FPGA_TARGET} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") +set_target_properties(${FPGA_TARGET} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_TARGET}") +# The -reuse-exe flag enables rapid recompilation of host-only code changes. +# See DPC++FPGA/GettingStarted/fast_recompile for details. diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/CMakeLists.txt deleted file mode 100644 index 91f8949f66..0000000000 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/CMakeLists.txt +++ /dev/null @@ -1,90 +0,0 @@ -set(SOURCE_FILE loop_unroll.cpp) -set(TARGET_NAME loop_unroll) -set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu) -set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim) -set(FPGA_TARGET ${TARGET_NAME}.fpga) - -# FPGA board selection -if(NOT DEFINED FPGA_DEVICE) - set(FPGA_DEVICE "intel_a10gx_pac:pac_a10") - message(STATUS "FPGA_DEVICE was not specified.\ - \nConfiguring the design to run on the default FPGA board ${FPGA_DEVICE} (Intel(R) PAC with Intel Arria(R) 10 GX FPGA). \ - \nPlease refer to the README for information on board selection.") -else() - message(STATUS "Configuring the design to run on FPGA board ${FPGA_DEVICE}") -endif() - -# This is a Windows-specific flag that enables exception handling in host code -if(WIN32) - set(WIN_FLAG "/EHsc") -endif() - -# A SYCL ahead-of-time (AoT) compile processes the device code in two stages. -# 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). -# 2. The "link" stage invokes the compiler's FPGA backend before linking. -# For this reason, FPGA backend flags must be passed as link flags in CMake. -set(EMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DFPGA_EMULATOR") -set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga") -set(SIMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR") -set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") -set(HARDWARE_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga") -set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") -# use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation - -############################################################################### -### FPGA Emulator -############################################################################### -# To compile in a single command: -# icpx -fsycl -fintelfpga -DFPGA_EMULATOR loop_unroll.cpp -o loop_unroll.fpga_emu -# CMake executes: -# [compile] icpx -fsycl -fintelfpga -DFPGA_EMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp -# [link] icpx -fsycl -fintelfpga loop_unroll.cpp.o -o loop_unroll.fpga_emu -add_executable(${EMULATOR_TARGET} ${SOURCE_FILE}) -target_include_directories(${EMULATOR_TARGET} PRIVATE ../../../../include) -set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${EMULATOR_COMPILE_FLAGS}") -set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS "${EMULATOR_LINK_FLAGS}") -add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET}) - -############################################################################### -### FPGA Simulator -############################################################################### -# To compile in a single command: -# icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= -DFPGA_SIMULATOR loop_unroll.cpp -o loop_unroll.fpga_sim -# CMake executes: -# [compile] icpx -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp -# [link] icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga_sim -add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) -target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include) -set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}") -set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}") -add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET}) - -############################################################################### -### Generate Report -############################################################################### -# To compile manually: -# icpx -fsycl -fintelfpga -Xshardware -Xstarget= -fsycl-link=early loop_unroll.cpp -o loop_unroll_report.a -set(FPGA_EARLY_IMAGE ${TARGET_NAME}_report.a) -# The compile output is not an executable, but an intermediate compilation result unique to SYCL. -add_executable(${FPGA_EARLY_IMAGE} ${SOURCE_FILE}) -target_include_directories(${FPGA_EARLY_IMAGE} PRIVATE ../../../../include) -add_custom_target(report DEPENDS ${FPGA_EARLY_IMAGE}) -set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") -set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} -fsycl-link=early") -# fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® - -############################################################################### -### FPGA Hardware -############################################################################### -# To compile in a single command: -# icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp -o loop_unroll.fpga -# CMake executes: -# [compile] icpx -fsycl -fintelfpga -o loop_unroll.cpp.o -c loop_unroll.cpp -# [link] icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga -add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) -target_include_directories(${FPGA_TARGET} PRIVATE ../../../../include) -add_custom_target(fpga DEPENDS ${FPGA_TARGET}) -set_target_properties(${FPGA_TARGET} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") -set_target_properties(${FPGA_TARGET} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_TARGET}") -# The -reuse-exe flag enables rapid recompilation of host-only code changes. -# See DPC++FPGA/GettingStarted/fast_recompile for details. From 9679e502e4974f74d200bfe164ef139ffbe99ae4 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Wed, 9 Nov 2022 02:33:43 -0800 Subject: [PATCH 02/22] target compile rework Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 49 ++++++++++++------- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 41f1b1f6ed..41a0ffe51d 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -18,7 +18,7 @@ set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(SOURCE_FILE src/loop_unroll.cpp) -set(TARGET_NAME src/loop_unroll) +set(TARGET_NAME loop_unroll) set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu) set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim) set(FPGA_TARGET ${TARGET_NAME}.fpga) @@ -38,16 +38,19 @@ if(WIN32) set(WIN_FLAG "/EHsc") endif() +set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG}) +set(COMMON_LINK_FLAGS -fsycl -fintelfpga) + # A SYCL ahead-of-time (AoT) compile processes the device code in two stages. # 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). # 2. The "link" stage invokes the compiler's FPGA backend before linking. # For this reason, FPGA backend flags must be passed as link flags in CMake. -set(EMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DFPGA_EMULATOR") -set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga") -set(SIMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -Xssimulation -DFPGA_SIMULATOR") -set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") -set(HARDWARE_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga") -set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}") +set(EMULATOR_COMPILE_FLAGS -DFPGA_EMULATOR) +set(EMULATOR_LINK_FLAGS ) +set(SIMULATOR_COMPILE_FLAGS -Xssimulation -DFPGA_SIMULATOR) +set(SIMULATOR_LINK_FLAGS -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}) +set(HARDWARE_COMPILE_FLAGS ) +set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}) # use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation ############################################################################### @@ -59,9 +62,11 @@ set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xstarget=${FPGA_DEVICE} # [compile] icpx -fsycl -fintelfpga -DFPGA_EMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp # [link] icpx -fsycl -fintelfpga loop_unroll.cpp.o -o loop_unroll.fpga_emu add_executable(${EMULATOR_TARGET} ${SOURCE_FILE}) -target_include_directories(${EMULATOR_TARGET} PRIVATE ../../../../include) -set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${EMULATOR_COMPILE_FLAGS}") -set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS "${EMULATOR_LINK_FLAGS}") +target_include_directories(${EMULATOR_TARGET} PRIVATE ../../../include) +target_compile_options(${EMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${EMULATOR_TARGET} PRIVATE ${EMULATOR_COMPILE_FLAGS}) +target_link_libraries(${EMULATOR_TARGET} ${COMMON_LINK_FLAGS}) +target_link_libraries(${EMULATOR_TARGET} ${EMULATOR_LINK_FLAGS}) add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET}) ############################################################################### @@ -73,9 +78,11 @@ add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET}) # [compile] icpx -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp # [link] icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga_sim add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) -target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../../include) -set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}") -set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}") +target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../include) +target_compile_options(${SIMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${SIMULATOR_TARGET} PRIVATE ${SIMULATOR_COMPILE_FLAGS}) +target_link_libraries(${SIMULATOR_TARGET} ${COMMON_LINK_FLAGS}) +target_link_libraries(${SIMULATOR_TARGET} ${SIMULATOR_LINK_FLAGS}) add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET}) ############################################################################### @@ -86,10 +93,12 @@ add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET}) set(FPGA_EARLY_IMAGE ${TARGET_NAME}_report.a) # The compile output is not an executable, but an intermediate compilation result unique to SYCL. add_executable(${FPGA_EARLY_IMAGE} ${SOURCE_FILE}) -target_include_directories(${FPGA_EARLY_IMAGE} PRIVATE ../../../../include) +target_include_directories(${FPGA_EARLY_IMAGE} PRIVATE ../../../include) +target_compile_options(${FPGA_EARLY_IMAGE} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${FPGA_EARLY_IMAGE} PRIVATE ${HARDWARE_COMPILE_FLAGS}) +target_link_libraries(${FPGA_EARLY_IMAGE} ${COMMON_LINK_FLAGS}) +target_link_libraries(${FPGA_EARLY_IMAGE} ${HARDWARE_LINK_FLAGS} -fsycl-link=early) add_custom_target(report DEPENDS ${FPGA_EARLY_IMAGE}) -set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") -set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} -fsycl-link=early") # fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® ############################################################################### @@ -101,9 +110,11 @@ set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES LINK_FLAGS "${HARDWARE_LINK # [compile] icpx -fsycl -fintelfpga -o loop_unroll.cpp.o -c loop_unroll.cpp # [link] icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) -target_include_directories(${FPGA_TARGET} PRIVATE ../../../../include) +target_include_directories(${FPGA_TARGET} PRIVATE ../../../include) +target_compile_options(${FPGA_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${FPGA_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) +target_link_libraries(${FPGA_TARGET} ${COMMON_LINK_FLAGS}) +target_link_libraries(${FPGA_TARGET} ${HARDWARE_LINK_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_TARGET}) add_custom_target(fpga DEPENDS ${FPGA_TARGET}) -set_target_properties(${FPGA_TARGET} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") -set_target_properties(${FPGA_TARGET} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_TARGET}") # The -reuse-exe flag enables rapid recompilation of host-only code changes. # See DPC++FPGA/GettingStarted/fast_recompile for details. From 22ad09c99a688b0044910ee7d2c1bd2280920211 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Wed, 9 Nov 2022 09:12:53 -0800 Subject: [PATCH 03/22] common include Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 58 +++--- .../Tutorials/Features/loop_unroll/README.md | 168 ++++++++---------- 2 files changed, 105 insertions(+), 121 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 41a0ffe51d..0584f7f5c0 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -1,15 +1,12 @@ +# Direct CMake to use icpx rather than the default C++ compiler/linker on Linux +# and icx-cl on Windows if(UNIX) - # Direct CMake to use icpx rather than the default C++ compiler/linker set(CMAKE_CXX_COMPILER icpx) else() # Windows - # Force CMake to use icx-cl rather than the default C++ compiler/linker - # (needed on Windows only) - include (CMakeForceCompiler) - CMAKE_FORCE_CXX_COMPILER (icx-cl IntelDPCPP) - include (Platform/Windows-Clang) + set(CMAKE_CXX_COMPILER icx-cl) endif() -cmake_minimum_required (VERSION 3.4) +cmake_minimum_required (VERSION 3.7.2) project(LoopUnroll CXX) @@ -19,9 +16,16 @@ set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(SOURCE_FILE src/loop_unroll.cpp) set(TARGET_NAME loop_unroll) -set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu) -set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim) -set(FPGA_TARGET ${TARGET_NAME}.fpga) + +set(EMULATOR_TARGET fpga_emu) +set(SIMULATOR_TARGET fpga_sim) +set(REPORT_TARGET report) +set(FPGA_TARGET fpga) + +set(EMULATOR_OUTPUT_NAME ${TARGET_NAME}.${EMULATOR_TARGET}) +set(SIMULATOR_OUTPUT_NAME ${TARGET_NAME}.${SIMULATOR_TARGET}) +set(REPORT_OUTPUT_NAME ${TARGET_NAME}.${REPORT_TARGET}) +set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) # FPGA board selection if(NOT DEFINED FPGA_DEVICE) @@ -49,10 +53,14 @@ set(EMULATOR_COMPILE_FLAGS -DFPGA_EMULATOR) set(EMULATOR_LINK_FLAGS ) set(SIMULATOR_COMPILE_FLAGS -Xssimulation -DFPGA_SIMULATOR) set(SIMULATOR_LINK_FLAGS -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}) +set(REPORT_COMPILE_FLAGS ) +set(REPORT_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -fsycl-link=early) set(HARDWARE_COMPILE_FLAGS ) -set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}) +set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) # use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation +add_subdirectory(../../../include ${CMAKE_CURRENT_BINARY_DIR}/includes) + ############################################################################### ### FPGA Emulator ############################################################################### @@ -62,12 +70,12 @@ set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLA # [compile] icpx -fsycl -fintelfpga -DFPGA_EMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp # [link] icpx -fsycl -fintelfpga loop_unroll.cpp.o -o loop_unroll.fpga_emu add_executable(${EMULATOR_TARGET} ${SOURCE_FILE}) -target_include_directories(${EMULATOR_TARGET} PRIVATE ../../../include) target_compile_options(${EMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${EMULATOR_TARGET} PRIVATE ${EMULATOR_COMPILE_FLAGS}) target_link_libraries(${EMULATOR_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${EMULATOR_TARGET} ${EMULATOR_LINK_FLAGS}) -add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET}) +target_link_libraries(${EMULATOR_TARGET} fpga_samples_shared_hdr) +set_target_properties(${EMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${EMULATOR_OUTPUT_NAME}) ############################################################################### ### FPGA Simulator @@ -78,27 +86,24 @@ add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET}) # [compile] icpx -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp # [link] icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga_sim add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) -target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../include) target_compile_options(${SIMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${SIMULATOR_TARGET} PRIVATE ${SIMULATOR_COMPILE_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${SIMULATOR_LINK_FLAGS}) -add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET}) +set_target_properties(${SIMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${SIMULATOR_OUTPUT_NAME}) ############################################################################### ### Generate Report ############################################################################### # To compile manually: -# icpx -fsycl -fintelfpga -Xshardware -Xstarget= -fsycl-link=early loop_unroll.cpp -o loop_unroll_report.a -set(FPGA_EARLY_IMAGE ${TARGET_NAME}_report.a) +# icpx -fsycl -fintelfpga -Xshardware -Xstarget= -fsycl-link=early loop_unroll.cpp -o loop_unroll.report # The compile output is not an executable, but an intermediate compilation result unique to SYCL. -add_executable(${FPGA_EARLY_IMAGE} ${SOURCE_FILE}) -target_include_directories(${FPGA_EARLY_IMAGE} PRIVATE ../../../include) -target_compile_options(${FPGA_EARLY_IMAGE} PRIVATE ${COMMON_COMPILE_FLAGS}) -target_compile_options(${FPGA_EARLY_IMAGE} PRIVATE ${HARDWARE_COMPILE_FLAGS}) -target_link_libraries(${FPGA_EARLY_IMAGE} ${COMMON_LINK_FLAGS}) -target_link_libraries(${FPGA_EARLY_IMAGE} ${HARDWARE_LINK_FLAGS} -fsycl-link=early) -add_custom_target(report DEPENDS ${FPGA_EARLY_IMAGE}) +add_executable(${REPORT_TARGET} ${SOURCE_FILE}) +target_compile_options(${REPORT_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${REPORT_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) +target_link_libraries(${REPORT_TARGET} ${COMMON_LINK_FLAGS}) +target_link_libraries(${REPORT_TARGET} ${HARDWARE_LINK_FLAGS}) +set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NAME}) # fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® ############################################################################### @@ -110,11 +115,10 @@ add_custom_target(report DEPENDS ${FPGA_EARLY_IMAGE}) # [compile] icpx -fsycl -fintelfpga -o loop_unroll.cpp.o -c loop_unroll.cpp # [link] icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) -target_include_directories(${FPGA_TARGET} PRIVATE ../../../include) target_compile_options(${FPGA_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${FPGA_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) target_link_libraries(${FPGA_TARGET} ${COMMON_LINK_FLAGS}) -target_link_libraries(${FPGA_TARGET} ${HARDWARE_LINK_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_TARGET}) -add_custom_target(fpga DEPENDS ${FPGA_TARGET}) +target_link_libraries(${FPGA_TARGET} ${HARDWARE_LINK_FLAGS}) +set_target_properties(${FPGA_TARGET} PROPERTIES OUTPUT_NAME ${FPGA_OUTPUT_NAME}) # The -reuse-exe flag enables rapid recompilation of host-only code changes. # See DPC++FPGA/GettingStarted/fast_recompile for details. diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/README.md b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/README.md index 6c9c494a0a..b25a8d781d 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/README.md +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/README.md @@ -125,95 +125,75 @@ The basic steps to build and run a sample using VS Code include: To learn more about the extensions and how to configure the oneAPI environment, see the [Using Visual Studio Code with Intel® oneAPI Toolkits User Guide](https://software.intel.com/content/www/us/en/develop/documentation/using-vs-code-with-intel-oneapi/top.html). -### On a Linux* System - -1. Generate the `Makefile` by running `cmake`. - ``` - mkdir build - cd build - ``` - To compile for the Intel® PAC with Intel Arria® 10 GX FPGA, run `cmake` using the command: - ``` - cmake .. - ``` - Alternatively, to compile for the Intel® FPGA PAC D5005 (with Intel Stratix® 10 SX), run `cmake` using the command: - - ``` - cmake .. -DFPGA_DEVICE=intel_s10sx_pac:pac_s10 - ``` - You can also compile for a custom FPGA platform. Ensure that the board support package is installed on your system. Then run `cmake` using the command: - ``` - cmake .. -DFPGA_DEVICE=: - ``` - -2. Compile the design through the generated `Makefile`. The following build targets are provided, matching the recommended development flow: - - * Compile for emulation (fast compile time, targets emulated FPGA device): - ``` - make fpga_emu - ``` - * Compile for simulation (fast compile time, targets simulator FPGA device): - ``` - make fpga_sim - ``` - * Generate the optimization report: - ``` - make report - ``` - * Compile for FPGA hardware (longer compile time, targets FPGA device): - ``` - make fpga - ``` -3. (Optional) As the above hardware compile may take several hours to complete, FPGA precompiled binaries (compatible with Linux* Ubuntu* 18.04) can be downloaded here. +### Configure the build system + +Create and go to a build directory +``` +mkdir build +cd build +``` + +#### On a Linux* System + +To configure the build system for the Intel® PAC with Intel Arria® 10 GX FPGA, run `cmake` using the command: +``` +cmake .. +``` +Alternatively, to configure the build system for the Intel® FPGA PAC D5005 (with Intel Stratix® 10 SX), run `cmake` using the command: -### On a Windows* System - -1. Generate the `Makefile` by running `cmake`. - ``` - mkdir build - cd build - ``` - To compile for the Intel® PAC with Intel Arria® 10 GX FPGA, run `cmake` using the command: - ``` - cmake -G "NMake Makefiles" .. - ``` - Alternatively, to compile for the Intel® FPGA PAC D5005 (with Intel Stratix® 10 SX), run `cmake` using the command: - - ``` - cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=intel_s10sx_pac:pac_s10 - ``` - You can also compile for a custom FPGA platform. Ensure that the board support package is installed on your system. Then run `cmake` using the command: - ``` - cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=: - ``` - -2. Compile the design through the generated `Makefile`. The following build targets are provided, matching the recommended development flow: - - * Compile for emulation (fast compile time, targets emulated FPGA device): - ``` - nmake fpga_emu - ``` - * Compile for simulation (fast compile time, targets simulator FPGA device): - ``` - nmake fpga_sim - ``` - * Generate the optimization report: - ``` - nmake report - ``` - * Compile for FPGA hardware (longer compile time, targets FPGA device): - ``` - nmake fpga - ``` +``` +cmake .. -DFPGA_DEVICE=intel_s10sx_pac:pac_s10 +``` +You can also configure the build system for a custom FPGA platform. Ensure that the board support package is installed on your system. Then run `cmake` using the command: +``` +cmake .. -DFPGA_DEVICE=: +``` + +#### On a Windows* System +To configure the build system for the Intel® PAC with Intel Arria® 10 GX FPGA, run `cmake` using the command: +``` +cmake -G "NMake Makefiles" .. +``` +Alternatively, to configure the build system for the Intel® FPGA PAC D5005 (with Intel Stratix® 10 SX), run `cmake` using the command: + +``` +cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=intel_s10sx_pac:pac_s10 +``` +You can also configure the build system for a custom FPGA platform. Ensure that the board support package is installed on your system. Then run `cmake` using the command: +``` +cmake -G "NMake Makefiles" .. -DFPGA_DEVICE=: +``` + +### Compile the design + + +* Compile for emulation (fast compile time, targets emulated FPGA device): + ``` + cmake --build . --target fpga_emu + ``` +* Compile for simulation (fast compile time, targets simulator FPGA device): + ``` + cmake --build . --target fpga_sim + ``` +* Generate the optimization report: + ``` + cmake --build . --target report + ``` +* Compile for FPGA hardware (longer compile time, targets FPGA device): + ``` + cmake --build . --target fpga + ``` + +3. (Optional) As the above hardware compile may take several hours to complete, FPGA precompiled binaries (compatible with Linux* Ubuntu* 18.04) can be downloaded here. > **Note**: The Intel® PAC with Intel Arria® 10 GX FPGA and Intel® FPGA PAC D5005 (with Intel Stratix® 10 SX) do not support Windows*. Compiling to FPGA hardware on Windows* requires a third-party or custom Board Support Package (BSP) with Windows* support. > **Note**: If you encounter any issues with long paths when compiling under Windows*, you may have to create your ‘build’ directory in a shorter path, for example c:\samples\build. You can then run cmake from that directory, and provide cmake with the full path to your sample directory. ### Troubleshooting -If an error occurs, you can get more details by running `make` with -the `VERBOSE=1` argument: -``make VERBOSE=1`` +If an error occurs, you can get more details by running `cmake` with +the `-- VERBOSE=1` argument: +e.g. ``cmake --build . --target fpga_emu -- VERBOSE=1`` For more comprehensive troubleshooting, use the Diagnostics Utility for Intel® oneAPI Toolkits, which provides system checks to find missing dependencies and permissions errors. @@ -233,20 +213,20 @@ You can also check the achieved system fMAX to verify the earlier cal ## Running the Sample 1. Run the sample on the FPGA emulator (the kernel executes on the CPU): - ``` - ./loop_unroll.fpga_emu (Linux) - loop_unroll.fpga_emu.exe (Windows) - ``` + ``` + ./loop_unroll.fpga_emu (Linux) + loop_unroll.fpga_emu.exe (Windows) + ``` 2. Run the sample on the FPGA simulator device: - ``` - ./loop_unroll.fpga_sim (Linux) - loop_unroll.fpga_sim.exe (Windows) - ``` + ``` + ./loop_unroll.fpga_sim (Linux) + loop_unroll.fpga_sim.exe (Windows) + ``` 3. Run the sample on the FPGA device: - ``` - ./loop_unroll.fpga (Linux) - loop_unroll.fpga.exe (Windows) - ``` + ``` + ./loop_unroll.fpga (Linux) + loop_unroll.fpga.exe (Windows) + ``` ### Example of Output ``` From 2b0e09952a34b66e22fb54e538b32b29dc4fbb77 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Wed, 9 Nov 2022 09:13:49 -0800 Subject: [PATCH 04/22] include to all targets Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 0584f7f5c0..6689203b7f 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -90,6 +90,7 @@ target_compile_options(${SIMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${SIMULATOR_TARGET} PRIVATE ${SIMULATOR_COMPILE_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${SIMULATOR_LINK_FLAGS}) +target_link_libraries(${SIMULATOR_TARGET} fpga_samples_shared_hdr) set_target_properties(${SIMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${SIMULATOR_OUTPUT_NAME}) ############################################################################### @@ -103,6 +104,7 @@ target_compile_options(${REPORT_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${REPORT_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) target_link_libraries(${REPORT_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${REPORT_TARGET} ${HARDWARE_LINK_FLAGS}) +target_link_libraries(${REPORT_TARGET} fpga_samples_shared_hdr) set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NAME}) # fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® @@ -119,6 +121,7 @@ target_compile_options(${FPGA_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${FPGA_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) target_link_libraries(${FPGA_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${FPGA_TARGET} ${HARDWARE_LINK_FLAGS}) +target_link_libraries(${FPGA_TARGET} fpga_samples_shared_hdr) set_target_properties(${FPGA_TARGET} PROPERTIES OUTPUT_NAME ${FPGA_OUTPUT_NAME}) # The -reuse-exe flag enables rapid recompilation of host-only code changes. # See DPC++FPGA/GettingStarted/fast_recompile for details. From cf3d6ef9badbc8a9b96c4a48d45cc9c9a55738ce Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Thu, 10 Nov 2022 00:10:17 -0800 Subject: [PATCH 05/22] add include cmake Signed-off-by: Yohann Uguen --- .../DPC++FPGA/include/CMakeLists.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100755 DirectProgramming/DPC++FPGA/include/CMakeLists.txt diff --git a/DirectProgramming/DPC++FPGA/include/CMakeLists.txt b/DirectProgramming/DPC++FPGA/include/CMakeLists.txt new file mode 100755 index 0000000000..3a642c52e4 --- /dev/null +++ b/DirectProgramming/DPC++FPGA/include/CMakeLists.txt @@ -0,0 +1,17 @@ +add_library( fpga_samples_shared_hdr INTERFACE ) +target_sources( fpga_samples_shared_hdr INTERFACE + ${CMAKE_CURRENT_SOURCE_DIR}/constexpr_math.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/exception_handler.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/memory_utils.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/metaprogramming_utils.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/onchip_memory_with_cache.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/pipe_utils.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/rom_base.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/streaming_cholesky.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/streaming_cholesky_inversion.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/streaming_qrd.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/streaming_qri.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/tuple.hpp + ${CMAKE_CURRENT_SOURCE_DIR}/unrolled_loop.hpp +) +target_include_directories(fpga_samples_shared_hdr INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}) From 2b32e942fa9649cdf8964ac9e78a48832ec645d4 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Thu, 10 Nov 2022 05:30:51 -0800 Subject: [PATCH 06/22] force compiler on Windows Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 6689203b7f..c006f8d48f 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -3,7 +3,9 @@ if(UNIX) set(CMAKE_CXX_COMPILER icpx) else() # Windows - set(CMAKE_CXX_COMPILER icx-cl) + include (CMakeForceCompiler) + CMAKE_FORCE_CXX_COMPILER (icx-cl IntelDPCPP) + # set(CMAKE_CXX_COMPILER icx-cl) endif() cmake_minimum_required (VERSION 3.7.2) From 5cd5fda964e4f3804370ea0475b032c80e0e361f Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 15 Nov 2022 01:55:06 -0800 Subject: [PATCH 07/22] adding clang on windows Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index c006f8d48f..d344b40d07 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -5,7 +5,7 @@ if(UNIX) else() # Windows include (CMakeForceCompiler) CMAKE_FORCE_CXX_COMPILER (icx-cl IntelDPCPP) - # set(CMAKE_CXX_COMPILER icx-cl) + include (Platform/Windows-Clang) endif() cmake_minimum_required (VERSION 3.7.2) From 2f244df21ed5f91968504f881fcf73adf89e13a6 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Fri, 18 Nov 2022 02:09:54 -0800 Subject: [PATCH 08/22] fix report target Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index d344b40d07..a3825f174a 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -103,9 +103,9 @@ set_target_properties(${SIMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${SIMULATOR_OUT # The compile output is not an executable, but an intermediate compilation result unique to SYCL. add_executable(${REPORT_TARGET} ${SOURCE_FILE}) target_compile_options(${REPORT_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) -target_compile_options(${REPORT_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) +target_compile_options(${REPORT_TARGET} PRIVATE ${REPORT_COMPILE_FLAGS}) target_link_libraries(${REPORT_TARGET} ${COMMON_LINK_FLAGS}) -target_link_libraries(${REPORT_TARGET} ${HARDWARE_LINK_FLAGS}) +target_link_libraries(${REPORT_TARGET} ${REPORT_LINK_FLAGS}) target_link_libraries(${REPORT_TARGET} fpga_samples_shared_hdr) set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NAME}) # fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® From 5174e56932c283106815431ade553fd387b4d332 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Mon, 19 Dec 2022 02:11:39 -0800 Subject: [PATCH 09/22] integrating Paul's comments Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 115 ++++++++++++------ .../Features/loop_unroll/src/loop_unroll.cpp | 14 +-- .../DPC++FPGA/include/CMakeLists.txt | 17 --- 3 files changed, 83 insertions(+), 63 deletions(-) delete mode 100755 DirectProgramming/DPC++FPGA/include/CMakeLists.txt diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index a3825f174a..0f48c945d7 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -16,28 +16,68 @@ set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) +############################################################################### +### Customize these build variables +############################################################################### set(SOURCE_FILE src/loop_unroll.cpp) set(TARGET_NAME loop_unroll) +# Use cmake -DFPGA_DEVICE=: to choose a +# different device. Here are a few device examples (this list is not +# exhaustive): +# intel_s10sx_pac:pac_s10 +# intel_s10sx_pac:pac_s10_usm +# intel_a10gx_pac:pac_a10 +# Note that depending on your installation, you may need to specify the full +# path to the board support package (BSP), this usually is in your install +# folder. +# +# You can also specify a device family (E.g. "Arria10" or "Stratix10") or a +# specific part number (E.g. "10AS066N3F40E2SG") to generate a standalone IP. +if(NOT DEFINED FPGA_DEVICE) + set(FPGA_DEVICE "intel_s10sx_pac:pac_s10_usm") +endif() + +# Use cmake -DUSER_FPGA_FLAGS= to set extra flags for FPGA backend +# compilation. +set(USER_FPGA_FLAGS "${USER_FPGA_FLAGS}") + +# Use cmake -DUSER_FLAGS= to set extra flags for general compilation. +set(USER_FLAGS "${USER_FLAGS}") + +# Use cmake -DUSER_INCLUDE_PATHS= to set extra paths for general +# compilation. +set(USER_INCLUDE_PATHS "${USER_INCLUDE_PATHS}") +############################################################################### +### no changes after here +############################################################################### + +# Make cmake export the compile_commands.json file that contains the +# compile commands of each target +set(CMAKE_EXPORT_COMPILE_COMMANDS ON) + +# Print the device being used for the compiles +message(STATUS "Configuring the design to run on FPGA board ${FPGA_DEVICE}") + +# Set the names of the makefile targets to be generated by cmake set(EMULATOR_TARGET fpga_emu) set(SIMULATOR_TARGET fpga_sim) set(REPORT_TARGET report) set(FPGA_TARGET fpga) +set(IP_EXPORT_TARGET fpga_ip_export) +# Set the names of the generated files per makefile target set(EMULATOR_OUTPUT_NAME ${TARGET_NAME}.${EMULATOR_TARGET}) set(SIMULATOR_OUTPUT_NAME ${TARGET_NAME}.${SIMULATOR_TARGET}) set(REPORT_OUTPUT_NAME ${TARGET_NAME}.${REPORT_TARGET}) set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) -# FPGA board selection -if(NOT DEFINED FPGA_DEVICE) - set(FPGA_DEVICE "intel_a10gx_pac:pac_a10") - message(STATUS "FPGA_DEVICE was not specified.\ - \nConfiguring the design to run on the default FPGA board ${FPGA_DEVICE} (Intel(R) PAC with Intel Arria(R) 10 GX FPGA). \ - \nPlease refer to the README for information on board selection.") -else() - message(STATUS "Configuring the design to run on FPGA board ${FPGA_DEVICE}") -endif() +# Sanitize the user include path +set(INCLUDEPATHS_LIST ${USER_INCLUDE_PATHS}) +set(INCLUDEPATHS_LIST ../../../include) +separate_arguments(INCLUDEPATHS_LIST) +include_directories(${INCLUDEPATHS_LIST}) + # This is a Windows-specific flag that enables exception handling in host code if(WIN32) @@ -53,77 +93,74 @@ set(COMMON_LINK_FLAGS -fsycl -fintelfpga) # For this reason, FPGA backend flags must be passed as link flags in CMake. set(EMULATOR_COMPILE_FLAGS -DFPGA_EMULATOR) set(EMULATOR_LINK_FLAGS ) +set(REPORT_COMPILE_FLAGS -DFPGA_HARDWARE) +set(REPORT_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -fsycl-link=early) set(SIMULATOR_COMPILE_FLAGS -Xssimulation -DFPGA_SIMULATOR) set(SIMULATOR_LINK_FLAGS -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}) -set(REPORT_COMPILE_FLAGS ) -set(REPORT_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -fsycl-link=early) -set(HARDWARE_COMPILE_FLAGS ) +set(HARDWARE_COMPILE_FLAGS -DFPGA_HARDWARE) set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) # use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation -add_subdirectory(../../../include ${CMAKE_CURRENT_BINARY_DIR}/includes) - ############################################################################### ### FPGA Emulator ############################################################################### -# To compile in a single command: -# icpx -fsycl -fintelfpga -DFPGA_EMULATOR loop_unroll.cpp -o loop_unroll.fpga_emu -# CMake executes: -# [compile] icpx -fsycl -fintelfpga -DFPGA_EMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp -# [link] icpx -fsycl -fintelfpga loop_unroll.cpp.o -o loop_unroll.fpga_emu add_executable(${EMULATOR_TARGET} ${SOURCE_FILE}) target_compile_options(${EMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${EMULATOR_TARGET} PRIVATE ${EMULATOR_COMPILE_FLAGS}) target_link_libraries(${EMULATOR_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${EMULATOR_TARGET} ${EMULATOR_LINK_FLAGS}) -target_link_libraries(${EMULATOR_TARGET} fpga_samples_shared_hdr) set_target_properties(${EMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${EMULATOR_OUTPUT_NAME}) +# Make cmake print the locations of the command before building +add_custom_target( displayEmulationCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_EMULATOR) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/link.txt") +add_dependencies(${EMULATOR_TARGET} displayEmulationCommands) + ############################################################################### ### FPGA Simulator ############################################################################### -# To compile in a single command: -# icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= -DFPGA_SIMULATOR loop_unroll.cpp -o loop_unroll.fpga_sim -# CMake executes: -# [compile] icpx -fintelfpga -Xssimulation -DFPGA_SIMULATOR -o loop_unroll.cpp.o -c loop_unroll.cpp -# [link] icpx -fintelfpga -Xssimulation -Xsghdl -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga_sim add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) target_compile_options(${SIMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${SIMULATOR_TARGET} PRIVATE ${SIMULATOR_COMPILE_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${SIMULATOR_LINK_FLAGS}) -target_link_libraries(${SIMULATOR_TARGET} fpga_samples_shared_hdr) set_target_properties(${SIMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${SIMULATOR_OUTPUT_NAME}) +# Make cmake print the locations of the command before building +add_custom_target( displaySimulationCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_SIMULATOR) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${SIMULATOR_TARGET}.dir/link.txt") +add_dependencies(${SIMULATOR_TARGET} displaySimulationCommands) + ############################################################################### ### Generate Report ############################################################################### -# To compile manually: -# icpx -fsycl -fintelfpga -Xshardware -Xstarget= -fsycl-link=early loop_unroll.cpp -o loop_unroll.report -# The compile output is not an executable, but an intermediate compilation result unique to SYCL. add_executable(${REPORT_TARGET} ${SOURCE_FILE}) target_compile_options(${REPORT_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${REPORT_TARGET} PRIVATE ${REPORT_COMPILE_FLAGS}) target_link_libraries(${REPORT_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${REPORT_TARGET} ${REPORT_LINK_FLAGS}) -target_link_libraries(${REPORT_TARGET} fpga_samples_shared_hdr) set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NAME}) -# fsycl-link=early stops the compiler after RTL generation, before invoking Quartus® + +# Make cmake print the locations of the command before building +add_custom_target( displayReportCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_HARDWARE with fsycl-link=early) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${REPORT_TARGET}.dir/link.txt") +add_dependencies(${REPORT_TARGET} displayReportCommands) ############################################################################### ### FPGA Hardware ############################################################################### -# To compile in a single command: -# icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp -o loop_unroll.fpga -# CMake executes: -# [compile] icpx -fsycl -fintelfpga -o loop_unroll.cpp.o -c loop_unroll.cpp -# [link] icpx -fsycl -fintelfpga -Xshardware -Xstarget= loop_unroll.cpp.o -o loop_unroll.fpga add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) target_compile_options(${FPGA_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${FPGA_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) target_link_libraries(${FPGA_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${FPGA_TARGET} ${HARDWARE_LINK_FLAGS}) -target_link_libraries(${FPGA_TARGET} fpga_samples_shared_hdr) set_target_properties(${FPGA_TARGET} PROPERTIES OUTPUT_NAME ${FPGA_OUTPUT_NAME}) -# The -reuse-exe flag enables rapid recompilation of host-only code changes. -# See DPC++FPGA/GettingStarted/fast_recompile for details. + +# Make cmake print the locations of the command before building +add_custom_target( displayFPGACommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_HARDWARE without fsycl-link=early) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${FPGA_TARGET}.dir/link.txt") +add_dependencies(${FPGA_TARGET} displayFPGACommands) \ No newline at end of file diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/loop_unroll.cpp b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/loop_unroll.cpp index d94c07124c..07e4d7ea0a 100644 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/loop_unroll.cpp +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/src/loop_unroll.cpp @@ -27,16 +27,16 @@ void VecAdd(const std::vector &summands1, size_t array_size) { -#if defined(FPGA_EMULATOR) - ext::intel::fpga_emulator_selector device_selector; -#elif defined(FPGA_SIMULATOR) - ext::intel::fpga_simulator_selector device_selector; -#else - ext::intel::fpga_selector device_selector; +#if FPGA_SIMULATOR + auto selector = sycl::ext::intel::fpga_simulator_selector_v; +#elif FPGA_HARDWARE + auto selector = sycl::ext::intel::fpga_selector_v; +#else // #if FPGA_EMULATOR + auto selector = sycl::ext::intel::fpga_emulator_selector_v; #endif try { - queue q(device_selector, fpga_tools::exception_handler, + queue q(selector, fpga_tools::exception_handler, property::queue::enable_profiling{}); buffer buffer_summands1(summands1); diff --git a/DirectProgramming/DPC++FPGA/include/CMakeLists.txt b/DirectProgramming/DPC++FPGA/include/CMakeLists.txt deleted file mode 100755 index 3a642c52e4..0000000000 --- a/DirectProgramming/DPC++FPGA/include/CMakeLists.txt +++ /dev/null @@ -1,17 +0,0 @@ -add_library( fpga_samples_shared_hdr INTERFACE ) -target_sources( fpga_samples_shared_hdr INTERFACE - ${CMAKE_CURRENT_SOURCE_DIR}/constexpr_math.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/exception_handler.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/memory_utils.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/metaprogramming_utils.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/onchip_memory_with_cache.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/pipe_utils.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/rom_base.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/streaming_cholesky.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/streaming_cholesky_inversion.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/streaming_qrd.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/streaming_qri.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/tuple.hpp - ${CMAKE_CURRENT_SOURCE_DIR}/unrolled_loop.hpp -) -target_include_directories(fpga_samples_shared_hdr INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}) From 024ec20d546c34579de8f5f1e2edb20243240c99 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Mon, 19 Dec 2022 03:01:31 -0800 Subject: [PATCH 10/22] add the qactypes flag Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 27 ++++++++++++++----- 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 0f48c945d7..7c21ef8f80 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -48,6 +48,10 @@ set(USER_FLAGS "${USER_FLAGS}") # Use cmake -DUSER_INCLUDE_PATHS= to set extra paths for general # compilation. set(USER_INCLUDE_PATHS "${USER_INCLUDE_PATHS}") + +# Specify the location of the FPGA include directory +set(FPGA_INCLUDE_PATHS ../../../include) + ############################################################################### ### no changes after here ############################################################################### @@ -72,20 +76,26 @@ set(SIMULATOR_OUTPUT_NAME ${TARGET_NAME}.${SIMULATOR_TARGET}) set(REPORT_OUTPUT_NAME ${TARGET_NAME}.${REPORT_TARGET}) set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) -# Sanitize the user include path +# Get the user include path set(INCLUDEPATHS_LIST ${USER_INCLUDE_PATHS}) -set(INCLUDEPATHS_LIST ../../../include) +# Add the FPGA include directory location +list(APPEND INCLUDEPATHS_LIST ${FPGA_INCLUDE_PATHS}) +# Sanitize the include path separate_arguments(INCLUDEPATHS_LIST) include_directories(${INCLUDEPATHS_LIST}) - # This is a Windows-specific flag that enables exception handling in host code if(WIN32) + # add qactypes to link command on Windows only + set(QACTYPES "/Qactypes") set(WIN_FLAG "/EHsc") +else() + # add qactypes for Linux + set(QACTYPES "-qactypes") endif() -set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG}) -set(COMMON_LINK_FLAGS -fsycl -fintelfpga) +set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES}) +set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES}) # A SYCL ahead-of-time (AoT) compile processes the device code in two stages. # 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). @@ -139,7 +149,12 @@ add_dependencies(${SIMULATOR_TARGET} displaySimulationCommands) add_executable(${REPORT_TARGET} ${SOURCE_FILE}) target_compile_options(${REPORT_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${REPORT_TARGET} PRIVATE ${REPORT_COMPILE_FLAGS}) -target_link_libraries(${REPORT_TARGET} ${COMMON_LINK_FLAGS}) + +# The report target does not need the QACTYPES flag at link stage +set(MODIFIED_COMMON_LINK_FLAGS_REPORT ${COMMON_LINK_FLAGS}) +list(REMOVE_ITEM MODIFIED_COMMON_LINK_FLAGS_REPORT ${QACTYPES}) + +target_link_libraries(${REPORT_TARGET} ${MODIFIED_COMMON_LINK_FLAGS_REPORT}) target_link_libraries(${REPORT_TARGET} ${REPORT_LINK_FLAGS}) set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NAME}) From f6d4ca6f6388f8bd542225aa22cdf086fff108fa Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 20 Dec 2022 02:05:34 -0800 Subject: [PATCH 11/22] validated on Linux only Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 125 ++++++++++++------ 1 file changed, 88 insertions(+), 37 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 7c21ef8f80..1b48733ed1 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -47,19 +47,12 @@ set(USER_FLAGS "${USER_FLAGS}") # Use cmake -DUSER_INCLUDE_PATHS= to set extra paths for general # compilation. -set(USER_INCLUDE_PATHS "${USER_INCLUDE_PATHS}") - -# Specify the location of the FPGA include directory -set(FPGA_INCLUDE_PATHS ../../../include) +set(USER_INCLUDE_PATHS "${USER_INCLUDE_PATHS} ../../../include") ############################################################################### ### no changes after here ############################################################################### -# Make cmake export the compile_commands.json file that contains the -# compile commands of each target -set(CMAKE_EXPORT_COMPILE_COMMANDS ON) - # Print the device being used for the compiles message(STATUS "Configuring the design to run on FPGA board ${FPGA_DEVICE}") @@ -76,11 +69,8 @@ set(SIMULATOR_OUTPUT_NAME ${TARGET_NAME}.${SIMULATOR_TARGET}) set(REPORT_OUTPUT_NAME ${TARGET_NAME}.${REPORT_TARGET}) set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) -# Get the user include path -set(INCLUDEPATHS_LIST ${USER_INCLUDE_PATHS}) -# Add the FPGA include directory location -list(APPEND INCLUDEPATHS_LIST ${FPGA_INCLUDE_PATHS}) # Sanitize the include path +set(INCLUDEPATHS_LIST ${USER_INCLUDE_PATHS}) separate_arguments(INCLUDEPATHS_LIST) include_directories(${INCLUDEPATHS_LIST}) @@ -94,8 +84,8 @@ else() set(QACTYPES "-qactypes") endif() -set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES}) -set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES}) +set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES} ${USER_FLAGS}) +set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${USER_FLAGS}) # A SYCL ahead-of-time (AoT) compile processes the device code in two stages. # 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). @@ -121,12 +111,6 @@ target_link_libraries(${EMULATOR_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${EMULATOR_TARGET} ${EMULATOR_LINK_FLAGS}) set_target_properties(${EMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${EMULATOR_OUTPUT_NAME}) -# Make cmake print the locations of the command before building -add_custom_target( displayEmulationCommands ALL - ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" - COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_EMULATOR) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/link.txt") -add_dependencies(${EMULATOR_TARGET} displayEmulationCommands) - ############################################################################### ### FPGA Simulator ############################################################################### @@ -137,12 +121,6 @@ target_link_libraries(${SIMULATOR_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${SIMULATOR_LINK_FLAGS}) set_target_properties(${SIMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${SIMULATOR_OUTPUT_NAME}) -# Make cmake print the locations of the command before building -add_custom_target( displaySimulationCommands ALL - ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" - COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_SIMULATOR) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${SIMULATOR_TARGET}.dir/link.txt") -add_dependencies(${SIMULATOR_TARGET} displaySimulationCommands) - ############################################################################### ### Generate Report ############################################################################### @@ -158,12 +136,6 @@ target_link_libraries(${REPORT_TARGET} ${MODIFIED_COMMON_LINK_FLAGS_REPORT}) target_link_libraries(${REPORT_TARGET} ${REPORT_LINK_FLAGS}) set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NAME}) -# Make cmake print the locations of the command before building -add_custom_target( displayReportCommands ALL - ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" - COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_HARDWARE with fsycl-link=early) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${REPORT_TARGET}.dir/link.txt") -add_dependencies(${REPORT_TARGET} displayReportCommands) - ############################################################################### ### FPGA Hardware ############################################################################### @@ -174,8 +146,87 @@ target_link_libraries(${FPGA_TARGET} ${COMMON_LINK_FLAGS}) target_link_libraries(${FPGA_TARGET} ${HARDWARE_LINK_FLAGS}) set_target_properties(${FPGA_TARGET} PROPERTIES OUTPUT_NAME ${FPGA_OUTPUT_NAME}) -# Make cmake print the locations of the command before building -add_custom_target( displayFPGACommands ALL - ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" - COMMENT "Find the compile command in ${CMAKE_CURRENT_BINARY_DIR}/compile_commands.json (the one using FPGA_HARDWARE without fsycl-link=early) and the link command in ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${FPGA_TARGET}.dir/link.txt") -add_dependencies(${FPGA_TARGET} displayFPGACommands) \ No newline at end of file +############################################################################### +### This part only manipulates cmake variables to print the commands to the user +############################################################################### + +file(TO_NATIVE_PATH "/" SEPARATOR) +file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}${SEPARATOR}CMakeFiles/${EMULATOR_TARGET}.dir${SEPARATOR}${SOURCE_FILE}.o) +file(RELATIVE_PATH SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}${SEPARATOR}${SOURCE_FILE}) + +function(getCompileCommands includes common_compile_flags special_compile_flags common_link_flags special_link_flags output_name) + + # Creating a string that contains the compile command + # Start by the compiler invocation + set(output "${CMAKE_CXX_COMPILER}") + + # Add all the potential includes + foreach(INCLUDE ${includes}) + file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}${SEPARATOR}${INCLUDE}) + set(output "${output} -I${INCLUDE}") + endforeach() + + # Add all the common compile flags + foreach(FLAG ${common_compile_flags}) + set(output "${output} ${FLAG}") + endforeach() + + # Add all the specific compile flags + foreach(FLAG ${special_compile_flags}) + set(output "${output} ${FLAG}") + endforeach() + + # Add the source file and the output file + set(COMPILE_COMMAND "${output} -c ${SOURCE_FILE} -o ${OBJ_FILE}" PARENT_SCOPE) + + # Creating a string that contains the link command + # Start by the compiler invocation + set(LINK_COMMAND "${CMAKE_CXX_COMPILER}") + + # Add all the common link flags + foreach(FLAG ${common_link_flags}) + set(LINK_COMMAND "${LINK_COMMAND} ${FLAG}") + endforeach() + + # Add all the specific link flags + foreach(FLAG ${special_link_flags}) + set(LINK_COMMAND "${LINK_COMMAND} ${FLAG}") + endforeach() + + # Add the source file and the output file + set(LINK_COMMAND "${LINK_COMMAND} ${OBJ_FILE} -o ${output_name}" PARENT_SCOPE) + +endfunction() + +# Display the compile instructions in the emulation flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${EMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${EMULATOR_LINK_FLAGS}" "${EMULATOR_OUTPUT_NAME}") + + +add_custom_target( displayEmulationCompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${EMULATOR_TARGET} displayEmulationCompileCommands) + +# Display the compile instructions in the simulation flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${SIMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${SIMULATOR_LINK_FLAGS}" "${SIMULATOR_OUTPUT_NAME}") + +add_custom_target( displaySimulationCompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${SIMULATOR_TARGET} displaySimulationCompileCommands) + +# Display the compile instructions in the report flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${REPORT_COMPILE_FLAGS}" "${MODIFIED_COMMON_LINK_FLAGS_REPORT}" "${REPORT_LINK_FLAGS}" "${REPORT_OUTPUT_NAME}") + +add_custom_target( displayReportCompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${REPORT_TARGET} displayReportCompileCommands) + +# Display the compile instructions in the fpga flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${FPGA_LINK_FLAGS}" "${FPGA_OUTPUT_NAME}") + +add_custom_target( displayFPGACompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${FPGA_TARGET} displayFPGACompileCommands) From ca75f6817cf5c7be69840072c38a8316b2b5101b Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 20 Dec 2022 03:22:32 -0800 Subject: [PATCH 12/22] fix windows commands Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 42 +++++++++++++------ 1 file changed, 30 insertions(+), 12 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 1b48733ed1..37c38619c4 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -19,7 +19,7 @@ set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) ############################################################################### ### Customize these build variables ############################################################################### -set(SOURCE_FILE src/loop_unroll.cpp) +set(SOURCE_FILE_NAME "src/loop_unroll.cpp") set(TARGET_NAME loop_unroll) # Use cmake -DFPGA_DEVICE=: to choose a @@ -77,7 +77,7 @@ include_directories(${INCLUDEPATHS_LIST}) # This is a Windows-specific flag that enables exception handling in host code if(WIN32) # add qactypes to link command on Windows only - set(QACTYPES "/Qactypes") + set(QACTYPES "-Qactypes") set(WIN_FLAG "/EHsc") else() # add qactypes for Linux @@ -101,6 +101,9 @@ set(HARDWARE_COMPILE_FLAGS -DFPGA_HARDWARE) set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) # use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation +# Set the source file as a path rather than a string +set(SOURCE_FILE ${SOURCE_FILE_NAME}) + ############################################################################### ### FPGA Emulator ############################################################################### @@ -150,11 +153,18 @@ set_target_properties(${FPGA_TARGET} PROPERTIES OUTPUT_NAME ${FPGA_OUTPUT_NAME}) ### This part only manipulates cmake variables to print the commands to the user ############################################################################### -file(TO_NATIVE_PATH "/" SEPARATOR) -file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}${SEPARATOR}CMakeFiles/${EMULATOR_TARGET}.dir${SEPARATOR}${SOURCE_FILE}.o) -file(RELATIVE_PATH SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}${SEPARATOR}${SOURCE_FILE}) +# set the correct object file extension depending on the target platform +if(WIN32) + set(OBJ_EXTENSION "obj") +else() + set(OBJ_EXTENSION "o") +endif() + +# Get the relative path to the source and object files +file(RELATIVE_PATH SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${SOURCE_FILE}) +file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/${SOURCE_FILE_NAME}.${OBJ_EXTENSION}) -function(getCompileCommands includes common_compile_flags special_compile_flags common_link_flags special_link_flags output_name) +function(getCompileCommands includes common_compile_flags special_compile_flags common_link_flags special_link_flags target output_name) # Creating a string that contains the compile command # Start by the compiler invocation @@ -162,7 +172,7 @@ function(getCompileCommands includes common_compile_flags special_compile_flags # Add all the potential includes foreach(INCLUDE ${includes}) - file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}${SEPARATOR}${INCLUDE}) + file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) set(output "${output} -I${INCLUDE}") endforeach() @@ -176,6 +186,9 @@ function(getCompileCommands includes common_compile_flags special_compile_flags set(output "${output} ${FLAG}") endforeach() + # Get the location of the object file + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${target}.dir/${SOURCE_FILE_NAME}.${OBJ_EXTENSION}) + # Add the source file and the output file set(COMPILE_COMMAND "${output} -c ${SOURCE_FILE} -o ${OBJ_FILE}" PARENT_SCOPE) @@ -198,8 +211,13 @@ function(getCompileCommands includes common_compile_flags special_compile_flags endfunction() +# Windows executable is going to have the .exe extension +if(WIN32) + set(EXECUTABLE_EXTENSION ".exe") +endif() + # Display the compile instructions in the emulation flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${EMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${EMULATOR_LINK_FLAGS}" "${EMULATOR_OUTPUT_NAME}") +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${EMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${EMULATOR_LINK_FLAGS}" "${EMULATOR_TARGET}" "${EMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displayEmulationCompileCommands ALL @@ -208,7 +226,7 @@ add_custom_target( displayEmulationCompileCommands ALL add_dependencies(${EMULATOR_TARGET} displayEmulationCompileCommands) # Display the compile instructions in the simulation flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${SIMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${SIMULATOR_LINK_FLAGS}" "${SIMULATOR_OUTPUT_NAME}") +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${SIMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${SIMULATOR_LINK_FLAGS}" "${SIMULATOR_TARGET}" "${SIMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displaySimulationCompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" @@ -216,7 +234,7 @@ add_custom_target( displaySimulationCompileCommands ALL add_dependencies(${SIMULATOR_TARGET} displaySimulationCompileCommands) # Display the compile instructions in the report flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${REPORT_COMPILE_FLAGS}" "${MODIFIED_COMMON_LINK_FLAGS_REPORT}" "${REPORT_LINK_FLAGS}" "${REPORT_OUTPUT_NAME}") +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${REPORT_COMPILE_FLAGS}" "${MODIFIED_COMMON_LINK_FLAGS_REPORT}" "${REPORT_LINK_FLAGS}" "${REPORT_TARGET}" "${REPORT_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displayReportCompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" @@ -224,9 +242,9 @@ add_custom_target( displayReportCompileCommands ALL add_dependencies(${REPORT_TARGET} displayReportCompileCommands) # Display the compile instructions in the fpga flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${FPGA_LINK_FLAGS}" "${FPGA_OUTPUT_NAME}") +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${FPGA_LINK_FLAGS}" "${FPGA_TARGET}" "${FPGA_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displayFPGACompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") -add_dependencies(${FPGA_TARGET} displayFPGACompileCommands) +add_dependencies(${FPGA_TARGET} displayFPGACompileCommands) \ No newline at end of file From ea8047e5db10ce09c663fb3ff066433acd52a45c Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 20 Dec 2022 08:00:09 -0800 Subject: [PATCH 13/22] support for multiple input files Signed-off-by: Yohann Uguen --- .../ReferenceDesigns/gzip/CMakeLists.txt | 322 +++++++++++++++++- .../ReferenceDesigns/gzip/src/CMakeLists.txt | 151 -------- .../Features/loop_unroll/CMakeLists.txt | 80 +++-- 3 files changed, 365 insertions(+), 188 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/CMakeLists.txt b/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/CMakeLists.txt index d738ef43e8..eeb01c63fb 100755 --- a/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/CMakeLists.txt @@ -1,15 +1,14 @@ +# Direct CMake to use icpx rather than the default C++ compiler/linker on Linux +# and icx-cl on Windows if(UNIX) - # Direct CMake to use icpx rather than the default C++ compiler/linker set(CMAKE_CXX_COMPILER icpx) else() # Windows - # Force CMake to use icx-cl rather than the default C++ compiler/linker - # (needed on Windows only) include (CMakeForceCompiler) CMAKE_FORCE_CXX_COMPILER (icx-cl IntelDPCPP) include (Platform/Windows-Clang) endif() -cmake_minimum_required (VERSION 3.4) +cmake_minimum_required (VERSION 3.7.2) project(GZip CXX) @@ -17,4 +16,317 @@ set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) -add_subdirectory (src) +############################################################################### +### Customize these build variables +############################################################################### +if(LOW_LATENCY) + # Compile the low latency version of the design + message(STATUS "Compiling the Low Latency variant of the design") + set(SOURCE_FILE src/gzip_ll.cpp src/crc32.cpp src/WriteGzip.cpp src/CompareGzip.cpp src/gzipkernel_ll.cpp ) +else() + # Compile the high bandwidth version of the design + message(STATUS "Compiling the High Bandwidth variation of the design") + set(SOURCE_FILE src/gzip.cpp src/crc32.cpp src/WriteGzip.cpp src/CompareGzip.cpp src/gzipkernel.cpp) +endif() + +set(TARGET_NAME gzip) + +# Use cmake -DFPGA_DEVICE=: to choose a +# different device. Here are a few device examples (this list is not +# exhaustive): +# intel_s10sx_pac:pac_s10 +# intel_s10sx_pac:pac_s10_usm +# intel_a10gx_pac:pac_a10 +# Note that depending on your installation, you may need to specify the full +# path to the board support package (BSP), this usually is in your install +# folder. +# +# You can also specify a device family (E.g. "Arria10" or "Stratix10") or a +# specific part number (E.g. "10AS066N3F40E2SG") to generate a standalone IP. +if(NOT DEFINED FPGA_DEVICE) + set(FPGA_DEVICE "intel_s10sx_pac:pac_s10_usm") +endif() + +# Use cmake -DUSER_FPGA_FLAGS= to set extra flags for FPGA backend +# compilation. +set(USER_FPGA_FLAGS "${USER_FPGA_FLAGS}") + +# Use cmake -DUSER_FLAGS= to set extra flags for general compilation. +set(USER_FLAGS "${USER_FLAGS}") + +# Use cmake -DUSER_INCLUDE_PATHS= to set extra paths for general +# compilation. +set(USER_INCLUDE_PATHS "${USER_INCLUDE_PATHS} ../../include") + +############################################################################### +### no changes after here +############################################################################### + +# Print the device being used for the compiles +message(STATUS "Configuring the design to run on FPGA board ${FPGA_DEVICE}") + +# Set design parameters according to the selected chip +if(FPGA_DEVICE MATCHES ".*a10.*") + # A10 parameters + set(NUM_ENGINES 1) + if(DEFINED LOW_LATENCY) + set(SEED "-Xsseed=4") + set(NUM_REORDER "") + else() + set(SEED "-Xsseed=4") + set(NUM_REORDER "") + endif() +elseif(FPGA_DEVICE MATCHES ".*s10.*") + # S10 parameters + set(NUM_ENGINES 2) + if(DEFINED LOW_LATENCY) + set(SEED "-Xsseed=16") + set(NUM_REORDER "") + else() + set(SEED "-Xsseed=4") + # For the High Bandwidth variant, specify 6 reordering units to improve global memory read bandwidth across 4 channels of DDR. + # For Low Latency variant this is not necessary since only one channel of global memory is used (host memory). + set(NUM_REORDER "-Xsnum-reorder=6") + endif() +elseif(FPGA_DEVICE MATCHES ".*agilex.*") + # Agilex™ + set(NUM_ENGINES 2) + if(DEFINED LOW_LATENCY) + set(SEED "-Xsseed=1") + set(NUM_REORDER "") + else() + set(SEED "-Xsseed=8") + # For the High Bandwidth variant, specify 6 reordering units to improve global memory read bandwidth across 4 channels of DDR. + # For Low Latency variant this is not necessary since only one channel of global memory is used (host memory). + set(NUM_REORDER "-Xsnum-reorder=6") + endif() +else() + set(NUM_ENGINES 1) + set(SEED "-Xsseed=1") + set(NUM_REORDER "") +endif() + +if(IGNORE_DEFAULT_SEED) + set(SEED "") +endif() + +# Presence of USM host allocations (and whether to turn on enable the low-latency target) is detected automatically by +# looking at the name of the BSP, or manually by the user when running CMake. +# E.g., cmake .. -DUSER_ENABLE_USM=1 +if(FPGA_DEVICE MATCHES ".*usm.*" OR USER_ENABLE_USM) + set(USM_ENABLED 1) +elseif(LOW_LATENCY) + # Low latency design requires USM, so error out + message(FATAL_ERROR "Error: The Low Latency variant of the design requires USM host allocations") +endif() + + +# Set the names of the makefile targets to be generated by cmake +set(EMULATOR_TARGET fpga_emu) +set(SIMULATOR_TARGET fpga_sim) +set(REPORT_TARGET report) +set(FPGA_TARGET fpga) +set(IP_EXPORT_TARGET fpga_ip_export) + +# Set the names of the generated files per makefile target +set(EMULATOR_OUTPUT_NAME ${TARGET_NAME}.${EMULATOR_TARGET}) +set(SIMULATOR_OUTPUT_NAME ${TARGET_NAME}.${SIMULATOR_TARGET}) +set(REPORT_OUTPUT_NAME ${TARGET_NAME}.${REPORT_TARGET}) +set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) + +# Sanitize the include path +set(INCLUDEPATHS_LIST ${USER_INCLUDE_PATHS}) +separate_arguments(INCLUDEPATHS_LIST) +include_directories(${INCLUDEPATHS_LIST}) + +# This is a Windows-specific flag that enables exception handling in host code +if(WIN32) + # add qactypes to link command on Windows only + set(QACTYPES "-Qactypes") + set(WIN_FLAG "/EHsc") +else() + # add qactypes for Linux + set(QACTYPES "-qactypes") +endif() + +set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES} ${USER_FLAGS}) +set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${USER_FLAGS}) + +# A SYCL ahead-of-time (AoT) compile processes the device code in two stages. +# 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). +# 2. The "link" stage invokes the compiler's FPGA backend before linking. +# For this reason, FPGA backend flags must be passed as link flags in CMake. +set(EMULATOR_COMPILE_FLAGS -DNUM_ENGINES=${NUM_ENGINES} -DFPGA_EMULATOR) +set(EMULATOR_LINK_FLAGS -DNUM_ENGINES=${NUM_ENGINES}) +set(REPORT_COMPILE_FLAGS -DNUM_ENGINES=${NUM_ENGINES} -DFPGA_HARDWARE) +set(REPORT_LINK_FLAGS ${NUM_REORDER} -Xsopt-arg=\"-nocaching\" -DNUM_ENGINES=${NUM_ENGINES} -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -fsycl-link=early) +set(SIMULATOR_COMPILE_FLAGS -DNUM_ENGINES=${NUM_ENGINES} -Xssimulation -DFPGA_SIMULATOR) +set(SIMULATOR_LINK_FLAGS -DNUM_ENGINES=${NUM_ENGINES} -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}) +set(HARDWARE_COMPILE_FLAGS -DNUM_ENGINES=${NUM_ENGINES} -DFPGA_HARDWARE) +set(HARDWARE_LINK_FLAGS ${NUM_REORDER} -Xsparallel=2 ${SEED} -Xsopt-arg=\"-nocaching\" -DNUM_ENGINES=${NUM_ENGINES} -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) +# use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation + +# Set the source file names in a string +set(SOURCE_FILE_NAME "${SOURCE_FILE}") + +############################################################################### +### FPGA Emulator +############################################################################### +add_executable(${EMULATOR_TARGET} ${SOURCE_FILE}) +target_compile_options(${EMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${EMULATOR_TARGET} PRIVATE ${EMULATOR_COMPILE_FLAGS}) +target_link_libraries(${EMULATOR_TARGET} ${COMMON_LINK_FLAGS}) +target_link_libraries(${EMULATOR_TARGET} ${EMULATOR_LINK_FLAGS}) +set_target_properties(${EMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${EMULATOR_OUTPUT_NAME}) + +############################################################################### +### FPGA Simulator +############################################################################### +add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) +target_compile_options(${SIMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${SIMULATOR_TARGET} PRIVATE ${SIMULATOR_COMPILE_FLAGS}) +target_link_libraries(${SIMULATOR_TARGET} ${COMMON_LINK_FLAGS}) +target_link_libraries(${SIMULATOR_TARGET} ${SIMULATOR_LINK_FLAGS}) +set_target_properties(${SIMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${SIMULATOR_OUTPUT_NAME}) + +############################################################################### +### Generate Report +############################################################################### +add_executable(${REPORT_TARGET} ${SOURCE_FILE}) +target_compile_options(${REPORT_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${REPORT_TARGET} PRIVATE ${REPORT_COMPILE_FLAGS}) + +# The report target does not need the QACTYPES flag at link stage +set(MODIFIED_COMMON_LINK_FLAGS_REPORT ${COMMON_LINK_FLAGS}) +list(REMOVE_ITEM MODIFIED_COMMON_LINK_FLAGS_REPORT ${QACTYPES}) + +target_link_libraries(${REPORT_TARGET} ${MODIFIED_COMMON_LINK_FLAGS_REPORT}) +target_link_libraries(${REPORT_TARGET} ${REPORT_LINK_FLAGS}) +set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NAME}) + +############################################################################### +### FPGA Hardware +############################################################################### +add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) +target_compile_options(${FPGA_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) +target_compile_options(${FPGA_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) +target_link_libraries(${FPGA_TARGET} ${COMMON_LINK_FLAGS}) +target_link_libraries(${FPGA_TARGET} ${HARDWARE_LINK_FLAGS}) +set_target_properties(${FPGA_TARGET} PROPERTIES OUTPUT_NAME ${FPGA_OUTPUT_NAME}) + +############################################################################### +### This part only manipulates cmake variables to print the commands to the user +############################################################################### + +# set the correct object file extension depending on the target platform +if(WIN32) + set(OBJ_EXTENSION "obj") +else() + set(OBJ_EXTENSION "o") +endif() + + +function(getCompileCommands includes common_compile_flags special_compile_flags common_link_flags special_link_flags target output_name) + + set(file_names ${SOURCE_FILE_NAME}) + foreach(source ${file_names}) + # Get the relative path to the source and object files + file(RELATIVE_PATH CURRENT_SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${source}) + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/${source}.${OBJ_EXTENSION}) + + # Creating a string that contains the compile command + # Start by the compiler invocation + set(COMPILE_COMMAND "${COMPILE_COMMAND}${CMAKE_CXX_COMPILER}") + + # Add all the potential includes + foreach(INCLUDE ${includes}) + file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) + set(COMPILE_COMMAND "${COMPILE_COMMAND} -I${INCLUDE}") + endforeach() + + # Add all the common compile flags + foreach(FLAG ${common_compile_flags}) + set(COMPILE_COMMAND "${COMPILE_COMMAND} ${FLAG}") + endforeach() + + # Add all the specific compile flags + foreach(FLAG ${special_compile_flags}) + set(COMPILE_COMMAND "${COMPILE_COMMAND} ${FLAG}") + endforeach() + + # Get the location of the object file + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${target}.dir/${source}.${OBJ_EXTENSION}) + + # Add the source file and the output file + set(COMPILE_COMMAND "${COMPILE_COMMAND} -c ${CURRENT_SOURCE_FILE} -o ${OBJ_FILE}\n") + endforeach() + + set(COMPILE_COMMAND "${COMPILE_COMMAND}" PARENT_SCOPE) + + # Creating a string that contains the link command + # Start by the compiler invocation + set(LINK_COMMAND "${LINK_COMMAND}${CMAKE_CXX_COMPILER}") + + # Add all the common link flags + foreach(FLAG ${common_link_flags}) + set(LINK_COMMAND "${LINK_COMMAND} ${FLAG}") + endforeach() + + # Add all the specific link flags + foreach(FLAG ${special_link_flags}) + set(LINK_COMMAND "${LINK_COMMAND} ${FLAG}") + endforeach() + + # Add the output file + set(LINK_COMMAND "${LINK_COMMAND} -o ${output_name}") + + foreach(source ${file_names}) + # Get the relative path to the source and object files + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/${source}.${OBJ_EXTENSION}) + + # Add the source file and the output file + set(LINK_COMMAND "${LINK_COMMAND} ${OBJ_FILE}") + endforeach() + + set(LINK_COMMAND "${LINK_COMMAND}" PARENT_SCOPE) + + +endfunction() + +# Windows executable is going to have the .exe extension +if(WIN32) + set(EXECUTABLE_EXTENSION ".exe") +endif() + +# Display the compile instructions in the emulation flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${EMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${EMULATOR_LINK_FLAGS}" "${EMULATOR_TARGET}" "${EMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") + + +add_custom_target( displayEmulationCompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${EMULATOR_TARGET} displayEmulationCompileCommands) + +# Display the compile instructions in the simulation flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${SIMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${SIMULATOR_LINK_FLAGS}" "${SIMULATOR_TARGET}" "${SIMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") + +add_custom_target( displaySimulationCompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${SIMULATOR_TARGET} displaySimulationCompileCommands) + +# Display the compile instructions in the report flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${REPORT_COMPILE_FLAGS}" "${MODIFIED_COMMON_LINK_FLAGS_REPORT}" "${REPORT_LINK_FLAGS}" "${REPORT_TARGET}" "${REPORT_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") + +add_custom_target( displayReportCompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${REPORT_TARGET} displayReportCompileCommands) + +# Display the compile instructions in the fpga flow +getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${FPGA_LINK_FLAGS}" "${FPGA_TARGET}" "${FPGA_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") + +add_custom_target( displayFPGACompileCommands ALL + ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" + COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") +add_dependencies(${FPGA_TARGET} displayFPGACompileCommands) \ No newline at end of file diff --git a/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt b/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt index aa37c8f46d..e69de29bb2 100755 --- a/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/ReferenceDesigns/gzip/src/CMakeLists.txt @@ -1,151 +0,0 @@ -set(TARGET_NAME gzip) - - -if(LOW_LATENCY) - # Compile the low latency version of the design - message(STATUS "Compiling the Low Latency variant of the design") - set(SOURCE_FILE gzip_ll.cpp crc32.cpp WriteGzip.cpp CompareGzip.cpp) - set(DEVICE_SOURCE_FILE gzipkernel_ll.cpp) - set(DEVICE_HEADER_FILE gzipkernel_ll.hpp) -else() - # Compile the high bandwidth version of the design - message(STATUS "Compiling the High Bandwidth variation of the design") - set(SOURCE_FILE gzip.cpp crc32.cpp WriteGzip.cpp CompareGzip.cpp) - set(DEVICE_SOURCE_FILE gzipkernel.cpp) - set(DEVICE_HEADER_FILE gzipkernel.hpp) -endif() - -set(EMULATOR_TARGET ${TARGET_NAME}.fpga_emu) -set(SIMULATOR_TARGET ${TARGET_NAME}.fpga_sim) -set(FPGA_TARGET ${TARGET_NAME}.fpga) - -# FPGA board selection -if(NOT DEFINED FPGA_DEVICE) - set(FPGA_DEVICE "intel_a10gx_pac:pac_a10") - message(STATUS "FPGA_DEVICE was not specified.\ - \nConfiguring the design to run on the default FPGA board ${FPGA_DEVICE} (Intel(R) PAC with Intel Arria(R) 10 GX FPGA). \ - \nPlease refer to the README for information on board selection.") -else() - message(STATUS "Configuring the design to run on FPGA board ${FPGA_DEVICE}") -endif() - -# This is a Windows-specific flag that enables error handling in host code -if(WIN32) - set(WIN_FLAG "/EHsc") -endif() - -# Set design parameters according to the selected chip -if(FPGA_DEVICE MATCHES ".*a10.*") - # A10 parameters - set(NUM_ENGINES 1) - if(DEFINED LOW_LATENCY) - set(SEED "-Xsseed=4") - set(NUM_REORDER "") - else() - set(SEED "-Xsseed=4") - set(NUM_REORDER "") - endif() -elseif(FPGA_DEVICE MATCHES ".*s10.*") - # S10 parameters - set(NUM_ENGINES 2) - if(DEFINED LOW_LATENCY) - set(SEED "-Xsseed=16") - set(NUM_REORDER "") - else() - set(SEED "-Xsseed=4") - # For the High Bandwidth variant, specify 6 reordering units to improve global memory read bandwidth across 4 channels of DDR. - # For Low Latency variant this is not necessary since only one channel of global memory is used (host memory). - set(NUM_REORDER "-Xsnum-reorder=6") - endif() -elseif(FPGA_DEVICE MATCHES ".*agilex.*") - # Agilex™ - set(NUM_ENGINES 2) - if(DEFINED LOW_LATENCY) - set(SEED "-Xsseed=1") - set(NUM_REORDER "") - else() - set(SEED "-Xsseed=8") - # For the High Bandwidth variant, specify 6 reordering units to improve global memory read bandwidth across 4 channels of DDR. - # For Low Latency variant this is not necessary since only one channel of global memory is used (host memory). - set(NUM_REORDER "-Xsnum-reorder=6") - endif() -else() - set(NUM_ENGINES 1) - set(SEED "-Xsseed=1") - set(NUM_REORDER "") -endif() - -if(IGNORE_DEFAULT_SEED) - set(SEED "") -endif() - - -# Presence of USM host allocations (and whether to turn on enable the low-latency target) is detected automatically by -# looking at the name of the BSP, or manually by the user when running CMake. -# E.g., cmake .. -DUSER_ENABLE_USM=1 -if(FPGA_DEVICE MATCHES ".*usm.*" OR USER_ENABLE_USM) - set(USM_ENABLED 1) -elseif(LOW_LATENCY) - # Low latency design requires USM, so error out - message(FATAL_ERROR "Error: The Low Latency variant of the design requires USM host allocations") -endif() - -message(STATUS "NUM_ENGINES=${NUM_ENGINES}") -message(STATUS "SEED=${SEED}") -message(STATUS "NUM_REORDER=${NUM_REORDER}") - -# A SYCL ahead-of-time (AoT) compile processes the device code in two stages. -# 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). -# 2. The "link" stage invokes the compiler's FPGA backend before linking. -# For this reason, FPGA backend flags must be passed as link flags in CMake. -set(EMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DNUM_ENGINES=${NUM_ENGINES} -DFPGA_EMULATOR") -set(EMULATOR_LINK_FLAGS "-fsycl -fintelfpga -DNUM_ENGINES=${NUM_ENGINES}") -set(SIMULATOR_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -Xssimulation -DNUM_ENGINES=${NUM_ENGINES} -DFPGA_SIMULATOR") -set(SIMULATOR_LINK_FLAGS "-fsycl -fintelfpga -Xssimulation -Xstarget=${FPGA_DEVICE} -DNUM_ENGINES=${NUM_ENGINES} ${USER_SIMULATOR_FLAGS}") -set(HARDWARE_COMPILE_FLAGS "-Wall ${WIN_FLAG} -fsycl -fintelfpga -DNUM_ENGINES=${NUM_ENGINES}") -set(HARDWARE_LINK_FLAGS "-fsycl -fintelfpga -Xshardware -Xsparallel=2 -Xsopt-arg=\"-nocaching\" -Xstarget=${FPGA_DEVICE} -DNUM_ENGINES=${NUM_ENGINES} ${USER_HARDWARE_FLAGS}") -# use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA backend compilation - -############################################################################### -### FPGA Emulator -############################################################################### -add_executable(${EMULATOR_TARGET} ${SOURCE_FILE} ${DEVICE_SOURCE_FILE}) -target_include_directories(${EMULATOR_TARGET} PRIVATE ../../../include) -set_target_properties(${EMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${EMULATOR_COMPILE_FLAGS}") -set_target_properties(${EMULATOR_TARGET} PROPERTIES LINK_FLAGS "${EMULATOR_LINK_FLAGS}") -add_custom_target(fpga_emu DEPENDS ${EMULATOR_TARGET}) - -############################################################################### -### FPGA Simulator -############################################################################### -add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE} ${DEVICE_SOURCE_FILE}) -target_include_directories(${SIMULATOR_TARGET} PRIVATE ../../../include) -set_target_properties(${SIMULATOR_TARGET} PROPERTIES COMPILE_FLAGS "${SIMULATOR_COMPILE_FLAGS}") -set_target_properties(${SIMULATOR_TARGET} PROPERTIES LINK_FLAGS "${SIMULATOR_LINK_FLAGS}") -add_custom_target(fpga_sim DEPENDS ${SIMULATOR_TARGET}) - -############################################################################### -### Generate Report -############################################################################### -set(FPGA_EARLY_IMAGE ${TARGET_NAME}_report.a) -# The compile output is not an executable, but an intermediate compilation result unique to SYCL. -add_executable(${FPGA_EARLY_IMAGE} ${SOURCE_FILE} ${DEVICE_SOURCE_FILE}) -target_include_directories(${FPGA_EARLY_IMAGE} PRIVATE ../../../include) -add_custom_target(report DEPENDS ${FPGA_EARLY_IMAGE}) -set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") -set_target_properties(${FPGA_EARLY_IMAGE} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} ${NUM_REORDER} ${SEED} -fsycl-link=early") -# fsycl-link=early stops the compiler after RTL generation, before invoking Quartus - -############################################################################### -### FPGA Hardware -############################################################################### -add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE} ${DEVICE_SOURCE_FILE}) -target_include_directories(${FPGA_TARGET} PRIVATE ../../../include) -add_custom_target(fpga DEPENDS ${FPGA_TARGET}) -set_target_properties(${FPGA_TARGET} PROPERTIES COMPILE_FLAGS "${HARDWARE_COMPILE_FLAGS}") -set_target_properties(${FPGA_TARGET} PROPERTIES LINK_FLAGS "${HARDWARE_LINK_FLAGS} ${NUM_REORDER} ${SEED} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_TARGET}") -# The -reuse-exe flag enables rapid recompilation of host-only code changes. -# See DPC++FPGA/GettingStarted/fast_recompile for details. - - - diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 37c38619c4..00195d53a9 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -19,7 +19,7 @@ set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) ############################################################################### ### Customize these build variables ############################################################################### -set(SOURCE_FILE_NAME "src/loop_unroll.cpp") +set(SOURCE_FILE src/loop_unroll.cpp) set(TARGET_NAME loop_unroll) # Use cmake -DFPGA_DEVICE=: to choose a @@ -101,8 +101,8 @@ set(HARDWARE_COMPILE_FLAGS -DFPGA_HARDWARE) set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) # use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation -# Set the source file as a path rather than a string -set(SOURCE_FILE ${SOURCE_FILE_NAME}) +# Set the source file names in a string +set(SOURCE_FILE_NAME "${SOURCE_FILE}") ############################################################################### ### FPGA Emulator @@ -160,41 +160,47 @@ else() set(OBJ_EXTENSION "o") endif() -# Get the relative path to the source and object files -file(RELATIVE_PATH SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${SOURCE_FILE}) -file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/${SOURCE_FILE_NAME}.${OBJ_EXTENSION}) function(getCompileCommands includes common_compile_flags special_compile_flags common_link_flags special_link_flags target output_name) - # Creating a string that contains the compile command - # Start by the compiler invocation - set(output "${CMAKE_CXX_COMPILER}") - - # Add all the potential includes - foreach(INCLUDE ${includes}) - file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) - set(output "${output} -I${INCLUDE}") - endforeach() - - # Add all the common compile flags - foreach(FLAG ${common_compile_flags}) - set(output "${output} ${FLAG}") - endforeach() - - # Add all the specific compile flags - foreach(FLAG ${special_compile_flags}) - set(output "${output} ${FLAG}") + set(file_names ${SOURCE_FILE_NAME}) + foreach(source ${file_names}) + # Get the relative path to the source and object files + file(RELATIVE_PATH CURRENT_SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${source}) + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/${source}.${OBJ_EXTENSION}) + + # Creating a string that contains the compile command + # Start by the compiler invocation + set(COMPILE_COMMAND "${COMPILE_COMMAND}${CMAKE_CXX_COMPILER}") + + # Add all the potential includes + foreach(INCLUDE ${includes}) + file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) + set(COMPILE_COMMAND "${COMPILE_COMMAND} -I${INCLUDE}") + endforeach() + + # Add all the common compile flags + foreach(FLAG ${common_compile_flags}) + set(COMPILE_COMMAND "${COMPILE_COMMAND} ${FLAG}") + endforeach() + + # Add all the specific compile flags + foreach(FLAG ${special_compile_flags}) + set(COMPILE_COMMAND "${COMPILE_COMMAND} ${FLAG}") + endforeach() + + # Get the location of the object file + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${target}.dir/${source}.${OBJ_EXTENSION}) + + # Add the source file and the output file + set(COMPILE_COMMAND "${COMPILE_COMMAND} -c ${CURRENT_SOURCE_FILE} -o ${OBJ_FILE}\n") endforeach() - # Get the location of the object file - file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${target}.dir/${SOURCE_FILE_NAME}.${OBJ_EXTENSION}) - - # Add the source file and the output file - set(COMPILE_COMMAND "${output} -c ${SOURCE_FILE} -o ${OBJ_FILE}" PARENT_SCOPE) + set(COMPILE_COMMAND "${COMPILE_COMMAND}" PARENT_SCOPE) # Creating a string that contains the link command # Start by the compiler invocation - set(LINK_COMMAND "${CMAKE_CXX_COMPILER}") + set(LINK_COMMAND "${LINK_COMMAND}${CMAKE_CXX_COMPILER}") # Add all the common link flags foreach(FLAG ${common_link_flags}) @@ -204,10 +210,20 @@ function(getCompileCommands includes common_compile_flags special_compile_flags # Add all the specific link flags foreach(FLAG ${special_link_flags}) set(LINK_COMMAND "${LINK_COMMAND} ${FLAG}") + endforeach() + + # Add the output file + set(LINK_COMMAND "${LINK_COMMAND} -o ${output_name}") + + foreach(source ${file_names}) + # Get the relative path to the source and object files + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/${source}.${OBJ_EXTENSION}) + + # Add the source file and the output file + set(LINK_COMMAND "${LINK_COMMAND} ${OBJ_FILE}") endforeach() - # Add the source file and the output file - set(LINK_COMMAND "${LINK_COMMAND} ${OBJ_FILE} -o ${output_name}" PARENT_SCOPE) + set(LINK_COMMAND "${LINK_COMMAND}" PARENT_SCOPE) endfunction() From e8e3b93e6e7a034dbaf3c7bf362a339b1f5fbe80 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 20 Dec 2022 08:09:53 -0800 Subject: [PATCH 14/22] fix absolute includes Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 00195d53a9..36502db891 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -175,7 +175,9 @@ function(getCompileCommands includes common_compile_flags special_compile_flags # Add all the potential includes foreach(INCLUDE ${includes}) - file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) + if(NOT IS_ABSOLUTE ${INCLUDE}) + file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) + endif() set(COMPILE_COMMAND "${COMPILE_COMMAND} -I${INCLUDE}") endforeach() From 2732ac449cc76e112baeba878488a6d67a89adcd Mon Sep 17 00:00:00 2001 From: yuguen-intel Date: Tue, 20 Dec 2022 17:43:59 +0100 Subject: [PATCH 15/22] Apply suggestions from code review Co-authored-by: Paul White --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 36502db891..20a228e0c8 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -142,7 +142,7 @@ set_target_properties(${REPORT_TARGET} PROPERTIES OUTPUT_NAME ${REPORT_OUTPUT_NA ############################################################################### ### FPGA Hardware ############################################################################### -add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILE}) +add_executable(${FPGA_TARGET} EXCLUDE_FROM_ALL ${SOURCE_FILES}) target_compile_options(${FPGA_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${FPGA_TARGET} PRIVATE ${HARDWARE_COMPILE_FLAGS}) target_link_libraries(${FPGA_TARGET} ${COMMON_LINK_FLAGS}) From a379d586eb43e081649cce34f4c466b8ac14735e Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 20 Dec 2022 09:21:34 -0800 Subject: [PATCH 16/22] support link libraries Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 55 +++++++++++++++---- 1 file changed, 44 insertions(+), 11 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 20a228e0c8..65c105c1a5 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -19,7 +19,7 @@ set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}) ############################################################################### ### Customize these build variables ############################################################################### -set(SOURCE_FILE src/loop_unroll.cpp) +set(SOURCE_FILES src/loop_unroll.cpp) set(TARGET_NAME loop_unroll) # Use cmake -DFPGA_DEVICE=: to choose a @@ -49,6 +49,12 @@ set(USER_FLAGS "${USER_FLAGS}") # compilation. set(USER_INCLUDE_PATHS "${USER_INCLUDE_PATHS} ../../../include") +# Use cmake -DUSER_LIB_PATHS= to set extra paths to target_link_libraries +set(USER_LIB_PATHS "${USER_LIB_PATHS}") + +# Use cmake -DUSER_LIBS= to add extra static libraries +set(USER_LIBS "${USER_LIBS}") + ############################################################################### ### no changes after here ############################################################################### @@ -74,6 +80,16 @@ set(INCLUDEPATHS_LIST ${USER_INCLUDE_PATHS}) separate_arguments(INCLUDEPATHS_LIST) include_directories(${INCLUDEPATHS_LIST}) +# Sanitize the library paths +set(LIBPATHS_LIST ${USER_LIB_PATHS}) +separate_arguments(LIBPATHS_LIST) +link_directories(${LIBPATHS_LIST}) + +# Sanitize the list of libraries +set(LIBS_LIST ${USER_LIBS}) +separate_arguments(LIBS_LIST) + + # This is a Windows-specific flag that enables exception handling in host code if(WIN32) # add qactypes to link command on Windows only @@ -102,12 +118,12 @@ set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLA # use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation # Set the source file names in a string -set(SOURCE_FILE_NAME "${SOURCE_FILE}") +set(SOURCE_FILE_NAME "${SOURCE_FILES}") ############################################################################### ### FPGA Emulator ############################################################################### -add_executable(${EMULATOR_TARGET} ${SOURCE_FILE}) +add_executable(${EMULATOR_TARGET} ${SOURCE_FILES}) target_compile_options(${EMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${EMULATOR_TARGET} PRIVATE ${EMULATOR_COMPILE_FLAGS}) target_link_libraries(${EMULATOR_TARGET} ${COMMON_LINK_FLAGS}) @@ -117,7 +133,7 @@ set_target_properties(${EMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${EMULATOR_OUTPU ############################################################################### ### FPGA Simulator ############################################################################### -add_executable(${SIMULATOR_TARGET} ${SOURCE_FILE}) +add_executable(${SIMULATOR_TARGET} ${SOURCE_FILES}) target_compile_options(${SIMULATOR_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${SIMULATOR_TARGET} PRIVATE ${SIMULATOR_COMPILE_FLAGS}) target_link_libraries(${SIMULATOR_TARGET} ${COMMON_LINK_FLAGS}) @@ -127,7 +143,7 @@ set_target_properties(${SIMULATOR_TARGET} PROPERTIES OUTPUT_NAME ${SIMULATOR_OUT ############################################################################### ### Generate Report ############################################################################### -add_executable(${REPORT_TARGET} ${SOURCE_FILE}) +add_executable(${REPORT_TARGET} ${SOURCE_FILES}) target_compile_options(${REPORT_TARGET} PRIVATE ${COMMON_COMPILE_FLAGS}) target_compile_options(${REPORT_TARGET} PRIVATE ${REPORT_COMPILE_FLAGS}) @@ -161,7 +177,7 @@ else() endif() -function(getCompileCommands includes common_compile_flags special_compile_flags common_link_flags special_link_flags target output_name) +function(getCompileCommands common_compile_flags special_compile_flags common_link_flags special_link_flags target output_name) set(file_names ${SOURCE_FILE_NAME}) foreach(source ${file_names}) @@ -174,7 +190,7 @@ function(getCompileCommands includes common_compile_flags special_compile_flags set(COMPILE_COMMAND "${COMPILE_COMMAND}${CMAKE_CXX_COMPILER}") # Add all the potential includes - foreach(INCLUDE ${includes}) + foreach(INCLUDE ${INCLUDEPATHS_LIST}) if(NOT IS_ABSOLUTE ${INCLUDE}) file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) endif() @@ -225,6 +241,23 @@ function(getCompileCommands includes common_compile_flags special_compile_flags set(LINK_COMMAND "${LINK_COMMAND} ${OBJ_FILE}") endforeach() + # Add all the potential library paths + foreach(LIB_PATH ${LIBPATHS_LIST}) + if(NOT IS_ABSOLUTE ${LIB_PATH}) + file(RELATIVE_PATH LIB_PATH ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${LIB_PATH}) + endif() + if(NOT WIN32) + set(LINK_COMMAND "${LINK_COMMAND} -L${LIB_PATH}") + else() + set(LINK_COMMAND "${LINK_COMMAND} -L${LIB_PATH} -Wl,-rpath,${LIB_PATH}") + endif() + endforeach() + + # Add all the potential includes + foreach(LIB ${LIBS_LIST}) + set(LINK_COMMAND "${LINK_COMMAND} -l${LIB}") + endforeach() + set(LINK_COMMAND "${LINK_COMMAND}" PARENT_SCOPE) endfunction() @@ -235,7 +268,7 @@ if(WIN32) endif() # Display the compile instructions in the emulation flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${EMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${EMULATOR_LINK_FLAGS}" "${EMULATOR_TARGET}" "${EMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") +getCompileCommands("${COMMON_COMPILE_FLAGS}" "${EMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${EMULATOR_LINK_FLAGS}" "${EMULATOR_TARGET}" "${EMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displayEmulationCompileCommands ALL @@ -244,7 +277,7 @@ add_custom_target( displayEmulationCompileCommands ALL add_dependencies(${EMULATOR_TARGET} displayEmulationCompileCommands) # Display the compile instructions in the simulation flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${SIMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${SIMULATOR_LINK_FLAGS}" "${SIMULATOR_TARGET}" "${SIMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") +getCompileCommands("${COMMON_COMPILE_FLAGS}" "${SIMULATOR_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${SIMULATOR_LINK_FLAGS}" "${SIMULATOR_TARGET}" "${SIMULATOR_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displaySimulationCompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" @@ -252,7 +285,7 @@ add_custom_target( displaySimulationCompileCommands ALL add_dependencies(${SIMULATOR_TARGET} displaySimulationCompileCommands) # Display the compile instructions in the report flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${REPORT_COMPILE_FLAGS}" "${MODIFIED_COMMON_LINK_FLAGS_REPORT}" "${REPORT_LINK_FLAGS}" "${REPORT_TARGET}" "${REPORT_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") +getCompileCommands("${COMMON_COMPILE_FLAGS}" "${REPORT_COMPILE_FLAGS}" "${MODIFIED_COMMON_LINK_FLAGS_REPORT}" "${REPORT_LINK_FLAGS}" "${REPORT_TARGET}" "${REPORT_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displayReportCompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" @@ -260,7 +293,7 @@ add_custom_target( displayReportCompileCommands ALL add_dependencies(${REPORT_TARGET} displayReportCompileCommands) # Display the compile instructions in the fpga flow -getCompileCommands("${INCLUDEPATHS_LIST}" "${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${FPGA_LINK_FLAGS}" "${FPGA_TARGET}" "${FPGA_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") +getCompileCommands("${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${FPGA_LINK_FLAGS}" "${FPGA_TARGET}" "${FPGA_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displayFPGACompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" From 2aed6e51a69398c8ae2d3b2be911b4b5647a647c Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Wed, 21 Dec 2022 07:16:39 -0800 Subject: [PATCH 17/22] fix multi-file support Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 65c105c1a5..f5af500bd4 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -180,6 +180,8 @@ endif() function(getCompileCommands common_compile_flags special_compile_flags common_link_flags special_link_flags target output_name) set(file_names ${SOURCE_FILE_NAME}) + set(COMPILE_COMMAND ) + set(LINK_COMMAND ) foreach(source ${file_names}) # Get the relative path to the source and object files file(RELATIVE_PATH CURRENT_SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${source}) From c59a06d5b781c3769c83cd90cfdbc8f5cfef6cd4 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Wed, 21 Dec 2022 08:16:00 -0800 Subject: [PATCH 18/22] add printing of user flags Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 46 +++++++++---------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index f5af500bd4..ff400c419d 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -40,20 +40,20 @@ endif() # Use cmake -DUSER_FPGA_FLAGS= to set extra flags for FPGA backend # compilation. -set(USER_FPGA_FLAGS "${USER_FPGA_FLAGS}") +set(FPGA_FLAGS ${USER_FPGA_FLAGS}) # Use cmake -DUSER_FLAGS= to set extra flags for general compilation. -set(USER_FLAGS "${USER_FLAGS}") +set(EXTRA_USER_FLAGS ${USER_FLAGS}) # Use cmake -DUSER_INCLUDE_PATHS= to set extra paths for general # compilation. -set(USER_INCLUDE_PATHS "${USER_INCLUDE_PATHS} ../../../include") +set(INCLUDE_PATHS ${USER_INCLUDE_PATHS} ../../../include) # Use cmake -DUSER_LIB_PATHS= to set extra paths to target_link_libraries -set(USER_LIB_PATHS "${USER_LIB_PATHS}") +set(LIB_PATHS ${USER_LIB_PATHS}) # Use cmake -DUSER_LIBS= to add extra static libraries -set(USER_LIBS "${USER_LIBS}") +set(LIBS ${USER_LIBS}) ############################################################################### ### no changes after here @@ -75,20 +75,20 @@ set(SIMULATOR_OUTPUT_NAME ${TARGET_NAME}.${SIMULATOR_TARGET}) set(REPORT_OUTPUT_NAME ${TARGET_NAME}.${REPORT_TARGET}) set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) +message(STATUS "Additional USER_FPGA_FLAGS=${USER_FPGA_FLAGS}") +message(STATUS "Additional USER_FLAGS=${USER_FLAGS}") + # Sanitize the include path -set(INCLUDEPATHS_LIST ${USER_INCLUDE_PATHS}) -separate_arguments(INCLUDEPATHS_LIST) -include_directories(${INCLUDEPATHS_LIST}) +include_directories(${INCLUDE_PATHS}) +message(STATUS "Additional USER_INCLUDE_PATHS=${USER_INCLUDE_PATHS}") # Sanitize the library paths -set(LIBPATHS_LIST ${USER_LIB_PATHS}) -separate_arguments(LIBPATHS_LIST) -link_directories(${LIBPATHS_LIST}) +link_directories(${LIB_PATHS}) +message(STATUS "Additional USER_LIB_PATHS=${USER_LIB_PATHS}") # Sanitize the list of libraries -set(LIBS_LIST ${USER_LIBS}) -separate_arguments(LIBS_LIST) - +link_libraries(${LIBS}) +message(STATUS "Additional USER_LIBS=${USER_LIBS}") # This is a Windows-specific flag that enables exception handling in host code if(WIN32) @@ -100,8 +100,8 @@ else() set(QACTYPES "-qactypes") endif() -set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES} ${USER_FLAGS}) -set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${USER_FLAGS}) +set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES} ${EXTRA_USER_FLAGS}) +set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${EXTRA_USER_FLAGS}) # A SYCL ahead-of-time (AoT) compile processes the device code in two stages. # 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). @@ -110,12 +110,11 @@ set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${USER_FLAGS}) set(EMULATOR_COMPILE_FLAGS -DFPGA_EMULATOR) set(EMULATOR_LINK_FLAGS ) set(REPORT_COMPILE_FLAGS -DFPGA_HARDWARE) -set(REPORT_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -fsycl-link=early) +set(REPORT_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${FPGA_FLAGS} -fsycl-link=early) set(SIMULATOR_COMPILE_FLAGS -Xssimulation -DFPGA_SIMULATOR) -set(SIMULATOR_LINK_FLAGS -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS}) +set(SIMULATOR_LINK_FLAGS -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${FPGA_FLAGS}) set(HARDWARE_COMPILE_FLAGS -DFPGA_HARDWARE) -set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_HARDWARE_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) -# use cmake -D USER_HARDWARE_FLAGS= to set extra flags for FPGA simulator compilation and backend compilation +set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${FPGA_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) # Set the source file names in a string set(SOURCE_FILE_NAME "${SOURCE_FILES}") @@ -182,6 +181,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li set(file_names ${SOURCE_FILE_NAME}) set(COMPILE_COMMAND ) set(LINK_COMMAND ) + foreach(source ${file_names}) # Get the relative path to the source and object files file(RELATIVE_PATH CURRENT_SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${source}) @@ -192,7 +192,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li set(COMPILE_COMMAND "${COMPILE_COMMAND}${CMAKE_CXX_COMPILER}") # Add all the potential includes - foreach(INCLUDE ${INCLUDEPATHS_LIST}) + foreach(INCLUDE ${INCLUDE_PATHS}) if(NOT IS_ABSOLUTE ${INCLUDE}) file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) endif() @@ -244,7 +244,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li endforeach() # Add all the potential library paths - foreach(LIB_PATH ${LIBPATHS_LIST}) + foreach(LIB_PATH ${LIB_PATHS}) if(NOT IS_ABSOLUTE ${LIB_PATH}) file(RELATIVE_PATH LIB_PATH ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${LIB_PATH}) endif() @@ -256,7 +256,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li endforeach() # Add all the potential includes - foreach(LIB ${LIBS_LIST}) + foreach(LIB ${LIBS}) set(LINK_COMMAND "${LINK_COMMAND} -l${LIB}") endforeach() From aca2b3e2c721ae09743310f50434bc8f1368832d Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Wed, 21 Dec 2022 10:54:00 -0800 Subject: [PATCH 19/22] remove unnecessary comments Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 3 --- 1 file changed, 3 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index ff400c419d..7f1d1118ba 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -78,15 +78,12 @@ set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) message(STATUS "Additional USER_FPGA_FLAGS=${USER_FPGA_FLAGS}") message(STATUS "Additional USER_FLAGS=${USER_FLAGS}") -# Sanitize the include path include_directories(${INCLUDE_PATHS}) message(STATUS "Additional USER_INCLUDE_PATHS=${USER_INCLUDE_PATHS}") -# Sanitize the library paths link_directories(${LIB_PATHS}) message(STATUS "Additional USER_LIB_PATHS=${USER_LIB_PATHS}") -# Sanitize the list of libraries link_libraries(${LIBS}) message(STATUS "Additional USER_LIBS=${USER_LIBS}") From abcc9148809224f4a3b033fd68b60fa4fde9889d Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 3 Jan 2023 05:52:03 -0800 Subject: [PATCH 20/22] rename USER flags etc. Signed-off-by: Yohann Uguen --- .../Features/loop_unroll/CMakeLists.txt | 32 +++++++++---------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 7f1d1118ba..7aee055c58 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -40,20 +40,20 @@ endif() # Use cmake -DUSER_FPGA_FLAGS= to set extra flags for FPGA backend # compilation. -set(FPGA_FLAGS ${USER_FPGA_FLAGS}) +set(USER_FPGA_FLAGS ${USER_FPGA_FLAGS}) # Use cmake -DUSER_FLAGS= to set extra flags for general compilation. -set(EXTRA_USER_FLAGS ${USER_FLAGS}) +set(USER_FLAGS ${USER_FLAGS}) # Use cmake -DUSER_INCLUDE_PATHS= to set extra paths for general # compilation. -set(INCLUDE_PATHS ${USER_INCLUDE_PATHS} ../../../include) +set(USER_INCLUDE_PATHS ${USER_INCLUDE_PATHS} ../../../include) # Use cmake -DUSER_LIB_PATHS= to set extra paths to target_link_libraries -set(LIB_PATHS ${USER_LIB_PATHS}) +set(USER_LIB_PATHS ${USER_LIB_PATHS}) # Use cmake -DUSER_LIBS= to add extra static libraries -set(LIBS ${USER_LIBS}) +set(USER_LIBS ${USER_LIBS}) ############################################################################### ### no changes after here @@ -78,13 +78,13 @@ set(FPGA_OUTPUT_NAME ${TARGET_NAME}.${FPGA_TARGET}) message(STATUS "Additional USER_FPGA_FLAGS=${USER_FPGA_FLAGS}") message(STATUS "Additional USER_FLAGS=${USER_FLAGS}") -include_directories(${INCLUDE_PATHS}) +include_directories(${USER_INCLUDE_PATHS}) message(STATUS "Additional USER_INCLUDE_PATHS=${USER_INCLUDE_PATHS}") -link_directories(${LIB_PATHS}) +link_directories(${USER_LIB_PATHS}) message(STATUS "Additional USER_LIB_PATHS=${USER_LIB_PATHS}") -link_libraries(${LIBS}) +link_libraries(${USER_LIBS}) message(STATUS "Additional USER_LIBS=${USER_LIBS}") # This is a Windows-specific flag that enables exception handling in host code @@ -97,8 +97,8 @@ else() set(QACTYPES "-qactypes") endif() -set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES} ${EXTRA_USER_FLAGS}) -set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${EXTRA_USER_FLAGS}) +set(COMMON_COMPILE_FLAGS -fsycl -fintelfpga -Wall ${WIN_FLAG} ${QACTYPES} ${USER_FLAGS}) +set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${USER_FLAGS}) # A SYCL ahead-of-time (AoT) compile processes the device code in two stages. # 1. The "compile" stage compiles the device code to an intermediate representation (SPIR-V). @@ -107,11 +107,11 @@ set(COMMON_LINK_FLAGS -fsycl -fintelfpga ${QACTYPES} ${EXTRA_USER_FLAGS}) set(EMULATOR_COMPILE_FLAGS -DFPGA_EMULATOR) set(EMULATOR_LINK_FLAGS ) set(REPORT_COMPILE_FLAGS -DFPGA_HARDWARE) -set(REPORT_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${FPGA_FLAGS} -fsycl-link=early) +set(REPORT_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_FPGA_FLAGS} -fsycl-link=early) set(SIMULATOR_COMPILE_FLAGS -Xssimulation -DFPGA_SIMULATOR) -set(SIMULATOR_LINK_FLAGS -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${FPGA_FLAGS}) +set(SIMULATOR_LINK_FLAGS -Xssimulation -Xsghdl -Xstarget=${FPGA_DEVICE} ${USER_FPGA_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${SIMULATOR_OUTPUT_NAME}) set(HARDWARE_COMPILE_FLAGS -DFPGA_HARDWARE) -set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${FPGA_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) +set(HARDWARE_LINK_FLAGS -Xshardware -Xstarget=${FPGA_DEVICE} ${USER_FPGA_FLAGS} -reuse-exe=${CMAKE_BINARY_DIR}/${FPGA_OUTPUT_NAME}) # Set the source file names in a string set(SOURCE_FILE_NAME "${SOURCE_FILES}") @@ -189,7 +189,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li set(COMPILE_COMMAND "${COMPILE_COMMAND}${CMAKE_CXX_COMPILER}") # Add all the potential includes - foreach(INCLUDE ${INCLUDE_PATHS}) + foreach(INCLUDE ${USER_INCLUDE_PATHS}) if(NOT IS_ABSOLUTE ${INCLUDE}) file(RELATIVE_PATH INCLUDE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${INCLUDE}) endif() @@ -241,7 +241,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li endforeach() # Add all the potential library paths - foreach(LIB_PATH ${LIB_PATHS}) + foreach(LIB_PATH ${USER_LIB_PATHS}) if(NOT IS_ABSOLUTE ${LIB_PATH}) file(RELATIVE_PATH LIB_PATH ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${LIB_PATH}) endif() @@ -253,7 +253,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li endforeach() # Add all the potential includes - foreach(LIB ${LIBS}) + foreach(LIB ${USER_LIBS}) set(LINK_COMMAND "${LINK_COMMAND} -l${LIB}") endforeach() From 3c44a64d8f29290f2fc7b4af875ffd34e30da159 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Wed, 18 Jan 2023 05:05:29 -0800 Subject: [PATCH 21/22] fix hardcoded EMULATOR_TARGET path Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index 7aee055c58..ba92aa10a3 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -182,7 +182,7 @@ function(getCompileCommands common_compile_flags special_compile_flags common_li foreach(source ${file_names}) # Get the relative path to the source and object files file(RELATIVE_PATH CURRENT_SOURCE_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_LIST_DIR}/${source}) - file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${EMULATOR_TARGET}.dir/${source}.${OBJ_EXTENSION}) + file(RELATIVE_PATH OBJ_FILE ${CMAKE_CURRENT_BINARY_DIR} ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/${target}.dir/${source}.${OBJ_EXTENSION}) # Creating a string that contains the compile command # Start by the compiler invocation @@ -297,4 +297,4 @@ getCompileCommands("${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_L add_custom_target( displayFPGACompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan "" COMMENT "To compile manually:\n${COMPILE_COMMAND}\nTo link manually:\n${LINK_COMMAND}") -add_dependencies(${FPGA_TARGET} displayFPGACompileCommands) \ No newline at end of file +add_dependencies(${FPGA_TARGET} displayFPGACompileCommands) From eb1a7cdf0aa558f22c6a4b15feda51129da135c0 Mon Sep 17 00:00:00 2001 From: Yohann Uguen Date: Tue, 24 Jan 2023 05:31:08 -0800 Subject: [PATCH 22/22] fix fpga messages Signed-off-by: Yohann Uguen --- .../DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt index ba92aa10a3..2fb52edd11 100755 --- a/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt +++ b/DirectProgramming/DPC++FPGA/Tutorials/Features/loop_unroll/CMakeLists.txt @@ -292,7 +292,7 @@ add_custom_target( displayReportCompileCommands ALL add_dependencies(${REPORT_TARGET} displayReportCompileCommands) # Display the compile instructions in the fpga flow -getCompileCommands("${COMMON_COMPILE_FLAGS}" "${FPGA_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${FPGA_LINK_FLAGS}" "${FPGA_TARGET}" "${FPGA_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") +getCompileCommands("${COMMON_COMPILE_FLAGS}" "${HARDWARE_COMPILE_FLAGS}" "${COMMON_LINK_FLAGS}" "${HARDWARE_LINK_FLAGS}" "${FPGA_TARGET}" "${FPGA_OUTPUT_NAME}${EXECUTABLE_EXTENSION}") add_custom_target( displayFPGACompileCommands ALL ${CMAKE_COMMAND} -E cmake_echo_color --cyan ""