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[AMD][MI35X] Serve Qwen3.5 MXFP4-AttnFP8-V2 on the MI355X SGLang single-node arms #2695

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[AMD][MI35X] Serve Qwen3.5 MXFP4-AttnFP8-V2 on the MI355X SGLang single-node arms #2695

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3bce80b
[AMD][MI35X] Serve Qwen3.5 MXFP4-AttnFP8-V2 on the MI355X SGLang sing…
yichiche Aug 23, 2026
72cbc41
[AMD][MI35X] Export SGLANG_USE_AITER_FP8_PER_TOKEN for the AttnFP8-V2…
yichiche Aug 23, 2026
2fdc164
Merge branch 'main' into amd/qwen3.5-fp4-attnfp8-mi355x-sglang
yichiche Aug 25, 2026
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4 changes: 2 additions & 2 deletions configs/amd-master.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -314,7 +314,7 @@ qwen3.5-fp8-mi355x-sglang-disagg:

qwen3.5-fp4-mi355x-sglang:
image: lmsysorg/sglang-rocm:v0.5.16-rocm720-mi35x-20260730
model: amd/Qwen3.5-397B-A17B-MXFP4
model: amd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2
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model-prefix: qwen3.5
runner: mi355x
precision: fp4
Expand Down Expand Up @@ -346,7 +346,7 @@ qwen3.5-fp4-mi355x-atom:

qwen3.5-fp4-mi355x-sglang-mtp:
image: lmsysorg/sglang-rocm:v0.5.16-rocm720-mi35x-20260730
model: amd/Qwen3.5-397B-A17B-MXFP4
model: amd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2
model-prefix: qwen3.5
runner: mi355x
precision: fp4
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9 changes: 9 additions & 0 deletions perf-changelog.yaml
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Expand Up @@ -6378,3 +6378,12 @@
- "Serve the TP8 arm with FULL_AND_PIECEWISE cudagraphs, capturing the mixed prefill/decode batches as well as the uniform decode batches. The DEP8 arm is unchanged."
- "Replace the TP8 concurrency list [1, 4, 8, 16, 24] with [1, 4, 8, 14], dropping the published concurrency 16 and 24 points and adding concurrency 14."
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2707

- config-keys:
- qwen3.5-fp4-mi355x-sglang
- qwen3.5-fp4-mi355x-sglang-mtp
scenario-type:
- fixed-seq-len
description:
- "Switch the served checkpoint from amd/Qwen3.5-397B-A17B-MXFP4 to amd/Qwen3.5-397B-A17B-MXFP4-AttnFP8-V2 on both arms."
pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2695
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