Optimize x86 fp16s innerproduct gemm to eliminate loop-carried stalls#6682
Open
Edwardssss wants to merge 3 commits intoTencent:masterfrom
Open
Optimize x86 fp16s innerproduct gemm to eliminate loop-carried stalls#6682Edwardssss wants to merge 3 commits intoTencent:masterfrom
Edwardssss wants to merge 3 commits intoTencent:masterfrom
Conversation
Member
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## master #6682 +/- ##
==========================================
+ Coverage 93.65% 93.99% +0.34%
==========================================
Files 930 930
Lines 296508 298257 +1749
==========================================
+ Hits 277688 280341 +2653
+ Misses 18820 17916 -904 ☔ View full report in Codecov by Sentry. 🚀 New features to boost your workflow:
|
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
PR Description:
Overview
This PR significantly improves the performance of
innerproduct_gemm_fp16s_sseon x86 architectures by mitigating severe loop-carried dependency stalls and replacing inefficient instructions in the microkernels.Problem
The existing
innerproduct_gemm_fp16simplementation had two major bottlenecks:_sum0to_sum3) in accumulation iterations. Given the 4-5 cycle latency of typical FMA instructions, this caused severe processor pipeline stalls, wasting execution ports constraints._mm256_extractf128_si256for FP16->FP32 conversions which is slightly more expensive compared to memory operand fusion.Solution
elempack == 1&num_output_elempack == 8 / 16 / 4blocks. We now use up to 8 independent accumulation registers to completely break the false data dependency, hiding FMA latency._mm256_extractf128_si256in favor of direct 128-bit loads (_mm_lddqu_si128) fused into_mm256_cvtph_ps, reducing register traffic.Benchmark Results (AMD Family 17h, 12 Cores, FP16 mode)
Tested via
benchncnn 4 6 2 -1:vgg16resnet50resnet18AMDuProf Analysis:
Profiling the single-process CPU runtime confirms that the
innerproduct_gemm_fp16s_ssehotspot significantly dropped CPU_TIME:67.87s55.14s(Total execution lowered by >12s).Commit Split:
Optimize innerproduct x86 fp16s gemm using fused loads and fully unrolled FMA(Addressed the1x8case alongside the load logic rewrite).Alleviate loop-carried stalls in innerproduct fp16s microkernels by unrolling(Extrapolated the fixes across1x16and1x4blocks respectively).