Discuss disabling EMAC_RQ0_OPMODE.EHFC

[pamolloy]

The DesignWare EMAC IP in the ADSP-SC846 has a hardware-automatic flow control (EHFC) feature controlled by the EMAC_RQ0_OPMODE.EHFC bit. When enabled, the MAC monitors the Rx FIFO fill-level and automatically transmits IEEE 802.3 pause frames when the level crosses the RFA (Receive Flow Activate) threshold.

From the HRM (Section 28, "Transmit Flow Control"):

┌──────┬─────┬────┬──────────────────────────────────────────────────────────────────────────────────────────────┐           
│ EHFC │ TFE │ DM │ Description                                                                                  │           
├──────┼─────┼────┼──────────────────────────────────────────────────────────────────────────────────────────────┤           
│ 1    │ 1   │ 1  │ MAC sends pause frames on software trigger AND when Rx queue level crosses the RFA threshold │           
└──────┴─────┴────┴──────────────────────────────────────────────────────────────────────────────────────────────┘           

When the ARM core stalls and stops servicing the EMAC Rx FIFO, the FIFO fills up, triggering EHFC to continuously emit pause frames with maximum pause time (0xFFFF). A non-compliant switch forwards these frames to all devices, disrupting the entire network segment.

In drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c, function dwmac4_dma_rx_chan_op_mode():

  if ((fifosz >= 4096) && (qmode != MTL_QUEUE_AVB)) {                                                                        
      mtl_rx_op |= MTL_OP_MODE_EHFC;  /* BIT(7) */                                                                           
      ...                                                                                                                    
  }                                                                                                                          

This unconditionally enables EHFC whenever the Rx FIFO is ≥ 4 KiB, which is the case for the ADSP-SC846.

Proposed solution:

1. include/linux/stmmac.h — New flag STMMAC_FLAG_DISABLE_HW_FLOW_CTRL (BIT(14))
2. drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c — The EHFC/RFA/RFD programming block now checks the flag and skips when it's set
3. drivers/net/ethernet/stmicro/stmmac/dwmac-adi.c — Sets the flag in dwmac_adi_probe() before calling stmmac_dvr_probe()

This prevents the ADSP-SC846 EMAC from ever setting the EHFC bit in EMAC_RQ0_OPMODE, so no automatic pause frames will be transmitted regardless of Rx FIFO state. Software-triggered flow control (via TFE/phylink) remains available if ever needed in the future.

This is a follow-up to analogdevicesinc/system-level#559 (comment).

[pamolloy]

Disabling EHFC is treating the symptom, not the disease, and it comes with a cost: without hardware flow control, when the Rx FIFO overflows, packets will simply be silently dropped instead of the MAC requesting the sender to back off.

Rather than disabling this standard-compliant feature, the real fixes should target:

1. Why the core hangs — that's the actual bug to investigate
2. Use compliant network equipment — which the user already confirmed works at the office

[pamolloy]

How to automate testing whether switches properly handle this case in our large and distributed test infrastructure:

Scapy has built-in support via scapy.contrib.mac_control.MACControlPause, so the sender could be as simple as:

  from scapy.contrib.mac_control import MACControlPause                                                                                                                                      
  from scapy.all import Ether, sendp                                                                                                                                                         
                                                                                                                                                                                             
  frame = Ether(dst="01:80:c2:00:00:01") / MACControlPause(pause_time=0xFFFF)                                                                                                                
  sendp(frame, iface="eth0", count=5, inter=0.5)                                                                                                                                             

And the listener could use sniff(filter="ether proto 0x8808", iface="eth0", timeout=30).