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bytecodealliance / wasm-micro-runtime Public

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Add support for Hexagon architecture#4933

Open

androm3da wants to merge 11 commits into

bytecodealliance:mainbytecodealliance/wasm-micro-runtime:mainfrom

androm3da:hexagon-upstream-v2androm3da/wasm-micro-runtime:hexagon-upstream-v2Copy head branch name to clipboard

Conversation Commits11 (11)Checks Files changed

Open

Add support for Hexagon architecture#4933
androm3da wants to merge 11 commits into
bytecodealliance:mainfrom
androm3da:hexagon-upstream-v2

Commits

Commits on Jun 28, 2026

Introduce WASM_CPU_SUPPORTS_UNALIGNED_SIMD_ACCESS for V128 load/store
androm3da
committed
feat(hexagon): add Hexagon ISA target support
androm3da
committed
ci(hexagon): add spec test workflow under qemu-hexagon user-mode
androm3da
committed

Commits on Jul 10, 2026

fix(interpreter): keep WASMTableInstance instances 8-byte aligned
androm3da
committed
fix(fast-interp): avoid misaligned stores in loader emit paths
androm3da
committed
fix(application): avoid misaligned 64-bit access in V128 arg handling
androm3da
committed
fix(fast-interp): don't deref v128.const immediate as aligned V128
androm3da
committed

Commits on Jul 16, 2026

fix(runtime): apply table-instance alignment in jit offsets and AOT layout
androm3da
committed
fix(interpreter): use alignment-safe access for unaligned memory operands
androm3da
committed
fix(application): normalize NaN float arguments from strtof/strtod
androm3da
committed
ci(hexagon): test classic-interp with a real classic build; refine skips
androm3da
committed

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