FROMLIST: misc: fastrpc: Enable poll mode for specific devices#598
FROMLIST: misc: fastrpc: Enable poll mode for specific devices#598Jianping-Li wants to merge 6 commits into
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Merge Check Failed: No Change Task Found No associated change tasks found for CR 4450320 on any of the following entities: Entities:
CR: 4450320 Please ensure the CR has a change task associated with at least one of the entities for this branch. |
PR #598 — validate-patchPR: #598
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PR #598 — checker-log-analyzerPR: #598
Detailed report: Full report
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Intake review
All formal checks pass (CRs-Fixed ✓, FROMLIST ✓, Link: ✓, author/committer domains ✓).
drivers/misc/fastrpc.c — block comment style
The new comment block uses * without a leading space:
+ /*
+ * Set message context as polled if the call is for a user PD
+ * dynamic module and user has enabled poll mode.
+ */Kernel coding style requires a space before * in multi-line block comments:
/*
* Set message context as polled if the call is for a user PD
* dynamic module and user has enabled poll mode.
*/include/uapi/misc/fastrpc.h — IOCTL macro alignment
+#define FASTRPC_IOCTL_SET_OPTION _IOWR('R', 12, struct fastrpc_ioctl_set_option)The surrounding macros use a tab between the macro name and _IOWR. Please add a tab to align with the block:
#define FASTRPC_IOCTL_SET_OPTION _IOWR('R', 12, struct fastrpc_ioctl_set_option)
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Merge Check Failed: CR Not Eligible for Merge CR 4450320 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #598 — validate-patchPR: #598
Final Summary
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PR #598 — checker-log-analyzerPR: #598
Detailed report: Full report
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Test Matrix
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Merge Check Failed: CR Not Eligible for Merge CR 4450320 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #598 — validate-patchPR: #598
Final Summary
Overall verdict: ❌ FAIL — Do not merge. Authorship violation and duplicate work.
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PR #598 — checker-log-analyzerPR: #598
Detailed report: Full report
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… driver" This reverts commit dba4eb2. Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
…ure" This reverts commit 318d871. Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
The fdlist is currently part of the meta buffer which is set during fastrpc_get_args(), this fdlist is getting recalculated during fastrpc_put_args(). Move fdlist to the invoke context structure to improve maintainability and reduce redundancy. This centralizes its handling and simplifies meta buffer preparation and reading logic. Link: https://lore.kernel.org/all/20260521054539.128651-2-ekansh.gupta@oss.qualcomm.com/ Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
Replace the hardcoded context ID mask (0xFF0) with GENMASK(11, 4) to improve readability and follow kernel bitfield conventions. Use FIELD_PREP and FIELD_GET instead of manual shifts for setting and extracting ctxid values. Link: https://lore.kernel.org/all/20260521054539.128651-3-ekansh.gupta@oss.qualcomm.com/ Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
…support Current FastRPC context uses a 12-bit mask: [ID(8 bits)][PD type(4 bits)] = GENMASK(11, 4) This works for normal calls but fails for DSP polling mode. Polling mode expects a 16-bit layout: [15:8] = context ID (8 bits) [7:5] = reserved [4] = async mode bit [3:0] = PD type (4 bits) If async bit (bit 4) is set, DSP disables polling. With current mask, odd IDs can set this bit, causing DSP to skip poll updates. Update FASTRPC_CTXID_MASK to GENMASK(15, 8) so IDs occupy upper byte and lower byte is left for DSP flags and PD type. Reserved bits remain unused. This change is compatible with polling mode and does not break non-polling behavior. Bit layout: [15:8] = CCCCCCCC (context ID) [7:5] = xxx (reserved) [4] = A (async mode) [3:0] = PPPP (PD type) Link: https://lore.kernel.org/all/20260521054539.128651-4-ekansh.gupta@oss.qualcomm.com/ Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
For any remote call to DSP, after sending an invocation message, fastRPC driver waits for glink response and during this time the CPU can go into low power modes. This adds latency to overall fastrpc call as CPU wakeup and scheduling latencies are included. Add polling mode support with which fastRPC driver will poll continuously on a memory after sending a message to remote subsystem which will eliminate CPU wakeup and scheduling latencies and reduce fastRPC overhead. In case poll timeout happens, the call will fallback to normal RPC mode. Poll mode can be enabled by user by using FASTRPC_IOCTL_SET_OPTION ioctl request with FASTRPC_POLL_MODE request id. Link: https://lore.kernel.org/all/20260521054539.128651-5-ekansh.gupta@oss.qualcomm.com/ Signed-off-by: Jianping Li <jianping.li@oss.qualcomm.com>
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Merge Check Failed: CR Not Eligible for Merge CR 4450320 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #598 — validate-patchPR: #598
Final Summary
Recommendation: Do not merge until authorship is corrected and revert justifications are added. Verify that upstream patches are actually posted before using FROMLIST prefix.
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PR #598 — checker-log-analyzerPR: #598
Detailed report: Full report
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5 participants
Some devices, such as Talos, do not support poll mode, and it is not appropriate to force all devices to start in poll mode in the fastrpc driver. In case poll timeout happens, the call will fallback to normal RPC mode. Poll mode can be enabled by user by using FASTRPC_IOCTL_SET_OPTION ioctl request with FASTRPC_POLL_MODE request id.
Link: https://lore.kernel.org/all/20260424095903.1622565-5-ekansh.gupta@oss.qualcomm.com/
CRs-Fixed: 4450320