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-O2/-O3 leave a self-cancelling CCX pair behind that --simplify/-O1 remove on their own

Status: Open.

#91 In softwareQinc/staq;

· jangyoujin0917 opened on Sep 18, 2026

--cnot-resynth emit qelib1 gate names without declaring them

Status: Open.

#90 In softwareQinc/staq;

· jangyoujin0917 opened on Sep 16, 2026

Question: how to compile into a specific gate set?

Status: Open.

#77 In softwareQinc/staq;

· ashsaki opened on Apr 21, 2024

Changing qubit register names of input circuit affects compiled circuit

Status: Open.

#52 In softwareQinc/staq;

· Gurleenp opened on Apr 3, 2023

Oracle synthesis: verilog array format?

enhancementNew feature or requestNew feature or request

Status: Open.

#48 In softwareQinc/staq;

· gribeill opened on Apr 13, 2022

Mismatch issues of the rz

Status: Open.

#45 In softwareQinc/staq;

· vsoftco opened on Jan 17, 2022

Optimization by self-annihilating sequences

enhancementNew feature or requestNew feature or request

Status: Open.

#37 In softwareQinc/staq;

· DevelopDaily opened on Feb 2, 2021