fix when STR LDR V0 Register this immediate must << 4 ins : E0 0B 8…#44
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IIIImmmyyy wants to merge 29 commits into
Open
fix when STR LDR V0 Register this immediate must << 4 ins : E0 0B 8…#44IIIImmmyyy wants to merge 29 commits into
IIIImmmyyy wants to merge 29 commits into
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…3D ==> str q0, [sp, #0x20]
…nge to MOV like IDA
…o SMULL and UMULL
Introduce methods to resolve and process conditional field accesses, and refine the handling of load/store instructions to omit no-operation shifts, enhancing the overall accuracy and efficiency of the IR transformation and disassembly processes.
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…0 3D ==> str q0, [sp, #0x20]