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fix when STR LDR V0 Register this immediate must << 4 ins : E0 0B 8…#44

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fix when STR LDR V0 Register this immediate must << 4 ins : E0 0B 8…#44
IIIImmmyyy wants to merge 29 commits into
SamboyCoding:masterfrom
IIIImmmyyy:master

Add support for conditional field access and improve load/store handling

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